公开(公告)号：US09300318B1

公开(公告)日：2016-03-29

申请号：US14725323

申请日：2015-05-29

Applicant: Analog Devices Global

Inventor： Italo Carlos Medina Sanchez-Castro

IPC: H03M1/66 ,  H03M1/74 ,  H03M1/00 ,  H03M1/06

CPC classification number: H03M1/0863 ,  H03M1/00 ,  H03M1/687 ,  H03M1/745 ,  H03M1/747 ,  H03M1/765

Abstract: A Segmented Voltage Continuous-Time Digital-to-Analog Converter is disclosed which provides the benefits of segmentation while minimizing the associated disadvantages. The segmented digital to analog converter disclosed here features, in particular, inherent monotonicity and low transition glitches. The segmentation technique is based on coupling an array of switchable current sources and at least one current divider into a resistor string, providing, at least, three levels of segmentation.

Abstract translation: 公开了分段电压连续时间数模转换器，其提供了分段的优点，同时最小化相关的缺点。 这里公开的分段式数模转换器特别地具有固有单调性和低转换毛刺。 分割技术基于将可切换电流源的阵列和至少一个电流分配器耦合到电阻串中，从而提供至少三个级别的分割。

公开(公告)号：US09294037B2

公开(公告)日：2016-03-22

申请号：US14223650

申请日：2014-03-24

Applicant: ANALOG DEVICES GLOBAL

Inventor： Roberto S. Maurino ,  Venkata Aruna Srikanth Nittala ,  Abhilasha Kawle ,  Sanjay Rajasekhar

IPC: H03F1/02 ,  H03F3/45

CPC classification number: H03F1/02 ,  H03F1/0277 ,  H03F3/45076 ,  H03F3/45475 ,  H03F3/45968 ,  H03F2200/234 ,  H03F2203/45288

Abstract: Apparatus and methods for autozero amplifiers are provided herein. In certain configurations, an autozero amplifier includes at least three transconductance stages and an autozero timing control circuit configured to control an autozero sequence of the transconductance stages. The autozero timing control circuit can stagger autozeroing of the transconductance stages, such that a relatively small amount of the amplifier's amplification circuitry is connected to or disconnected from the amplifier's signal path at any given time. For example, in certain configurations, when one of the transconductance stages in autozeroed over a particular time interval, the remaining transconductance stages can operate in parallel to provide amplification during that time interval.

Abstract translation: 本文提供了用于自动调零放大器的装置和方法。 在某些配置中，自动调零放大器包括至少三个跨导级和被配置为控制跨导级的自动调零序列的自动调零定时控制电路。 自动调零定时控制电路可以错开跨导级的自动调零，使得相对较少量的放大器的放大电路在任何给定的时间与放大器的信号路径相连或断开。 例如，在某些配置中，当在特定时间间隔内自动归零的跨导级之一时，剩余的跨导级可以并行操作以在该时间间隔期间提供放大。

公开(公告)号：US09287831B2

公开(公告)日：2016-03-15

申请号：US14139672

申请日：2013-12-23

Applicant: ANALOG DEVICES GLOBAL

Inventor： Dzianis Lukashevich

IPC: H03F1/30 ,  H01L27/12

CPC classification number: H03F1/30 ,  H01L27/1203 ,  H03F2200/447 ,  H03F2200/468 ,  H03F2200/528

Abstract: This disclosure relates to temperature stabilization of at least a portion of an amplifier, such as a logarithmic amplifier, and/or a band gap reference circuit. In one aspect, one or more stages of an amplifier, a heater, and a temperature sensor are included in a semiconductor material and surrounded by thermally insulating sidewalls.

Abstract translation: 本公开涉及放大器，例如对数放大器和/或带隙基准电路的至少一部分的温度稳定。 在一个方面，放大器，加热器和温度传感器的一个或多个级包括在半导体材料中并被隔热侧壁包围。

公开(公告)号：US20160065147A1

公开(公告)日：2016-03-03

申请号：US14472243

申请日：2014-08-28

Applicant: ANALOG DEVICES GLOBAL

Inventor： Patrick Joseph Pratt ,  Ronald D. Turner ,  Joseph B. Brannon

IPC: H03F1/32 ,  H03F3/21 ,  H03F3/19

CPC classification number: H03F1/3247 ,  H03F1/3258 ,  H03F3/19 ,  H03F3/195 ,  H03F3/21 ,  H03F3/245 ,  H03F2200/451 ,  H03F2201/3215 ,  H03F2201/3233

Abstract: Aspects of this disclosure relate to a receiver for digital predistortion (DPD). The receiver includes an analog-to-digital converter (ADC) having a sampling rate that is lower than a signal bandwidth of an output of a circuit having an input that is predistorted by DPD. DPD can be updated based on feedback from the receiver. According to certain embodiments, the receiver can be a narrowband receiver configured to observe sub-bands of the signal bandwidth. In some other embodiments, the receiver can include a sub-Nyquist ADC.

Abstract translation: 本公开的方面涉及用于数字预失真（DPD）的接收机。 接收机包括具有低于具有由DPD预失真的输入的电路的输出的信号带宽的采样率的模拟 - 数字转换器（ADC）。 DPD可以根据接收机的反馈进行更新。 根据某些实施例，接收机可以是被配置为观察信号带宽的子带的窄带接收机。 在一些其他实施例中，接收机可以包括子奈奎斯特ADC。

公开(公告)号：US20160056829A1

公开(公告)日：2016-02-25

申请号：US14831731

申请日：2015-08-20

Applicant: ANALOG DEVICES GLOBAL

Inventor： Adam GLIBBERY ,  John O'DOWD ,  Nicola O'BYRNE

IPC: H03M1/12 ,  H03M1/48 ,  H03M5/12 ,  H03M1/06

CPC classification number: H03M1/123 ,  H03M1/0604 ,  H03M1/12 ,  H03M1/188 ,  H03M1/48 ,  H03M3/398 ,  H03M5/12

Abstract: In an isolation system, different analog to digital converters (“ADCs”) are provided on a first side of an isolation barrier. Outputs from the ADCs may be merged into a common data stream and communicated across the isolation barrier by a single isolation device. The ADCs may sample independent signals or may sample a common signal. When the ADCs sample a common signal, the system may monitor the input signal for fault conditions. During no fault operation, results of an analog-to-digital conversion may be communicated across an isolation barrier by an isolation device. During a fault condition, data representing the fault condition may replace the ADC data in communication across the isolation barrier. Fault conditions may be signaled by unique data patterns that can be distinguished from ADC data.

Abstract translation: 在隔离系统中，在隔离屏障的第一侧上提供不同的模数转换器（“ADC”）。 来自ADC的输出可以被合并到公共数据流中，并通过单个隔离装置在隔离屏障上传送。 ADC可以对独立信号进行采样，或者采样公共信号。 当ADC采样公共信号时，系统可以监视输入信号的故障状况。 在没有故障操作期间，模数转换的结果可以通过隔离装置在隔离屏障上传送。 在故障状态期间，表示故障状态的数据可以替代隔离隔离层的通信中的ADC数据。 故障条件可以通过可与ADC数据进行区分的唯一数据模式来发出信号。

公开(公告)号：US20160055049A1

公开(公告)日：2016-02-25

申请号：US14465986

申请日：2014-08-22

Applicant: Analog Devices Global

Inventor： Dzianis Lukashevich

IPC: G06F11/07

CPC classification number: G06F11/0757 ,  G01R19/0092 ,  G06F1/24 ,  G06F11/0706

Abstract: An ultra-low-power supervisory circuits can employ floating gate transistors. In an example, a supervisory circuit can include a reset output circuit, a voltage comparator circuit configured to reset the reset output circuit when a first input voltage falls below a reference voltage, and a watchdog circuit configured to receive a watchdog signal and to reset the reset output circuit if the watchdog signal does not transition within a predetermined watchdog interval. The voltage comparator circuit can include a first floating gate transistor circuit configured to establish a reference current for generating the reference voltage, and the watchdog circuit can include a second floating gate transistor circuit for selecting the predetermined watchdog interval.

Abstract translation: 超低功率监控电路可以采用浮栅晶体管。 在一个示例中，监控电路可以包括复位输出电路，电压比较器电路，配置为当第一输入电压低于参考电压时复位复位输出电路;以及看门狗电路，被配置为接收看门狗信号并复位 如果看门狗信号在预定的看门狗间隔内没有转换，则复位输出电路。 电压比较器电路可以包括被配置为建立用于产生参考电压的参考电流的第一浮栅晶体管电路，并且看门狗电路可以包括用于选择预定看门狗间隔的第二浮栅晶体管电路。

公开(公告)号：US20160005530A1

公开(公告)日：2016-01-07

申请号：US14322321

申请日：2014-07-02

Applicant: ANALOG DEVICES GLOBAL

Inventor： Jan Kubík

IPC: H01F27/34 ,  H01F27/30

Abstract: Inductive components, such as transformers, can be improved by the inclusion of a magnetic core. However the benefit of having a core is lost if the core enters magnetic saturation. One way to avoid saturation is to provide a bigger core, but this is costly in the context of integrated electronic circuits. The inventor realized that the flux magnetic flux density varies with position in a magnetic core within an integrated circuit, causing parts of the magnetic core to saturate earlier than other parts. This reduces the ultimate performance of the magnetic core. This disclosure provides structures that delay the onset of early saturation, enabling a transformer to handle more power.

Abstract translation: 诸如变压器之类的感应元件可以通过包括磁芯来改善。 然而，如果磁芯进入磁饱和状态，则磁芯的好处就会丢失。 避免饱和的一种方法是提供更大的核心，但是在集成电子电路的情况下这是昂贵的。 发明人认识到，磁通磁通密度随着集成电路内的磁芯中的位置而变化，使得磁芯的一部分比其它部分早一些饱和。 这降低了磁芯的最终性能。 本公开提供延迟早期饱和的开始的结构，使得变压器能够处理更多的功率。

公开(公告)号：US09209827B2

公开(公告)日：2015-12-08

申请号：US14657919

申请日：2015-03-13

Applicant: ANALOG DEVICES GLOBAL

Inventor： Kevin Cao-Van Lam ,  Richard E. Schreier ,  Donald W. Paterson

IPC: H03M1/10 ,  H03M3/00

CPC classification number: H03M3/38 ,  H03M1/1009 ,  H03M3/392 ,  H03M3/424 ,  H03M3/454

Abstract: An integrated circuit includes a component calculator configured to compute at least one component value of a highly programmable analog-to-digital converter (ADC) from at least one application parameter, and a mapping module configured to map the component value to a corresponding register setting of the ADC based on at least one process parameter, wherein the integrated circuit produces digital control signals capable of programming the ADC. In a specific embodiment, the component calculator uses an algebraic function of a normalized representation of the application parameter to approximately evaluate at least one normalized ADC coefficient. The component value is further calculated by decimalizing the normalized ADC coefficient. In another specific embodiment, the component calculator uses an algebraic function of the application parameter to calculate the component value. In some embodiments, the integrated circuit further includes a scaling module configured to scale the component value based on scaling parameters.

Abstract translation: 集成电路包括：组件计算器，被配置为从至少一个应用参数计算高可编程模数转换器（ADC）的至少一个分量值;以及映射模块，被配置为将分量值映射到对应的寄存器设置 基于至少一个工艺参数，其中所述集成电路产生能够编程所述ADC的数字控制信号。 在具体实施例中，组件计算器使用应用参数的归一化表示的代数函数来近似评估至少一个归一化的ADC系数。 通过对归一化的ADC系数进行十进制化，进一步计算分量值。 在另一具体实施例中，组件计算器使用应用参数的代数函数来计算组件值。 在一些实施例中，集成电路还包括缩放模块，其被配置为基于缩放参数来缩放分量值。

公开(公告)号：US20150349637A1

公开(公告)日：2015-12-03

申请号：US14311907

申请日：2014-06-23

Applicant: Analog Devices Global

Inventor： Danzhu Lu ,  Xiaohan Gong ,  Bin Shao

IPC: H02M3/158

CPC classification number: H02M3/158 ,  H03K3/356 ,  H03K19/01721

Abstract: A device to detect an electrical signal is provided. The device includes sensing, output, and pull-down nodes. The device includes a pull-down circuit having a native metal-oxide-semiconductor field-effect transistor (MOSFET) to pull down the output node to approximately a voltage of the pull-down node. The device includes a switch circuit having a junction field-effect transistor (JFET). The JFET turns on the pull-down circuit in response to a voltage of the sensing node being less than a first threshold. The JFET also turns off the pull-down circuit in response to the voltage of the sensing node being greater than the first threshold.

Abstract translation: 提供了一种用于检测电信号的装置。 该设备包括感测，输出和下拉节点。 该器件包括具有天然金属氧化物半导体场效应晶体管（MOSFET）的下拉电路，以将输出节点下拉到大约下拉节点的电压。 该器件包括具有结型场效应晶体管（JFET）的开关电路。 JFET响应于感测节点的电压小于第一阈值而导通下拉电路。 JFET还响应于感测节点的电压大于第一阈值而关断下拉电路。

公开(公告)号：US20150311021A1

公开(公告)日：2015-10-29

申请号：US14278362

申请日：2014-05-15

Applicant: Analog Devices Global

Inventor： Check F. Lee ,  Raymond C. Goggin ,  Padraig L. Fitzgerald ,  Bernard P. Stenson ,  Mark Schirmer ,  Jo-ey Wong

IPC: H01H59/00 ,  B81B7/00 ,  B81C1/00

CPC classification number: H01H59/0009 ,  B81B7/007 ,  B81C1/00341 ,  H01H1/0036 ,  H01H2001/0084

Abstract: A MEMS switch has a base formed from a substrate with a top surface and an insulator layer formed on at least a portion of the top surface. Bonding material secures a cap to the base to form an interior chamber. The cap effectively forms an exterior region of the base that is exterior to the interior chamber. The MEMS switch also has a movable member (in the interior chamber) having a member contact portion, an internal contact (also in the interior chamber), and an exterior contact at the exterior region of the base. The contact portion of the movable member is configured to alternatively contact the interior contact. A conductor at least partially within the insulator layer electrically connects the interior contact and the exterior contact. The conductor is spaced from and electrically isolated from the bonding material securing the cap to the base.

Abstract translation: MEMS开关具有由具有顶表面的基底和形成在顶表面的至少一部分上的绝缘体形成的基底。 接合材料将盖固定到基部以形成内部室。 盖子有效地形成在内部室外部的基部的外部区域。 MEMS开关还具有可移动构件（在内部室中），其具有构件接触部分，内部接触件（也在内部腔室中）以及在基部的外部区域处的外部接触件。 可动构件的接触部分构造成交替地接触内部触点。 至少部分地在绝缘体层内的导体电连接内部触点和外部触点。 导体与将盖固定到基座的接合材料间隔开并与之电隔离。