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    Top level tier management
    432.
    发明授权
    Top level tier management 有权

    公开(公告)号：US10176212B1

    公开(公告)日：2019-01-08

    申请号：US14515466

    申请日：2014-10-15

    Applicant: Seagate Technology LLC

    Inventor： Thomas R Prohofsky

    IPC: G06F17/30

    Abstract: Systems and methods are disclosed for management of a tiered storage system by a top tier storage device. In some embodiments, an apparatus may comprise a circuit configured to maintain an address map at a first storage tier, receive a read request for specified data, return the specified data when the data exists on the first storage tier, and when the specified data does not exist on the first storage tier, return an indication to query a second storage tier. The circuit may be further configured to determine infrequently accessed cold data stored to the first tier, provide to a host device a copy of the cold data stored in an area of the first storage tier scheduled for defragmentation, and perform the defragmentation operation, including copying valid data to an available area of the first storage tier, the valid data not including the cold data.

    POWER DELIVERY NETWORK ANALYSIS OF MEMORY UNIT I/O POWER DOMAIN
    435.
    发明申请
    POWER DELIVERY NETWORK ANALYSIS OF MEMORY UNIT I/O POWER DOMAIN 审中-公开

    公开(公告)号：US20180373302A1

    公开(公告)日：2018-12-27

    申请号：US15633026

    申请日：2017-06-26

    Applicant: Seagate Technology LLC

    Inventor： Nitin Kumar Chhabra ,  Pritesh Mahadev Pawaskar

    IPC: G06F1/32

    Abstract: The disclosed technology provides methods for performing a power delivery network analysis of the memory unit I/O power domain. The methods include performing a signal and power integrity analysis for a memory unit I/O power domain to extract characteristics of a current waveform, determining characteristics of an expected waveform based on a current response for the memory unit I/O power domain, and determining whether the characteristics of the current waveform and the characteristics of the expected waveform are within a tolerance limit. The method also includes various remedial operations and CPM regeneration which may iteratively occur until the waveform matches and final CPM is generated which is use for PDN analysis.

    Optical data communication over variable distances
    436.
    发明授权
    Optical data communication over variable distances 有权

    公开(公告)号：US10164709B2

    公开(公告)日：2018-12-25

    申请号：US15481965

    申请日：2017-04-07

    Applicant: Seagate Technology LLC

    Inventor： Richard C. A. Pitwon ,  David Michael Davis

    IPC: H04B10/114 ,  H04B10/80 ,  G02B26/04 ,  G02B19/00

    Abstract: A system includes a first optical communication interface and a second optical communication interface optically coupled via a free-space communication channel. The interfaces are spaced at variable distances. Each interface includes an optical source to provide a beam of electromagnetic energy and an optical receiver to receive the beam to bi-directionally communicate with the other interface via the channel. The first optical communication interface may be coupled to a sub-chassis. The second optical communication interface may be coupled to a device frame. The device frame may be movably coupled to the chassis. Communication may utilize multi-input, multi-output processing configured by a calibration matrix. A shutter may be positioned to receive the beam or be positioned clear of the beam depending on the distance between the interfaces.

    Individually programmable preamplifier
    437.
    发明授权
    Individually programmable preamplifier 有权

    公开(公告)号：US10164592B1

    公开(公告)日：2018-12-25

    申请号：US14833883

    申请日：2015-08-24

    Applicant: Seagate Technology LLC

    Inventor： Robert Matousek ,  Todd Michael Lammers ,  Thomas Lee Schick

    IPC: H03F3/68 ,  G11B5/09 ,  G11B5/012 ,  G11B20/10

    Abstract: A preamplifier may have a freeze bit that when set, puts the preamplifier in a static state, which prevents the preamplifier from implementing subsequent programming commands. The freeze state may continue until an unfreeze bit is programmed. In a multiple preamplifier system, preamplifiers can be differently and individually configured over a single interface. Preamplifiers may be released from the static state (frozen) by either programming the unfreeze bit (which can release all of the preamps) or by programming the freeze bit to a “0” state (releases the individual preamp). An inversion control circuit can allow inversion of a control signal to a preamplifier. The inversion control circuit may be enabled and disabled based on a physical conductive connection to a logic high voltage or a logic low voltage. One or more programmable control lines can determine whether the inversion function is activated when the inversion control circuit is enabled.

    Dynamic bandwidth reporting for solid-state drives
    440.
    发明授权
    Dynamic bandwidth reporting for solid-state drives 有权

    公开(公告)号：US10156999B2

    公开(公告)日：2018-12-18

    申请号：US15082492

    申请日：2016-03-28

    Applicant: Seagate Technology LLC

    Inventor： Timothy L. Canepa ,  Ramdas P. Kachare

    IPC: G06F3/06 ,  G06F12/02 ,  G06F13/16

    Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a plurality of tables. The controller is generally configured to process a plurality of input/output requests to read/write to/from the memory, track a plurality of statistics of the memory, index the plurality of tables with the plurality of statistics of the memory to determine a plurality of parameters, compute based on the plurality of parameters a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from a host, and report to the host a second bandwidth of the memory that is available to the host based on the first bandwidth consumed by the controller.

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