公开(公告)号：US20110163064A1

公开(公告)日：2011-07-07

申请号：US12716193

申请日：2010-03-02

Applicant: Jae Joon LEE ,  Jin Yong Ahn ,  Suk Hyeon Cho ,  Ki Hwan Kim ,  Seok Kyu Lee

Inventor： Jae Joon LEE ,  Jin Yong Ahn ,  Suk Hyeon Cho ,  Ki Hwan Kim ,  Seok Kyu Lee

IPC: C23F1/00 ,  B32B15/00 ,  B32B37/00 ,  B32B38/10

CPC classification number: H05K3/007 ,  B32B3/10 ,  B32B3/14 ,  B32B3/18 ,  B32B7/04 ,  B32B15/00 ,  B32B15/043 ,  B32B15/08 ,  B32B15/20 ,  B32B27/08 ,  B32B2457/08 ,  H05K3/0097 ,  H05K3/205 ,  H05K2201/0355 ,  Y10T156/10 ,  Y10T156/1052 ,  Y10T428/12 ,  Y10T428/12229 ,  Y10T428/12264 ,  Y10T428/12271 ,  Y10T428/161 ,  Y10T428/19 ,  Y10T428/192 ,  Y10T428/239 ,  Y10T428/24917

Abstract: Disclosed is a carrier for manufacturing a printed circuit board, which includes a first carrier including a first binder having a first opening and a first metal layer formed in the first opening of the first binder, and a second carrier, stacked with the first carrier and including a second binder having a second opening and a second metal layer which is formed in the second opening of the second binder and which partially overlaps with the first metal layer, so that the carrier is simply configured and the binders are formed not only on the lateral surfaces of the metal layers but also on the upper surfaces thereof, thus improving the reliability of bonding of the carrier at the periphery. A method of manufacturing the carrier and a method of manufacturing a printed circuit board using the carrier are also provided.

Abstract translation: 公开了一种用于制造印刷电路板的载体，其包括第一载体，其包括具有第一开口的第一粘合剂和形成在第一粘合剂的第一开口中的第一金属层，以及与第一载体堆叠的第二载体， 包括具有第二开口的第二粘合剂和形成在第二粘合剂的第二开口中并且与第一金属层部分重叠的第二金属层，使得载体被简单地构造，并且粘结剂不仅形成在 金属层的侧面，也在其上表面，从而提高载体在周边的接合的可靠性。 还提供了制造载体的方法和使用该载体制造印刷电路板的方法。

公开(公告)号：US07965521B2

公开(公告)日：2011-06-21

申请号：US12010558

申请日：2008-01-25

Applicant: Mi-Ja Han ,  Han Kim ,  Dae-Hyun Park ,  Jae-Joon Lee

Inventor： Mi-Ja Han ,  Han Kim ,  Dae-Hyun Park ,  Jae-Joon Lee

IPC: H05K9/00

CPC classification number: H01P1/2005 ,  H05K1/0236 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/0969

Abstract: An electromagnetic bandgap structure and a printed circuit board that can solve a mixed signal problem between an analog circuit and a digital circuit are disclosed. In accordance with an embodiment of the present invention, the electromagnetic bandgap structure can include a first metal layer; a first dielectric layer, stacked in the first metal layer; a metal plate, stacked in the first dielectric layer; a via, connecting the first metal layer to the metal plate; a second dielectric layer, stacked in the metal plate and the first dielectric layer; and a second metal layer, stacked in the second dielectric layer. Here, a hole can be formed on the metal plate. With the present invention, the electromagnetic bandgap structure can lower a noise level more within the same frequency band as compared with other structures having the same size.

Abstract translation: 公开了可解决模拟电路和数字电路之间的混合信号问题的电磁带隙结构和印刷电路板。 根据本发明的实施例，电磁带隙结构可以包括第一金属层; 第一介电层，堆叠在第一金属层中; 金属板，堆叠在第一介电层中; 通孔，将所述第一金属层连接到所述金属板; 第二电介质层，堆叠在所述金属板和所述第一介电层中; 和第二金属层，堆叠在第二介电层中。 这里，可以在金属板上形成孔。 利用本发明，与具有相同尺寸的其他结构相比，电磁带隙结构可以在相同频带内更低噪声水平。

公开(公告)号：US20110061905A1

公开(公告)日：2011-03-17

申请号：US12654446

申请日：2009-12-18

Applicant: Mi Sun Hwang ,  Jae Joon Lee ,  Myung Sam Kang

Inventor： Mi Sun Hwang ,  Jae Joon Lee ,  Myung Sam Kang

IPC: H05K1/03 ,  H05K3/36

CPC classification number: H05K3/10 ,  H05K1/0271 ,  H05K1/09 ,  H05K3/4602 ,  H05K2201/0338 ,  H05K2201/0352 ,  H05K2201/068 ,  H05K2201/09136

Abstract: There is provided a printed circuit board. The printed circuit board may be configured to include: a core layer in which a bending prevention portion of at least two layers is interposed between a plurality of insulating members and includes metal layers having different thermal expansion coefficients is disposed; a circuit pattern that is formed so as to have a desired pattern on at least one of the inside of the core layer and an outer face of the core layer; and an insulating layer that is formed on the core layer and includes an opening portion that exposes the circuit pattern, and a method of manufacturing the printed circuit board. According to the above-described printed circuit board and the method of manufacturing the printed circuit board, by disposing a bending prevention portion inside the printed circuit board, a printed circuit board capable of improving the progress rate and the productivity and a method of manufacturing the printed circuit board can be provided.

Abstract translation: 提供了印刷电路板。 印刷电路板可以被构造为包括：芯层，其中至少两层的弯曲防止部分插入在多个绝缘构件之间并且包括具有不同热膨胀系数的金属层; 形成为在芯层的内部和芯层的外表面中的至少一个上具有期望图案的电路图案; 以及形成在芯层上并包括露出电路图案的开口部分的绝缘层，以及制造印刷电路板的方法。 根据上述印刷电路板和印刷电路板的制造方法，通过在印刷电路板内设置弯曲防止部，能够提高进度和生产率的印刷电路板，以及制造印刷电路板的方法 可以提供印刷电路板。

公开(公告)号：US20100148348A1

公开(公告)日：2010-06-17

申请号：US12480291

申请日：2009-06-08

Applicant: Jae-Joon LEE ,  Jin-Yong An ,  Ki-Hwan Kim ,  Seok-Kyu Lee

Inventor： Jae-Joon LEE ,  Jin-Yong An ,  Ki-Hwan Kim ,  Seok-Kyu Lee

IPC: H01L23/498

CPC classification number: H01L23/49822 ,  H01L23/49894 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01078 ,  H01L2924/15174 ,  H05K1/0271 ,  H05K3/3452 ,  H05K3/4682 ,  H05K2201/0191 ,  H05K2201/09972 ,  H05K2203/1572

Abstract: A package substrate is disclosed. The package substrate as a printed circuit board, in which a semiconductor chip is mounted on one side thereof and the other side thereof is mounted on a main board, can include a substrate part, a first pad, which is formed on one side of the substrate part such that the first pad is electrically connected to the semiconductor chip, and a first solder resist layer, which is formed on one surface of the substrate part such that the first pad is exposed. Here, the first solder resist layer is divided into a pad portion and a dummy portion, the first pad is exposed in the pad portion, and the dummy portion is thinner than the pad portion. The package substrate can contribute to the formation of a structure in which thermal expansion coefficients are symmetrical between the top and bottom, thus preventing the warpage.

Abstract translation: 公开了封装衬底。 作为印刷电路板的封装基板，其中半导体芯片安装在其一侧并且另一侧安装在主板上，可以包括基板部分，第一焊盘，其形成在主体的一侧上 基板部分，使得第一焊盘电连接到半导体芯片;以及第一阻焊层，其形成在基板部分的一个表面上，使得第一焊盘露出。 这里，第一阻焊层被分成焊盘部分和虚设部分，第一焊盘暴露在焊盘部分中，并且虚设部分比焊盘部分薄。 封装基板有助于形成热膨胀系数在顶部和底部之间对称的结构，从而防止翘曲。

公开(公告)号：US20100128169A1

公开(公告)日：2010-05-27

申请号：US12382868

申请日：2009-03-25

Applicant: Kwon Ju YI ,  Jae Joon LEE ,  Du Sik PARK

Inventor： Kwon Ju YI ,  Jae Joon LEE ,  Du Sik PARK

IPC: H04N7/01

CPC classification number: H04N7/0125 ,  H04N7/0127 ,  H04N7/014

Abstract: A frame rate conversion apparatus and method for an Ultra-High Definition (UD) image. The frame rate conversion apparatus may store a previous frame and a current frame of an edge of an input image, divided into N images, and insert an interpolation frame between the current frame and the previous frame. Also, the frame rate conversion apparatus may convert a frame rate of each of the N images.

Abstract translation: 一种用于超高清（UD）图像的帧速率转换装置和方法。 帧率转换装置可以将前一帧和输入图像的边缘的当前帧存储为N个图像，并且在当前帧和前一帧之间插入内插帧。 此外，帧速率转换装置可以转换N个图像中的每一个的帧速率。

公开(公告)号：US20100126765A1

公开(公告)日：2010-05-27

申请号：US12569104

申请日：2009-09-29

Applicant: Ki-Hwan KIM ,  Jin-Yong An ,  Jae-Joon Lee

Inventor： Ki-Hwan KIM ,  Jin-Yong An ,  Jae-Joon Lee

IPC: H05K1/11 ,  B32B38/00 ,  B32B38/10 ,  C23F1/00

CPC classification number: H05K3/4007 ,  H05K3/205 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2203/054 ,  Y10T156/1168

Abstract: A method of manufacturing a multi-layer PCB having external contact pads formed on one side can include: forming an outermost insulation layer, in which openings are formed corresponding with the external contact pads; forming a mask, in which openings are formed corresponding with the external contact pad and with a circuit pattern, on the outermost insulation layer; forming the external contact pads and the circuit pattern in the openings of the outermost insulation layer and the openings of the mask; removing the mask; forming a build-up layer by stacking layers over the outermost insulation layer such that the external contact pads and the circuit pattern are covered; forming a first solder resist layer on the build-up layer; and forming a second solder resist layer on an opposite side of the outermost insulation layer; and forming openings in the second solder resist layer such that the external contact pads are exposed.

Abstract translation: 一种制造具有形成在一侧上的外部接触焊盘的多层PCB的方法可以包括：形成最外绝缘层，其中形成对应于外部接触焊盘的开口; 形成掩模，其中在最外绝缘层上形成对应于外部接触焊盘和电路图案的开口; 在外绝缘层的开口和掩模的开口中形成外部接触焊盘和电路图案; 去除面膜; 通过在最外层绝缘层上层叠层来形成堆积层，使得覆盖外部接触焊盘和电路图案; 在积层上形成第一阻焊层; 以及在最外绝缘层的相对侧上形成第二阻焊层; 以及在所述第二阻焊层中形成开口，使得所述外部接触焊盘露出。

公开(公告)号：US07620971B2

公开(公告)日：2009-11-17

申请号：US11168558

申请日：2005-06-29

Applicant: Jae-joon Lee

Inventor： Jae-joon Lee

IPC: G06F7/00

CPC classification number: H04N5/44543 ,  H04N5/44504 ,  H04N21/431 ,  H04N21/4316 ,  H04N21/443 ,  H04N21/47 ,  H04N21/472 ,  H04N21/8153

Abstract: A set-top box, which allows a user to input a key command in real time while displaying an animation sequence on an on-screen display (OSD) screen, and a method of outputting the OSD data of the set-top box is provided. The set-top box includes OSD control module that divides OSD animation data into a plurality of subsets, loads each of the subsets in every operating cycle, determines whether a user has input a key command in every operating cycle, and selectively provides the loaded subsets based on the determination result in every operating cycle, wherein the OSD animation data realizes an animation sequence when displayed. The set-top box further includes a combination control module that receives the loaded subsets of the OSD animation data from the OSD control module and overlays the data onto the decoded broadcast signal and provides the overlaid result to a display device.

Abstract translation: 一种机顶盒，其允许用户在屏幕显示（OSD）屏幕上显示动画序列的同时实时输入键命令，并且提供输出机顶盒的OSD数据的方法 。 机顶盒包括OSD控制模块，其将OSD动画数据分割成多个子集，在每个操作周期中加载每个子集，确定用户是否在每个操作周期中输入了键命令，并且选择性地提供加载的子集 基于每个操作周期中的确定结果，其中OSD动画数据在显示时实现动画序列。 机顶盒还包括组合控制模块，其从OSD控制模块接收OSD动画数据的加载子集，并将数据重叠到解码的广播信号上，并将重叠的结果提供给显示装置。

公开(公告)号：US20090073670A1

公开(公告)日：2009-03-19

申请号：US12076358

申请日：2008-03-17

Applicant: Jong-Kuk Hong ,  Jin-Yong An ,  Jae-Joon Lee

Inventor： Jong-Kuk Hong ,  Jin-Yong An ,  Jae-Joon Lee

IPC: H05K1/14 ,  H05K3/10 ,  H05K3/36 ,  H05K3/42

CPC classification number: H05K1/0271 ,  H05K1/09 ,  H05K3/205 ,  H05K3/207 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/0352 ,  H05K2201/09781 ,  H05K2203/0152 ,  Y10T29/49126 ,  Y10T29/49165

Abstract: A multilayered printed circuit board and a fabricating method thereof are disclosed. A method that includes repeating processes of forming at least one circuit pattern, and at least one insulation layer that covers the circuit pattern, over a carrier and interconnecting circuit patterns on different layers with vias; stacking a metal stiffener over the insulation layer; repeating processes of forming at least one insulation layer and at least one circuit pattern over the stiffener and interconnecting circuit patterns on different layers with vias; and removing the carrier, can be used to reduce warpage in the board and improve workability.

Abstract translation: 公开了一种多层印刷电路板及其制造方法。 一种方法，其包括在载体上形成至少一个电路图案的重复处理和覆盖电路图案的至少一个绝缘层，并且在具有通孔的不同层上互连电路图案; 在绝缘层上堆叠金属加强件; 在加强件上形成至少一个绝缘层和至少一个电路图案的重复工艺，并且在具有通孔的不同层上互连电路图案; 并拆卸载体，可用于减少电路板翘曲，提高可加工性。

公开(公告)号：US20080266026A1

公开(公告)日：2008-10-30

申请号：US12010558

申请日：2008-01-25

Applicant: Mi-Ja Han ,  Han Kim ,  Dae-Hyun Park ,  Jae-Joon Lee

Inventor： Mi-Ja Han ,  Han Kim ,  Dae-Hyun Park ,  Jae-Joon Lee

IPC: H03H7/00

CPC classification number: H01P1/2005 ,  H05K1/0236 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/0969

Abstract: An electromagnetic bandgap structure and a printed circuit board that can solve a mixed signal problem between an analog circuit and a digital circuit are disclosed. In accordance with an embodiment of the present invention, the electromagnetic bandgap structure can include a first metal layer; a first dielectric layer, stacked in the first metal layer; a metal plate, stacked in the first dielectric layer; a via, connecting the first metal layer to the metal plate; a second dielectric layer, stacked in the metal plate and the first dielectric layer; and a second metal layer, stacked in the second dielectric layer. Here, a hole can be formed on the metal plate. With the present invention, the electromagnetic bandgap structure can lower a noise level more within the same frequency band as compared with other structures having the same size.

Abstract translation: 公开了可解决模拟电路和数字电路之间的混合信号问题的电磁带隙结构和印刷电路板。 根据本发明的实施例，电磁带隙结构可以包括第一金属层; 第一介电层，堆叠在第一金属层中; 金属板，堆叠在第一介电层中; 通孔，将所述第一金属层连接到所述金属板; 第二电介质层，堆叠在所述金属板和所述第一介电层中; 和第二金属层，堆叠在第二介电层中。 这里，可以在金属板上形成孔。 利用本发明，与具有相同尺寸的其他结构相比，电磁带隙结构可以在相同频带内更低噪声水平。

公开(公告)号：US20070018335A1

公开(公告)日：2007-01-25

申请号：US11483844

申请日：2006-07-11

Applicant: Seung-Hyun Cho ,  Soon-Jin Cho ,  Jae-Joon Lee ,  Se-Jong Oh

Inventor： Seung-Hyun Cho ,  Soon-Jin Cho ,  Jae-Joon Lee ,  Se-Jong Oh

IPC: H01L23/48

CPC classification number: H01L23/13 ,  H01L23/562 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/1147 ,  H01L2224/16 ,  H01L2924/15162 ,  H01L2924/15311 ,  H01L2924/00014

Abstract: A flip chip BGA board is disclosed, in which each of the corners of the board is removed to minimize warpage of the board due to heat applied during the manufacturing process. Embodiments of the invention allow the production of thin boards by preventing warpage of the board, and may provide a board high in reliability since the risk of the chip being separated from the board is reduced.

Abstract translation: 公开了一种倒装芯片BGA板，其中去除板的每个拐角以最小化由于在制造过程中施加的热而引起的板的翘曲。 本发明的实施例允许通过防止板的翘曲来生产薄板，并且可以提供高可靠性的板，因为芯片与板分离的风险降低。