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    METHODS OF FABRICATING MULTI-LAYER PHASE-CHANGEABLE MEMORY DEVICES
    45.
    发明申请
    METHODS OF FABRICATING MULTI-LAYER PHASE-CHANGEABLE MEMORY DEVICES 有权
    制造多层相变记忆体装置的方法

    公开(公告)号：US20090004773A1

    公开(公告)日：2009-01-01

    申请号：US12189477

    申请日：2008-08-11

    Applicant: Jeong-Hee Park ,  Ju-Chul Park ,  Jun-Soo Bae ,  Bong-Jin Kuh ,  Yong-Ho Ha

    Inventor： Jeong-Hee Park ,  Ju-Chul Park ,  Jun-Soo Bae ,  Bong-Jin Kuh ,  Yong-Ho Ha

    IPC: H01L45/00

    CPC classification number: H01L45/06 ,  G11C13/0004 ,  G11C2213/79 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1625 ,  H01L45/1675

    Abstract: A phase-changeable memory device includes a phase-changeable material pattern and first and second electrodes electrically connected to the phase-changeable material pattern. The first and second electrodes are configured to provide an electrical signal to the phase-changeable material pattern. The phase-changeable material pattern includes a first phase-changeable material layer and a second phase-changeable material layer. The first and second phase-changeable material patterns have different chemical, physical, and/or electrical characteristics. For example, the second phase-changeable material layer may have a greater resistivity than the first phase-changeable material layer. For instance, the first phase-changeable material layer may include nitrogen at a first concentration, and the second phase-changeable material layer may include nitrogen at a second concentration that is greater than the first concentration. Related devices and fabrication methods are also discussed.

    Abstract translation: 可变相存储器件包括相变材料图案，以及电连接到相变材料图案的第一和第二电极。 第一和第二电极被配置为向相变材料图案提供电信号。 相变材料图案包括第一相变材料层和第二相变材料层。 第一和第二可相变材料图案具有不同的化学，物理和/或电特性。 例如，第二相变材料层可以具有比第一相变材料层更大的电阻率。 例如，第一相变材料层可以包括第一浓度的氮，第二相变材料层可以包括大于第一浓度的第二浓度的氮。 还讨论了相关设备和制造方法。

    SHOCK ABSORBING SHOES WITH TRIANGLE SHOCK ABSORBING SPACE
    48.
    发明申请
    SHOCK ABSORBING SHOES WITH TRIANGLE SHOCK ABSORBING SPACE 有权
    具有三角形震动吸收空间的防震鞋

    公开(公告)号：US20140101972A1

    公开(公告)日：2014-04-17

    申请号：US13869127

    申请日：2013-04-24

    Applicant: Yong-ho Ha

    Inventor： Yong-ho Ha

    IPC: A43B13/18

    CPC classification number: A43B13/18 ,  A43B13/181

    Abstract: A shock absorbing shoe with a triangle shock absorbing space, the shoe having an outsole and a midsole, wherein the midsole is divided into upper and lower midsoles, a plurality of upper seating holes provided on opposite sides of the upper midsole behind an area corresponding to an arch region of a foot sole, a plurality of lower seating holes provided on opposite sides of the lower midsole. The shoe includes a shock absorbing means having a body member formed longitudinally between the upper and lower midsoles, and wing members provided on opposite sides of the body member. Each wing member includes an upper inclined portion inclined upwards to be received in the associated upper seating hole, a lower inclined portion inclined downwards to be received in the associated lower seating hole, and a connecting portion connecting the upper and lower inclined portions.

    Abstract translation: 一种具有三角形减震空间的减震鞋，鞋具有外底和中底，其中中底分为上下中底，多个上座位孔设置在上中底的相对侧的对应于 脚底的拱形区域，设置在下部中底的相对侧上的多个下部安置孔。 该鞋包括一个冲击吸收装置，该冲击吸收装置具有纵向形成于上下中底之间的主体构件，以及设置在本体构件的相对侧上的翼构件。 每个翼构件包括向上倾斜以被接收在相关联的上座孔中的上倾斜部分，向下倾斜以被接收在相关联的下安置孔中的下倾斜部分和连接上下倾斜部分的连接部分。

    PHASE CHANGE MEMORY DEVICE
    49.
    发明申请
    PHASE CHANGE MEMORY DEVICE 审中-公开
    相变存储器件

    公开(公告)号：US20110031461A1

    公开(公告)日：2011-02-10

    申请号：US12910672

    申请日：2010-10-22

    Applicant: Myung-Jin KANG ,  Yong-Ho HA ,  Doo-Hwan PARK ,  Jeong-Hee PARK ,  Hee-Ju SHIN

    Inventor： Myung-Jin KANG ,  Yong-Ho HA ,  Doo-Hwan PARK ,  Jeong-Hee PARK ,  Hee-Ju SHIN

    IPC: H01L45/00

    CPC classification number: G11C11/5678 ,  G11C13/0004 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1625 ,  H01L45/1641 ,  H01L45/1683 ,  Y10T428/24273

    Abstract: A method of fabricating a phase change memory device includes forming an opening in a first layer, forming a phase change material in the opening and on the first layer, heating the phase change material to a first temperature that is sufficient to reflow the phase change material in the opening, wherein the first temperature is less than a melting point of the phase change material, and, after heating the phase change material to the first temperature, patterning the phase change material to define a phase change element in the opening.

    Abstract translation: 一种制造相变存储器件的方法包括在第一层中形成开口，在开口和第一层上形成相变材料，将相变材料加热至足以使相变材料回流的第一温度 在所述开口中，其中所述第一温度小于所述相变材料的熔点，并且在将所述相变材料加热到所述第一温度之后，对所述相变材料进行图案化以在所述开口中限定相变元件。

    Phase change memory cell employing a GeBiTe layer as a phase change material layer, phase change memory device including the same, electronic system including the same and method of fabricating the same
    50.
    发明授权
    Phase change memory cell employing a GeBiTe layer as a phase change material layer, phase change memory device including the same, electronic system including the same and method of fabricating the same 有权
    使用GeBiTe层作为相变材料层的相变存储单元，包括该相变材料层的相变存储器件，包括该GeBiTe层的相变材料层的电子系统及其制造方法

    公开(公告)号：US07817464B2

    公开(公告)日：2010-10-19

    申请号：US11747395

    申请日：2007-05-11

    Applicant: Bong-Jin Kuh ,  Yong-Ho Ha ,  Doo-Hwan Park ,  Jeong-Hee Park ,  Han-Bong Ko

    Inventor： Bong-Jin Kuh ,  Yong-Ho Ha ,  Doo-Hwan Park ,  Jeong-Hee Park ,  Han-Bong Ko

    IPC: G11C11/00

    CPC classification number: H01L45/144 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2213/72 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1625

    Abstract: A phase change memory cell includes an interlayer insulating layer formed on a semiconductor substrate, and a first electrode and a second electrode disposed in the interlayer insulating layer. A phase change material layer is disposed between the first and second electrodes. The phase change material layer may be an undoped GeBiTe layer, a doped GeBiTe layer containing an impurity or a doped GeTe layer containing an impurity. The undoped GeBiTe layer has a composition ratio within a range surrounded by four points (A1(Ge21.43, Bi16.67, Te61.9), A2(Ge44.51, Bi0.35, Te55.14), A3(Ge59.33, Bi0.5, Te40.17) and A4(Ge38.71, Bi16.13, Te45.16)) represented by coordinates on a triangular composition diagram having vertices of germanium (Ge), bismuth (Bi) and tellurium (Te). The doped GeBiTe layer contains an impurity and has a composition ratio within a range surrounded by four points (D1(Ge10, Bi20, Te70), D2(Ge30, Bi0, Te70), D3(Ge70, Bi0, Te30) and D4(Ge50, Bi20, Te30)) represented by coordinates on the triangular composition diagram.

    Abstract translation: 相变存储单元包括形成在半导体衬底上的层间绝缘层和设置在层间绝缘层中的第一电极和第二电极。 相变材料层设置在第一和第二电极之间。 相变材料层可以是未掺杂的GeBiTe层，包含杂质的掺杂GeBiTe层或含有杂质的掺杂GeTe层。 未掺杂的GeBiTe层的组成比在四个点（A1（Ge21.43，Bi16.67，Te61.9），A2（Ge44.51，Bi0.35，Te55.14），A3（Ge59）， 33，Bi0.5，Te40.17）和A4（Ge38.71，Bi16.13，Te45.16）），由具有锗（Ge），铋（Bi）和碲（Te ）。 掺杂的GeBiTe层包含杂质，其组成比在四个点（D1（Ge10，Bi20，Te70），D2（Ge30，Bi0，Te70），D3（Ge70，Bi0，Te30）和D4（Ge50 ，Bi20，Te30））。

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