摘要:
A method for selectively removing nano-crystals on an insulating layer. The method includes providing an insulating layer with nano-crystals thereon; exposing the nano-crystals to a high density plasma comprising a source of free radical chlorine, ionic chlorine, or both to modify the nano-crystals; and removing the modified nano-crystals with a wet etchant.
摘要:
Microfeature dies with porous regions, and associated methods and systems are disclosed. A method in accordance with one embodiment of the invention includes forming a porous region between a die and a remainder portion of a microfeature workpiece, and separating the die from the remainder portion by removing at least a portion of the porous region. For example, the die can be removed from the remainder portion by making a cut at the porous region (e.g., with a rotating saw blade), etching material from the porous region, or directing a water jet at the porous region. In other embodiments, a porous region of the microfeature workpiece can receive conductive material to form a conductive pathway (e.g., a line and/or via) in the workpiece. In still further embodiments, the porous regions of the workpiece can be formed electrolytically with electrodes that are spaced apart from the workpiece and/or support relative movement between the electrodes and the workpiece.
摘要:
A signage device (10) in which a housing (12) receives a circuit board (30) having a plurality of spaced-apart light sources (38) to define at least one symbol and a light-blocking sheet (60) having a message channel with opposing adjacent spaced-apart side walls. A light emitting surface closes a distal portion of the message channel, wherein light from the light sources communicates from the light emitting surface of the message channel.
摘要:
Improved methods and structures are provided for an array of vertical geometries which may be used as emitter tips, as a self aligned gate structure surrounding field emitter tips, or as part of a flat panel display. The present invention offers controlled size in emitter tip formation under a more streamlined process. The present invention further provides a more efficient method to control the gate to emitter tip proximity in field emission devices. The novel method of the present invention includes implanting a dopant in a patterned manner into the silicon substrate and anodizing the silicon substrate in a controlled manner causing a more heavily doped region in the silicon substrate to form a porous silicon region.
摘要:
A cationic-stabilized dispersion for use in fabricating an in-mold coated article including at least one of a cationic-stabilized polyurethane dispersion, a cationic-stabilized acrylic dispersion, a cationic-stabilized polyacrylamide dispersion, a cationic-stabilized polyallylamine dispersion, a cationic-stabilized polyetheramine dispersion, and a cationic-stabilized chitosan dispersion.
摘要:
A cationic-stabilized dispersion for use in fabricating an in-mold coated article including at least one of a cationic-stabilized polyurethane dispersion, a cationic-stabilized acrylic dispersion, a cationic-stabilized polyacrylamide dispersion, a cationic-stabilized polyallylamine dispersion, a cationic-stabilized polyetheramine dispersion, and a cationic-stabilized chitosan dispersion.
摘要:
A cationic-stabilized dispersion for use in fabricating an in-mold coated article including at least one of a cationic-stabilized polyurethane dispersion, a cationic-stabilized acrylic dispersion, a cationic-stabilized polyacrylamide dispersion, a cationic-stabilized polyallylamine dispersion, a cationic-stabilized polyetheramine dispersion, and a cationic-stabilized chitosan dispersion.
摘要:
An electrolyte solution, methods, and systems for selectively removing a conductive metal from a substrate are provided. The electrolyte solution comprising nanoparticles that are more noble than the conductive metal being removed, is applied to a substrate to remove the conductive metal selectively relative to a dielectric material without application of an external potential or contact of a processing pad with a surface of the substrate. The solutions and methods can be applied, for example, to remove a conductive metal layer (e.g., barrier metal) selectively relative to a dielectric material and to a materially different conductive metal (e.g., copper interconnect) without application of an external potential or contact of a processing pad with the surface of the substrate.
摘要:
Methods for reducing line roughness of spacers and other features utilizing a non-plasma and non-wet etch fluoride processing technology are provided. Embodiments of the methods can be used for spacer or line reduction and/or smoothing the surfaces along the edges of such features through the reaction and subsequent removal of material.
摘要:
Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC. The combined pattern made out by the first pattern and the second pattern is transferred to an underlying amorphous silicon layer and the pattern is subjected to a carbon strip to remove BARC and photoresist material. The combined pattern is then transferred to the silicon oxide layer and then to an amorphous carbon mask layer. The combined mask pattern, having features of difference sizes, is then etched into the underlying substrate through the amorphous carbon hard mask layer.