公开(公告)号：US20110103128A1

公开(公告)日：2011-05-05

申请号：US12882685

申请日：2010-09-15

申请人： Hiroshi Kanno ,  Reika Ichihara ,  Takayuki Tsukamoto ,  Kenichi Murooka ,  Hirofumi Inoue

发明人： Hiroshi Kanno ,  Reika Ichihara ,  Takayuki Tsukamoto ,  Kenichi Murooka ,  Hirofumi Inoue

IPC分类号： G11C11/00 ,  G11C7/00

CPC分类号： G11C7/02 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/0064 ,  G11C13/0097 ,  G11C2213/31 ,  G11C2213/71 ,  G11C2213/72

摘要： Nonvolatile semiconductor memory device of an embodiment includes: a memory cell array including a plurality of first and second lines intersecting each other and plural memory cells provided at intersections of the first and second lines and having data written and erased upon application of voltages of the same polarity; and a writing circuit configured to select first and second lines and supply a set or reset pulse to the memory cell through the selected first and second lines. In an erase operation, the writing circuit repeatedly supplies the reset pulse to a selected memory cell until data is erased, by increasing or decreasing voltage level and voltage application time of the reset pulse within a reset region. The reset region, or an aggregate of combinations of voltage level and voltage application time of the reset pulse, is a region where voltage level and voltage application time are negatively correlated.

摘要翻译： 一个实施例的非易失性半导体存储器件包括：存储单元阵列，包括彼此相交的多个第一和第二线，以及设置在第一和第二线的交点处的多个存储单元，并且在施加相同的电压时写入和擦除数据 极性; 以及写入电路，被配置为选择第一和第二行，并且通过所选择的第一和第二行向存储器单元提供置位或复位脉冲。 在擦除操作中，写入电路通过增加或减小复位区域内的复位脉冲的电压电平和电压施加时间，将复位脉冲重复地提供给所选择的存储单元，直到数据被擦除。 复位区域或复位脉冲的电压电平和电压施加时间的组合的总和是电压电平和电压施加时间呈负相关的区域。

公开(公告)号：US07646689B2

公开(公告)日：2010-01-12

申请号：US11337094

申请日：2006-01-23

申请人： Norio Hatanaka ,  Ryoichi Ishikawa ,  Hirofumi Inoue

发明人： Norio Hatanaka ,  Ryoichi Ishikawa ,  Hirofumi Inoue

IPC分类号： G11B7/00

CPC分类号： G11B19/12

摘要： To discriminate a disk in a short time, a calculating part 16 measures an amplitude of one of a focus error signal and a tracking error signal, which are output from a differential signal generating part 15, several times, and outputs the measured amplitudes to a controller 20. The controller 20 compares the input amplitudes with threshold values stored in a memory 21, respectively, and determines whether or not an amplification gain of one of the focus error signal and the tracking error signal is changed. If it is determined that the amplification gain of one of the focus error signal and the tracking error signal is changed, the controller 20 changes the amplification gain of one of the focus error signal and the tracking error signal to an amplification gain represented by one of the threshold values and discriminates the kind of an optical disk based on the changed amplification gain.

摘要翻译： 为了在短时间内识别盘，计算部16测量从差分信号生成部15输出的多次的聚焦误差信号和跟踪误差信号之一的振幅，并将测得的振幅输出到 控制器20分别将输入幅度与存储在存储器21中的阈值进行比较，并确定聚焦误差信号和跟踪误差信号之一的放大增益是否改变。 如果确定聚焦误差信号和跟踪误差信号之一的放大增益改变，则控制器20将聚焦误差信号和跟踪误差信号之一的放大增益改变为由 阈值并基于改变的放大增益来鉴别光盘的种类。

公开(公告)号：US20090305152A1

公开(公告)日：2009-12-10

申请号：US12478408

申请日：2009-06-04

申请人： Ryoichi INANAMI ,  Shinji Mikami ,  Hirofumi Inoue

发明人： Ryoichi INANAMI ,  Shinji Mikami ,  Hirofumi Inoue

IPC分类号： G03F7/20

CPC分类号： G03F7/0002 ,  B82Y10/00 ,  B82Y40/00 ,  G03F9/7076

摘要： A semiconductor device manufacturing method has forming a first resist pattern on the semiconductor substrate, and then, forming a first pattern on the semiconductor substrate by the use of the first resist pattern, and forming a second resist pattern on the semiconductor substrate by using an imprinter, and then, forming a second pattern on the semiconductor substrate by the use of the second resist pattern. The forming the first pattern, the first pattern smaller than a design pattern corresponding to the design data for forming a plurality of patterns on a semiconductor substrate being formed.

摘要翻译： 半导体器件制造方法在半导体衬底上形成第一抗蚀剂图案，然后通过使用第一抗蚀剂图案在半导体衬底上形成第一图案，并通过使用打印机在半导体衬底上形成第二抗蚀剂图案 ，然后通过使用第二抗蚀剂图案在半导体衬底上形成第二图案。 形成第一图案，第一图案小于与形成在半导体衬底上形成多个图案的设计数据相对应的设计图案。

公开(公告)号：US20090137112A1

公开(公告)日：2009-05-28

申请号：US12275741

申请日：2008-11-21

申请人： Hideyuki TABATA ,  Hirofumi Inoue ,  Hiroyuki Nagashima ,  Kohichi Kubo

发明人： Hideyuki TABATA ,  Hirofumi Inoue ,  Hiroyuki Nagashima ,  Kohichi Kubo

IPC分类号： H01L21/768

CPC分类号： H01L27/2418 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/147 ,  H01L45/1675

摘要： A method of manufacturing nonvolatile semiconductor memory devices comprises forming a first wiring material; and stacking memory cell materials on the first wiring material, which configure memory cells each including a variable resistor operative to nonvolatilely store information in accordance with variation in resistance. The method also comprises forming a plurality of first parallel trenches in the first wiring material and the stacked memory cell materials, the first trenches extending in a first direction, thereby forming first lines extending in the first direction and memory cell materials self-aligned with the first lines and separated by the first trenches. The method further comprises burying an interlayer insulator in the first trenches to form a block body and stacking a second wiring material on the block body. The method also comprises forming a plurality of second parallel trenches in the block body with the second wiring material stacked thereon, the second trenches extending in a second direction crossing the first direction and having a depth reaching the upper surface of the first wiring material, thereby forming second lines extending in the second direction and memory cells self-aligned with the second lines and separated by the first and second trenches.

摘要翻译： 制造非易失性半导体存储器件的方法包括：形成第一布线材料; 以及在第一布线材料上堆叠存储单元材料，其构造每个包括可变电阻器的存储单元，其可操作以根据电阻的变化来非易失性地存储信息。 该方法还包括在第一布线材料和堆叠的存储单元材料中形成多个第一平行沟槽，第一沟槽沿第一方向延伸，从而形成沿第一方向延伸的第一线和与第一方向自对准的存储单元材料 第一条线和第一条沟分开。 该方法还包括在第一沟槽中埋设层间绝缘体以形成块体并将第二布线材料堆叠在块体上。 该方法还包括在堆叠在其上的第二布线材料的块体中形成多个第二平行沟槽，第二沟槽沿与第一方向交叉的第二方向延伸并且具有到达第一布线材料的上表面的深度，从而 形成沿着第二方向延伸的第二线和与第二线自对准并由第一和第二沟槽隔开的存储器单元。

公开(公告)号：US20090121398A1

公开(公告)日：2009-05-14

申请号：US12089441

申请日：2006-09-21

申请人： Hirofumi Inoue

发明人： Hirofumi Inoue

IPC分类号： B60G17/00

CPC分类号： F16F15/03 ,  B60G13/16 ,  B60G15/067 ,  B60G17/0157 ,  B60G17/06 ,  B60G2202/12 ,  B60G2202/20 ,  B60G2202/25 ,  B60G2202/312 ,  B60G2202/42 ,  B60G2202/441 ,  B60G2204/418 ,  B60G2204/4232 ,  B60G2204/4502 ,  B60G2206/41 ,  B60G2400/102 ,  B60G2400/252 ,  B60G2401/14 ,  B60G2500/10 ,  B60G2600/184 ,  B60G2600/26 ,  F16F2232/06

摘要： An electromagnetic shock absorber including: (a) a wheel-side member; (b) a body-side member movable relative to the wheel-side member; and (c) a damping force generator with an electromagnetic motor including stationary and movable elements movable relative to each other. The damping force generator can generate, based on a force generated by the motor, a damping force acting against a relative movement of the wheel-side member and the body-side member. The motor has an axis extending in a both-members-relative-movement direction as a direction of the above-described relative movement. The stationary element is supported by the wheel-side member via an elastic body, to be movable relative to the wheel-side member in the both-members-relative-movement direction. The electromagnetic motor allows relative movement of the stationary element and the movable element upon movement of the stationary element relative to the wheel-side member.

摘要翻译： 一种电磁减震器，包括：（a）轮侧构件; （b）相对于轮侧构件可移动的主体侧构件; 和（c）具有电磁马达的阻尼力发生器，其包括可相对于彼此移动的固定和可移动元件。 阻尼力发生器可以基于由电动机产生的力产生抵抗轮侧构件和车身侧构件的相对运动的阻尼力。 马达具有作为上述相对运动的方向以两个构件相对移动方向延伸的轴线。 固定件通过弹性体由轮侧构件支撑，能够相对于车轮侧构件在两构件相对移动方向上移动。 当静止元件相对于轮侧构件移动时，电磁马达允许静止元件和可动元件相对运动。

公开(公告)号：US20090054577A1

公开(公告)日：2009-02-26

申请号：US12279435

申请日：2007-03-16

申请人： Hiroshi Uchida ,  Hirofumi Inoue

发明人： Hiroshi Uchida ,  Hirofumi Inoue

IPC分类号： C08L71/00 ,  C08L77/00 ,  C08L67/00 ,  C08K3/22 ,  C08K3/30 ,  C08K3/34 ,  C08K3/26 ,  C08L63/00 ,  C08L61/00 ,  C08L83/00 ,  C09D11/00

CPC分类号： H05K3/285 ,  C08L71/03 ,  C09D7/47 ,  C09D7/65 ,  C09D11/52 ,  H05K2201/015 ,  H05K2201/0209 ,  H05K2201/0212

摘要： The invention relates to a thermosetting resin composition comprising (A) 20 to 90 mass % of thermosetting resin, (B) 10 to 80 mass % of inorganic and/or organic fine particles and (C) 0.1 to 5 mass % of fluorine-containing polyether, wherein (C) is polymer having fluorinated alkyl polyoxetane structure of formula (1) or (2), (m is an integer of 1 to 100, n is an integer of 1 to 6, R1 represents a hydrogen atom or an alkyl group having 1 to 6 carbon atoms, R2 and R3 each represent a straight or branched chain alkyl group having 1 to 20 carbon atoms, with a proviso that at least 50% of hydrogen atoms present in the alkyl group is substituted by fluorine and the other hydrogen atoms are substituted by hydrogen, iodine, chlorine or bromine atoms) or a composition containing copolymer which consists of monomer having fluorinated alkyl polyoxetane structure and oxygen-containing monomer having 2 to 6 carbon atoms.

摘要翻译： 本发明涉及一种热固性树脂组合物，其包含（A）20-90质量％的热固性树脂，（B）10至80质量％的无机和/或有机细颗粒和（C）0.1至5质量％的含氟 聚醚，其中（C）为具有式（1）或（2）的氟化烷基聚氧杂环丁烷结构的聚合物，（m为1〜100的整数，n为1〜6的整数，R1为氢原子或烷基 具有1至6个碳原子的基团，R 2和R 3各自表示具有1至20个碳原子的直链或支链烷基，条件是存在于烷基中的至少50％的氢原子被氟取代，而另一个 氢原子被氢，碘，氯或溴原子取代）或含有共聚物的组合物，其由具有氟代烷基聚氧杂环丁烷结构的单体和含有2-6个碳原子的含氧单体组成。

公开(公告)号：US20090026989A1

公开(公告)日：2009-01-29

申请号：US12278456

申请日：2006-11-15

申请人： Tomoo Kubota ,  Hirofumi Inoue

发明人： Tomoo Kubota ,  Hirofumi Inoue

IPC分类号： H02P21/05

CPC分类号： F16F15/03 ,  B60G17/0157 ,  B60G2202/42 ,  B60G2204/4193 ,  F16F2232/04 ,  H02P21/00 ,  H02P21/0089 ,  H02P21/06 ,  H02P21/22 ,  H02P25/06 ,  H02P25/062

摘要： In an electromagnetic suspension device comprising one member (1), the other member (2) adapted to perform a relative motion with respect to the one member (1), and a motor (M) capable of at least suppressing the relative motion, and wherein electric current values id and iq of d and q phases are determined using dq conversion from electric currents iv and iu flowing in the motor (M) and an electrical angle θ of a rotor, and the motor (M) is controlled on the basis of both d-phase voltage command value Vd1 and q-phase voltage command value Vq1, the improvement characterized by further comprising correction means (23) for correcting the d-phase voltage command value Vd1 on the basis of both q-phase electric current iq and electrical angular velocity ω of the rotor and correcting the q-phase voltage command value Vq1 on the basis of both d-phase electric current id and electrical angular velocity ω of the rotor.

摘要翻译： 在包括一个构件（1）的电磁悬挂装置中，适于相对于一个构件（1）执行相对运动的另一构件（2）和能够至少抑制相对运动的马达（M），以及 其中d和q相的电流值id和iq使用从在电动机（M）中流动的电流iv和iu以及转子的电角度θ的dq转换来确定，并且马达（M）基于 两相电压指令值Vd1和q相电压指令值Vq1两者的改进特征在于还包括用于基于q相电流iq校正d相电压指令值Vd1的校正装置（23） 和转子的电角速度ω，并且基于转子的d相电流id和电角速度ω来校正q相电压指令值Vq1。

公开(公告)号：US20070085125A1

公开(公告)日：2007-04-19

申请号：US11638492

申请日：2006-12-14

申请人： Hirofumi Inoue ,  Masahito Shinohe

发明人： Hirofumi Inoue ,  Masahito Shinohe

IPC分类号： H01L29/94

CPC分类号： H01L21/76877 ,  H01L21/76849 ,  H01L27/10867

摘要： A trench capacitor is formed in a semiconductor substrate with a capacitor insulating film. The trench has a conductive layer as storage node electrode buried in a trench. The conductive layer includes a first, a second, and third conductive layer. The first conductive layer is buried in a lower portion of the trench. The second conductive layer is buried in a recess on the upper surface of the first conductive layer. The third conductive layer is buried to contact with the first and second conductive layers.

摘要翻译： 在具有电容器绝缘膜的半导体衬底中形成沟槽电容器。 沟槽具有作为存储节点电极的导电层，埋入沟槽中。 导电层包括第一，第二和第三导电层。 第一导电层被埋在沟槽的下部。 第二导电层被埋在第一导电层的上表面上的凹部中。 掩埋第三导电层以与第一和第二导电层接触。

公开(公告)号：US20060243978A1

公开(公告)日：2006-11-02

申请号：US11412921

申请日：2006-04-28

申请人： Mikio Wakamiya ,  Junichi Shiozawa ,  Hirofumi Inoue ,  Mitsuru Sato

发明人： Mikio Wakamiya ,  Junichi Shiozawa ,  Hirofumi Inoue ,  Mitsuru Sato

IPC分类号： H01L29/04

CPC分类号： H01L27/115 ,  H01L27/10832 ,  H01L27/10861 ,  H01L27/11521 ,  H01L29/40114

摘要： A semiconductor device includes an amorphous silicon film having a principal plane and an insulating film formed by supplying radical oxygen onto the principal plane of the amorphous silicon film.

摘要翻译： 半导体器件包括具有主平面的非晶硅膜和通过在非晶硅膜的主平面上供应自由基氧而形成的绝缘膜。

公开(公告)号：US20060231956A1

公开(公告)日：2006-10-19

申请号：US11402919

申请日：2006-04-13

申请人： Itaru Kawabata ,  Hirofumi Inoue

发明人： Itaru Kawabata ,  Hirofumi Inoue

IPC分类号： H01L23/52

CPC分类号： H01L23/53295 ,  H01L21/76802 ,  H01L21/76829 ,  H01L23/5226 ,  H01L27/10882 ,  H01L27/10885 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a first insulating film having a plurality of wiring trenches formed at predetermined intervals in an upper part, the first insulating film having an upper surface, a second insulating film formed on the upper surface of the first insulating film so as to be located between the wiring trenches, the second insulating film having an upper surface, a wiring layer buried in the wiring trenches and formed so that an upper surface thereof is located lower than an upper surface of the second insulating film, and a via plug formed so as to be connected to the upper surface of the wiring layer.

摘要翻译： 半导体器件包括：第一绝缘膜，具有在上部形成有规定间隔的多个布线沟槽，第一绝缘膜具有上表面，第二绝缘膜形成在第一绝缘膜的上表面上， 位于布线沟槽之间，第二绝缘膜具有上表面，布线层埋设在布线沟槽中并且形成为使得其上表面位于比第二绝缘膜的上表面更低的通孔塞 以连接到布线层的上表面。