Abstract:
Determination of one or more optical characteristics of a structure of a semiconductor wafer includes measuring one or more optical signals from one or more structures of a sample, determining a background optical field associated with a reference structure having a selected set of nominal characteristics based on the one or more structures, determining a correction optical field suitable for at least partially correcting the background field, wherein a difference between the measured one or more optical signals and a signal associated with a sum of the correction optical field and the background optical field is below a selected tolerance level, and extracting one or more characteristics associated with the one or more structures utilizing the correction optical field.
Abstract:
Various metrology systems and methods are provided. One metrology system includes a light source configured to produce a diffraction-limited light beam, an apodizer configured to shape the light beam in the entrance pupil of illumination optics, and optical elements configured to direct the diffraction-limited light beam from the apodizer to an illumination spot on a grating target on a wafer and to collect scattered light from the grating target. The metrology system further includes a field stop and a detector configured to detect the scattered light that passes through the field stop. In addition, the metrology system includes a computer system configured to determine a characteristic of the grating target using output of the detector.
Abstract:
A dual-column-parallel image CCD sensor utilizes a dual-column-parallel readout circuit including two pairs of cross-connected transfer gates to alternately transfer pixel data (charges) from a pair of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the two adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at twice the line clock rate to pass the image charges to the shared output circuit. A symmetrical Y-shaped diffusion is utilized in one embodiment to merge the image charges from the two pixel columns. A method of driving the dual-column-parallel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the dual-column-parallel CCD sensor is also described.
Abstract:
An electron source is formed on a silicon substrate having opposing first and second surfaces. At least one field emitter is prepared on the second surface of the silicon substrate to enhance the emission of electrons. To prevent oxidation of the silicon, a thin, contiguous boron layer is disposed directly on the output surface of the field emitter using a process that minimizes oxidation and defects. The field emitter can take various shapes such as pyramids and rounded whiskers. One or several optional gate layers may be placed at or slightly lower than the height of the field emitter tip in order to achieve fast and accurate control of the emission current and high emission currents. The field emitter can be p-type doped and configured to operate in a reverse bias mode or the field emitter can be n-type doped.
Abstract:
An image sensor for electrons or short-wavelength light includes a semiconductor membrane, circuit elements formed on one surface of the semiconductor membrane, and a pure boron layer on the other surface of the semiconductor membrane. The circuit elements are connected by metal interconnects comprising a refractory metal. An anti-reflection or protective layer may be formed on top of the pure boron layer. This image sensor has high efficiency and good stability even under continuous use at high flux for multiple years. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor.
Abstract:
A multiple-column-per-channel image CCD sensor utilizes a multiple-column-per-channel readout circuit including connected transfer gates that alternately transfer pixel data (charges) from a group of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at multiple times the line clock rate to pass the image charges to the shared output circuit. A symmetrical fork-shaped diffusion is utilized in one embodiment to merge the image charges from the group of related pixel columns. A method of driving the multiple-column-per-channel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the multiple-column-per-channel CCD sensor is also described.
Abstract:
An inspection system/method in which first optics direct continuous wave (CW) light at 181-185 nm to an inspected article, and second optics redirect image information affected by the article to detectors. A laser assembly generates the CW light by generating fourth harmonic light from first fundamental CW light having a first wavelength between 1 and 1.1 μm, generating fifth harmonic light by mixing the fourth harmonic light with the first fundamental CW light, and mixing the fifth harmonic light with second light having a second wavelength between 1.26 and 1.82 μm. An external cavity mixes the first light and the fourth harmonic light using a first nonlinear crystal. The CW light is generated using a second cavity that passes circulated second fundamental or signal CW light through a second nonlinear crystal, and directing the fifth harmonic light through the second nonlinear crystal.
Abstract:
A focusing EBCCD includes a control device positioned between a photocathode and a CCD. The control device has a plurality of holes therein, wherein the plurality of holes are formed perpendicular to a surface of the photocathode, and wherein a pattern of the plurality of holes is aligned with a pattern of pixels in the CCD. Each hole is surrounded by at least one first electrode, which is formed on a surface of the control device facing the photocathode. The control device may include a plurality of ridges between the holes. The control device may be separated from the photocathode by approximately half a shorter dimension of a CCD pixel or less. A plurality of first electrodes may be provided, wherein each first electrode surrounds a given hole and is separated from the given hole by a gap.
Abstract:
A wafer scanning system includes imaging collection optics to reduce the effective spot size. Smaller spot size decreases the number of photons scattered by the surface proportionally to the area of the spot. Air scatter is also reduced. TDI is used to produce a wafer image based on a plurality of image signals integrated over the direction of linear motion of the wafer. An illumination system floods the wafer with light, and the task of creating the spot is allocated to the imaging collection optics.
Abstract:
Pixel aperture size adjustment in a linear sensor is achieved by applying more negative control voltages to central regions of the pixel's resistive control gate, and applying more positive control voltages to the gate's end portions. These control voltages cause the resistive control gate to generate an electric field that drives photoelectrons generated in a selected portion of the pixel's light sensitive region into a charge accumulation region for subsequent measurement, and drives photoelectrons generated in other portions of the pixel's light sensitive region away from the charge accumulation region for subsequent discard or simultaneous readout. A system utilizes optics to direct light received at different angles or locations from a sample into corresponding different portions of each pixel's light sensitive region. Multiple aperture control electrodes are selectively actuated to collect/measure light received from either narrow or wide ranges of angles or locations, thereby enabling rapid image data adjustment.