公开(公告)号：US20210280433A1

公开(公告)日：2021-09-09

申请号：US17250326

申请日：2019-07-03

Applicant: Lam Research Corporation

Inventor： Ivan L. Berry, III ,  Thorsten Lill ,  Andreas Fischer

IPC: H01L21/3213 ,  H01L21/311 ,  H01L21/67 ,  H01L21/3065

Abstract: Disclosed are apparatuses and methods for performing atomic layer etching. A method may include modifying one or more surface layers of material on the substrate and exposing the one or more modified surface layers on the substrate to an electron source thereby removing, without using a plasma, the one or more modified surface layers on the substrate. An apparatus may include a processing chamber, a process gas unit, an electron source, and a controller with instructions configured to cause the process gas unit to flow a first process gas to a substrate in a chamber interior, the first process gas is configured to modify one or more layers of material on the substrate, and to cause the electron source to generate electrons and expose the one or more modified surface layers on the substrate to the electrons, the one or more modified surface layers being removed, without using a plasma.

公开(公告)号：US20190198345A1

公开(公告)日：2019-06-27

申请号：US16289428

申请日：2019-02-28

Applicant: Lam Research Corporation

Inventor： Andreas Fischer ,  Thorsten Lill ,  Richard Janek ,  John Boniface

IPC: H01L21/311 ,  H01J37/32 ,  C23F4/00 ,  C23F1/12 ,  C23F1/00 ,  C23C16/02 ,  H01L21/3065 ,  H01L21/3213

CPC classification number: H01L21/31122 ,  B81C2201/0135 ,  B81C2201/0142 ,  C23C16/0245 ,  C23F1/00 ,  C23F1/12 ,  C23F4/00 ,  H01J37/32009 ,  H01J37/32082 ,  H01J2237/334 ,  H01L21/30655 ,  H01L21/32136

Abstract: A method for performing atomic layer etching (ALE) on a substrate, including the following method operations: performing a surface modification operation on a surface of the substrate, the surface modification operation configured to convert at least one monolayer of the substrate surface to a modified layer; performing a removal operation on the substrate surface, to remove the modified layer from the substrate surface, wherein removing the modified layer includes exposing the substrate surface to a metal complex, such that a ligand exchange reaction occurs between the metal complex and converted species of the modified layer; performing, following the removal operation, a plasma treatment on the substrate surface, the plasma treatment configured to remove residues formed from the exposure of the substrate surface to the metal complex, wherein the residues are volatilized by the plasma treatment; repeating the foregoing operations until a predefined thickness has been etched from the substrate surface.

公开(公告)号：US20190157105A1

公开(公告)日：2019-05-23

申请号：US16255606

申请日：2019-01-23

Applicant: Lam Research Corporation

Inventor： Andreas Fischer ,  Thorsten Lill ,  Richard Janek

IPC: H01L21/3213 ,  H01L21/326 ,  H01L21/311 ,  H01L21/225 ,  H01L21/02 ,  H01L21/67

Abstract: A method for performing atomic layer etching (ALE) on a substrate is provided, including the following operations: performing a surface modification operation on a substrate surface, the surface modification operation configured to convert at least one monolayer of the substrate surface to a modified layer, wherein a bias voltage is applied during the surface modification operation, the bias voltage configured to control a depth of the substrate surface that is converted by the surface modification operation; performing a removal operation on the substrate surface, the removal operation configured to remove at least a portion of the modified layer from the substrate surface, wherein removing the portion of the modified layer includes applying thermal energy to effect desorption of the portion of the modified layer. A plasma treatment can be performed to remove residues from the substrate surface following the removal operation.

公开(公告)号：US20180366343A9

公开(公告)日：2018-12-20

申请号：US15615691

申请日：2017-06-06

Applicant: Lam Research Corporation

Inventor： Andreas Fischer ,  Thorsten Lill ,  Richard Janek

IPC: H01L21/3213 ,  H01L21/225 ,  H01L21/326 ,  H01L21/02 ,  H01L21/311

CPC classification number: H01L21/32136 ,  H01L21/0206 ,  H01L21/02068 ,  H01L21/225 ,  H01L21/31122 ,  H01L21/32138 ,  H01L21/326 ,  H01L21/67

Abstract: A method for performing atomic layer etching (ALE) on a substrate is provided, including the following operations: performing a surface modification operation on a substrate surface, the surface modification operation configured to convert at least one monolayer of the substrate surface to a modified layer, wherein a bias voltage is applied during the surface modification operation, the bias voltage configured to control a depth of the substrate surface that is converted by the surface modification operation; performing a removal operation on the substrate surface, the removal operation configured to remove at least a portion of the modified layer from the substrate surface, wherein removing the portion of the modified layer is effected via a ligand exchange reaction that is configured to volatilize the portion of the modified layer. A plasma treatment can be performed to remove residues from the substrate surface following the removal operation.

公开(公告)号：US20170170036A1

公开(公告)日：2017-06-15

申请号：US15432689

申请日：2017-02-14

Applicant: Lam Research Corporation

Inventor： Andreas Fischer ,  Thorsten Lill

IPC: H01L21/67 ,  H05G2/00 ,  H01L21/66 ,  H01J37/32

CPC classification number: H01L21/67069 ,  H01J37/32082 ,  H01J37/32091 ,  H01J37/321 ,  H01J37/32449 ,  H01J37/32972 ,  H01J2237/334 ,  H01L21/3065 ,  H01L21/67253 ,  H01L22/12 ,  H01L22/20 ,  H01L22/26 ,  H05G2/003

Abstract: Disclosed are methods of adjusting the emission of vacuum ultraviolet (VUV) radiation from a plasma in a semiconductor processing chamber. The methods may include generating a plasma in the processing chamber which includes a VUV-emitter gas and a collisional energy absorber gas, and adjusting the emission of VUV radiation from the plasma by altering the concentration ratio of the VUV-emitter gas to collisional energy absorber gas in the plasma. In some embodiments, the VUV-emitter gas may be helium and the collisional energy absorber gas may be neon, and in certain such embodiments, adjusting VUV emission may include flowing helium and/or neon into the processing chamber in a proportion so as to alter the concentration ratio of helium to neon in the plasma. Also disclosed are apparatuses which implement the foregoing methods.

公开(公告)号：US09484243B2

公开(公告)日：2016-11-01

申请号：US14255730

申请日：2014-04-17

Applicant: Lam Research Corporation

Inventor： Dean J. Larson ,  Jason Augustino ,  Andreas Fischer ,  Andre W. Desepte ,  Harmeet Singh

IPC: H01L21/673 ,  H01L21/687 ,  H01L21/67

CPC classification number: H01L21/68785 ,  H01L21/6719

Abstract: A processing chamber having a chamber housing with a top and sidewalls is provided. The processing chamber has a seal for connecting the sidewalls of the chamber housing to a top of a lower chamber below the processing chamber. A substrate holder is attached to the sidewalls of the chamber housing. Further, a wafer lift ring supported by a side arm extending through the sidewalls has at least three posts each having at least one finger, the top of the fingers defining a first wafer handoff plane. The lower chamber has at least one lowest wafer support that defines a second wafer handoff plane where the height between the first wafer handoff plane and the second wafer handoff plane is not greater than a maximum vertical stroke of a transfer arm that is configured to transfer a wafer from the first wafer handoff plane and the second wafer handoff plane.

Abstract translation: 提供具有具有顶部和侧壁的腔室壳体的处理室。 处理室具有用于将室壳体的侧壁连接到处理室下方的下室的顶部的密封件。 衬底保持器附接到腔室壳体的侧壁。 此外，由侧壁延伸穿过侧壁支撑的晶片提升环具有至少三个柱，每个至少有一个手指，手指的顶部限定第一晶片切换平面。 下室具有限定第二晶片切换平面的至少一个最低的晶片支撑件，其中第一晶片切换平面和第二晶片切换平面之间的高度不大于传输臂的最大垂直冲程，其被配置为传送 晶片从第一晶片切换平面和第二晶片切换平面。

公开(公告)号：US20150318150A1

公开(公告)日：2015-11-05

申请号：US14266575

申请日：2014-04-30

Applicant: Lam Research Corporation

Inventor： Andreas Fischer

IPC: H01J37/32 ,  H01L21/02 ,  H01L21/67 ,  H01L21/3065

CPC classification number: H01J37/32091 ,  H01J37/32155 ,  H01J37/32183 ,  H01J37/32385 ,  H01J37/3255 ,  H01J37/32568 ,  H01J37/32642 ,  H01J37/32926 ,  H01L21/02021 ,  H01L21/02087 ,  H01L21/67069

Abstract: A plasma processing system includes a bottom electrode disposed in a chamber. A lower extended electrode is disposed around the bottom electrode. An upper ceramic plate is disposed above the bottom electrode in an opposing relationship. An upper extended electrode is disposed around the upper ceramic plate. A lower process exclusion zone (PEZ) ring is situated between the lower extended electrode and the bottom electrode. An upper PEZ ring is situated between the upper extended electrode and the upper ceramic plate, with the upper PEZ ring having an RF electrode ring embedded therein. The system also includes a first RF generator for generating RF power for the bottom electrode, a second RF generator for generating RF power for the RF electrode ring embedded in the upper PEZ ring, and a controller for transmitting processing instructions. The processing instructions include power settings for the first and second RF generators.

Abstract translation: 等离子体处理系统包括设置在室中的底部电极。 下部延伸电极设置在底部电极周围。 上部陶瓷板以相对的关系设置在底部电极上方。 上部延伸电极设置在上部陶瓷板周围。 较低的工艺阻挡区（PEZ）环位于下延伸电极和底部电极之间。 上部PEZ环位于上部延伸电极和上部陶瓷板之间，上部PEZ环内嵌有RF电极环。 该系统还包括用于产生用于底部电极的RF功率的第一RF发生器，用于产生嵌入在上部PEZ环中的RF电极环的RF功率的第二RF发生器，以及用于发送处理指令的控制器。 处理指令包括用于第一和第二RF发生器的功率设置。

公开(公告)号：US20150155187A1

公开(公告)日：2015-06-04

申请号：US14097108

申请日：2013-12-04

Applicant: LAM RESEARCH CORPORATION

Inventor： Iqbal Shareef ,  Piyush Agarwal ,  Jason Augustino ,  Andreas Fischer

IPC: H01L21/67

CPC classification number: H01L21/67017 ,  H01L21/6719 ,  Y10T137/0318 ,  Y10T137/86083

Abstract: A system and method for processing a substrate in a processing chamber and providing an azimuthally evenly distributed draw on the processing byproducts using a gas pump down source coupled to the processing chamber above the plane of a substrate support within the processing chamber. The process chamber can include an annular plenum disposed between the support surface plane and the chamber top, the plenum including at least one vacuum inlet port coupled to the gas pump down source and a continuous inlet gap proximate to a perimeter of the substrate support, the continuous inlet gap having an inlet gas flow resistance of between about twice and about twenty times an outlet gas flow resistance the at least one vacuum inlet port.

Abstract translation: 一种用于处理处理室中的衬底的系统和方法，并且使用在所述处理室内的衬底支撑体的平面上方连接到所述处理室的气体抽吸源在加工副产物上提供方位均匀分布的抽吸。 处理室可以包括设置在支撑表面平面和室顶部之间的环形增压室，气室包括连接到气体泵下降源的至少一个真空入口端口和靠近衬底支撑件的周边的连续入口间隙， 连续入口间隙具有入口气体流动阻力为至少一个真空入口的出口气体流动阻力的约两倍至约二十倍的连续入口间隙。

公开(公告)号：US20150011097A1

公开(公告)日：2015-01-08

申请号：US14495553

申请日：2014-09-24

Applicant: Lam Research Corporation

Inventor： Andreas Fischer ,  Eric Hudson

IPC: H01J37/32 ,  H01L21/3065

CPC classification number: H01J37/32091 ,  H01J37/32449 ,  H01J37/32532 ,  H01J37/32541 ,  H01J37/32568 ,  H01J37/32623 ,  H01J37/32642 ,  H01J37/32816 ,  H01J37/3299 ,  H01L21/3065

Abstract: A plasma processing system having a plasma processing chamber configured for processing a substrate is provided. The plasma processing system includes at least an upper electrode and a lower electrode for processing the substrate. The substrate is disposed on the lower electrode during plasma processing, where the upper electrode and the substrate forms a first gap. The plasma processing system also includes an upper electrode peripheral extension (UE-PE). The UE-PE is mechanically coupled to a periphery of the upper electrode, where the UE-PE is configured to be non-coplanar with the upper electrode. The plasma processing system further includes a cover ring. The cover ring is configured to concentrically surround the lower electrode, where the UE-PE and the cover ring forms a second gap.

Abstract translation: 提供了一种等离子体处理系统，其具有用于处理基板的等离子体处理室。 等离子体处理系统至少包括用于处理衬底的上电极和下电极。 在等离子体处理期间，衬底设置在下电极上，其中上电极和衬底形成第一间隙。 等离子体处理系统还包括上电极周边延伸（UE-PE）。 UE-PE机械地耦合到上电极的周边，其中UE-PE被配置为与上电极非共面。 等离子体处理系统还包括盖环。 盖环被配置为同心地围绕下电极，其中UE-PE和盖环形成第二间隙。

公开(公告)号：US08911589B2

公开(公告)日：2014-12-16

申请号：US13933785

申请日：2013-07-02

Applicant: Lam Research Corporation

Inventor： Jeremy Chang ,  Andreas Fischer ,  Babak Kadkhodayan

IPC: C23F1/00 ,  H01L21/306 ,  H01J37/32 ,  H01L21/467

CPC classification number: H01L21/467 ,  H01J37/32623 ,  Y10T29/4973

Abstract: An edge ring assembly surrounds a substrate support surface in a plasma etching chamber. The edge ring assembly comprises an edge ring and a dielectric spacer ring. The dielectric spacer ring, which surrounds the substrate support surface and which is surrounded by the edge ring in the radial direction, is configured to insulate the edge ring from the baseplate. Incorporation of the edge ring assembly around the substrate support surface can decrease the buildup of polymer at the underside and along the edge of a substrate and increase plasma etching uniformity of the substrate.

Abstract translation: 边缘环组件围绕等离子体蚀刻室中的衬底支撑表面。 边缘环组件包括边缘环和介电隔离环。 围绕基板支撑表面并且沿着径向方向被边缘环包围的介电间隔环构造成使边缘环与基板绝缘。 边缘环组件围绕衬底支撑表面的结合可以降低聚合物在衬底的下侧和沿着衬底边缘的聚集，并增加衬底的等离子体蚀刻均匀性。