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    Enhanced methods for at least partial in situ release of sacrificial material from cavities or channels and/or sealing of etching holes during fabrication of multi-layer microscale or millimeter-scale complex three-dimensional structures
    41.
    发明授权
    Enhanced methods for at least partial in situ release of sacrificial material from cavities or channels and/or sealing of etching holes during fabrication of multi-layer microscale or millimeter-scale complex three-dimensional structures 有权
    用于在多层微米级或毫米级复杂三维结构的制造期间至少部分原位释放来自空腔或通道的牺牲材料和/或蚀刻孔的密封的方法

    公开(公告)号：US08262916B1

    公开(公告)日：2012-09-11

    申请号：US12828274

    申请日：2010-06-30

    申请人： Dennis R. Smalley ,  Michael S. Lockard ,  Adam L. Cohen

    发明人： Dennis R. Smalley ,  Michael S. Lockard ,  Adam L. Cohen

    IPC分类号： C23F1/22

    CPC分类号： B81C1/00071 ,  C25D1/003

    摘要： Embodiments of the invention are directed to multi-layer, multi-material fabrication methods (e.g. electrochemical fabrication methods) which provide improved versatility in producing complex microdevices and in particular in removing sacrificial material from passages, channels, or cavities that are complex or that include etching access ports in their final configurations that are small relative to passage, channel, or cavity lengths. Embodiments of the present invention provide for removal of sacrificial material from these passages, channels or cavities using one or more initial or preliminary removal steps that occur prior to completion of the such passages that results from the completion of the layer forming steps. In some embodiments, first sacrificial material is replaced after a secondary solid sacrificial material after the initial removal step or steps. In other embodiments, the first sacrificial material is replaced after a liquid material after the initial removal step or steps. In some embodiments, desired structure formation may occur along or separately from one or more etchant directing manifolds that can force etchant into the passages, channels, and cavities.

    摘要翻译： 本发明的实施例涉及多层，多材料制造方法（例如电化学制造方法），其提供了在复杂微器件生产中提供改进的多功能性，特别是从复杂的通道，通道或腔中去除牺牲材料， 蚀刻其相对于通道，通道或腔长度较小的最终构造的进入端口。 本发明的实施例提供了从这些通道，通道或空腔中去除牺牲材料，使用在完成层形成步骤后产生的这种通道完成之前发生的一个或多个初始或初步去除步骤。 在一些实施例中，在初始移除步骤或步骤之后，在第二固体牺牲材料之后，替换第一牺牲材料。 在其它实施例中，在初始移除步骤或步骤之后，在液体材料之后替换第一牺牲材料。 在一些实施方案中，期望的结构形成可以沿着或分开地与一个或多个蚀刻剂导向歧管发生，其可以迫使蚀刻剂进入通道，通道和空腔。

    Multi-Layer, Multi-Material Fabrication Methods for Producing Micro-Scale and Millimeter-Scale Devices with Enhanced Electrical and/or Mechanical Properties
    42.
    发明申请
    Multi-Layer, Multi-Material Fabrication Methods for Producing Micro-Scale and Millimeter-Scale Devices with Enhanced Electrical and/or Mechanical Properties 有权
    用于生产具有增强的电气和/或机械性能的微尺度和毫米级装置的多层，多材料制造方法

    公开(公告)号：US20110132767A1

    公开(公告)日：2011-06-09

    申请号：US12906970

    申请日：2010-10-18

    申请人： Ming Ting Wu ,  Rulon Joseph Larsen, III ,  Young Kim ,  Kieun Kim ,  Adam L. Cohen ,  Ananda H. Kumar ,  Michael S. Lockard ,  Dennis R. Smalley

    发明人： Ming Ting Wu ,  Rulon Joseph Larsen, III ,  Young Kim ,  Kieun Kim ,  Adam L. Cohen ,  Ananda H. Kumar ,  Michael S. Lockard ,  Dennis R. Smalley

    IPC分类号： C25D5/02 ,  C25D5/48

    CPC分类号： G01R1/06716 ,  B33Y10/00 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  G01R1/06744 ,  G01R1/06755 ,  G01R3/00 ,  H01L21/4853

    摘要： Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that partially coats the surface of the structure. Other embodiments are directed to electrochemical fabrication methods for producing structures or devices (e.g. microprobes) from a core material and a shell or coating material that completely coats the surface of each layer from which the probe is formed including interlayer regions. Additional embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes) from a core material and a shell or coating material wherein the coating material is located around each layer of the structure without locating the coating material in inter-layer regions. Each of these groups of embodiments incorporate both the core material and the coating material during the formation of each layer and each layer is also formed with a sacrificial material that is removed after formation of all layers of the structure. In some embodiments the core material may be a genuine structural material while in others it may be only a functional structural material (i.e. a material that would be removed with sacrificial material if it were accessible by an etchant during removal of sacrificial material.

    摘要翻译： 本发明的一些实施方案涉及用于从芯材料和部分涂覆结构表面的壳或涂层材料形成结构或器件（例如用于半导体器件的晶片级测试的微探针）的电化学制造方法。 其它实施方案涉及用于从芯材和壳或涂层材料制造结构或器件（例如微探针）的电化学制造方法，其完全涂覆形成探针的每个层的表面，包括中间层区域。 本发明的另外的实施方案涉及用于从核心材料和壳或涂层材料形成结构或器件（例如微针）的电化学制造方法，其中涂层材料围绕结构的每一层定位，而不将涂层材料定位在相互之间， 层区域。 这些实施例组中的每一个在形成每个层期间都包括芯材料和涂层材料，并且每个层还形成有牺牲材料，该牺牲材料在形成所述结构的所有层之后被去除。 在一些实施例中，芯材料可以是真正的结构材料，而在其它实施例中，其可以仅是功能性结构材料（即，如果在去除牺牲材料期间可通过蚀刻剂获得牺牲材料，则该材料将被除去。

    Fabrication process for co-fabricating multilayer probe array and a space transformer
    47.
    发明授权
    Fabrication process for co-fabricating multilayer probe array and a space transformer 失效
    共同制造多层探针阵列和空间变压器的制造工艺

    公开(公告)号：US07640651B2

    公开(公告)日：2010-01-05

    申请号：US11028945

    申请日：2005-01-03

    申请人： Adam L. Cohen ,  Vacit Arat ,  Michael S. Lockard ,  Christopher A. Bang ,  Pavel B. Lembrikov

    发明人： Adam L. Cohen ,  Vacit Arat ,  Michael S. Lockard ,  Christopher A. Bang ,  Pavel B. Lembrikov

    IPC分类号： H01F3/04 ,  H01F7/06

    CPC分类号： G01R3/00 ,  B33Y10/00 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  G01R1/06716 ,  G01R1/07378 ,  Y10T29/49002 ,  Y10T29/4902 ,  Y10T29/49078 ,  Y10T29/49204 ,  Y10T29/49222

    摘要： Embodiments of the invention provide fabrication processes for the co-fabrication of microprobe arrays along with one or more space transformers wherein the fabrication processes include the forming and adhering of a plurality of layers to previously formed layers and wherein at least a portion of the plurality of layers are formed from at least one structural material and at least one sacrificial material that is at least in part released from the plurality of layers after formation and wherein the space transformer includes a plurality of interconnect elements that connect one side to the array of probes that has a first spacing to another side that has a second spacing where the second spacing is greater than the first spacing. In some embodiments, the fabrication process includes a plurality of electrodeposition operations.

    摘要翻译： 本发明的实施例提供了用于与一个或多个空间变压器共同制造微探针阵列的制造工艺，其中制造工艺包括将多个层形成和粘附到先前形成的层，并且其中多个 层由至少一种结构材料和至少一种牺牲材料形成，所述至少一种牺牲材料在形成之后至少部分地从所述多个层释放，并且其中所述空间变换器包括将一侧连接到所述探针阵列的多个互连元件， 具有第二间隔，第二间隔具有第二间隔，其中第二间隔大于第一间隔。 在一些实施例中，制造工艺包括多个电沉积操作。

    Multi-Layer Three-Dimensional Structures Having Features Smaller Than a Minimum Feature Size Associated With the Formation of Individual Layers
    49.
    发明申请
    Multi-Layer Three-Dimensional Structures Having Features Smaller Than a Minimum Feature Size Associated With the Formation of Individual Layers 审中-公开
    具有小于单个层的形成的最小特征尺寸的特征的多层三维结构

    公开(公告)号：US20090068460A1

    公开(公告)日：2009-03-12

    申请号：US12203094

    申请日：2008-09-02

    申请人： Michael S. Lockard ,  Adam L. Cohen ,  Vacit Arat ,  Dennis R. Smalley

    发明人： Michael S. Lockard ,  Adam L. Cohen ,  Vacit Arat ,  Dennis R. Smalley

    IPC分类号： B32B5/00

    CPC分类号： C25D1/08 ,  B33Y70/00 ,  C25D1/003 ,  C25D5/022 ,  C25D5/10 ,  Y10T137/86759 ,  Y10T428/12361 ,  Y10T428/12479 ,  Y10T428/19 ,  Y10T428/24975 ,  Y10T428/249981 ,  Y10T428/29

    摘要： Embodiments of multi-layer three-dimensional structures and formation methods provide structures with effective feature (e.g. opening) sizes (e.g. virtual gaps) that are smaller than a minimum feature size (MFS) that exists on each layer as a result of the formation method used in forming the structures. In some embodiments, multi-layer structures include a first element (e.g. first patterned layer with a gap) and a second element (e.g. second patterned layer with a gap) positioned adjacent the first element to define a third element (e.g. a net gap or opening resulting from the combined gaps of the first and second elements) where the first and second elements have features that are sized at least as large as the minimum feature size and the third element, at least in part, has dimensions or defines dimensions smaller than the minimum feature size.

    摘要翻译： 多层三维结构和形成方法的实施例提供结构，其具有小于作为形成方法的结果存在于每个层上的最小特征尺寸（MFS）的有效特征（例如开口）尺寸（例如，虚拟间隙） 用于形成结构。 在一些实施例中，多层结构包括第一元件（例如具有间隙的第一图案化层）和邻近第一元件定位的第二元件（例如具有间隙的第二图案化层），以限定第三元件（例如，净间隙或 第一和第二元件的组合间隙产生的开口），其中第一和第二元件具有尺寸至少与最小特征尺寸一样大的特征，并且第三元件至少部分具有尺寸或尺寸小于 最小特征尺寸。