RESISTIVE RANDOM ACCESS MEMORY DEVICES, AND RELATED SEMICONDUCTOR DEVICE STRUCTURES
    41.
    发明申请
    RESISTIVE RANDOM ACCESS MEMORY DEVICES, AND RELATED SEMICONDUCTOR DEVICE STRUCTURES 有权
    电阻随机访问存储器件和相关半导体器件结构

    公开(公告)号:US20140145138A1

    公开(公告)日:2014-05-29

    申请号:US14168592

    申请日:2014-01-30

    Inventor: Timothy A. Quick

    Abstract: A method of forming a chalcogenide material on a surface of a substrate comprising exposing a surface of a substrate to ionized gas clusters from a source gas, the ionized gas clusters comprising at least one chalcogen and at least one electropositive element. A method of forming a resistive random access memory device is also disclosed. The method comprises forming a plurality of memory cells wherein each cell of the plurality of memory cells is formed by forming a metal on a first electrode, forming a chalcogenide material on the metal by a gas cluster ion beam process, and forming a second electrode on the chalcogenide material. A method of forming another resistive random access memory device and a random access memory device including the chalcogenide material are also disclosed.

    Abstract translation: 一种在衬底的表面上形成硫族化物材料的方法,包括将基底的表面暴露于源气体的离子化气体簇,所述离子化气体簇包含至少一个硫属元素和至少一个正电荷元素。 还公开了一种形成电阻随机存取存储器件的方法。 该方法包括形成多个存储单元,其中多个存储单元中的每个单元通过在第一电极上形成金属而形成,通过气体簇离子束工艺在金属上形成硫族化物材料,并且形成第二电极 硫族化物材料。 还公开了形成另一个电阻性随机存取存储器件和包括硫族化物材料的随机存取存储器件的方法。

    CONFINED RESISTANCE VARIABLE MEMORY CELL STRUCTURES AND METHODS
    42.
    发明申请
    CONFINED RESISTANCE VARIABLE MEMORY CELL STRUCTURES AND METHODS 有权
    限制电阻可变存储器单元结构和方法

    公开(公告)号:US20130252396A1

    公开(公告)日:2013-09-26

    申请号:US13894059

    申请日:2013-05-14

    Abstract: Confined resistance variable memory cell structures and methods are described herein. One or more methods of forming a confined resistance variable memory cell structure includes forming a via in a memory cell structure and forming a resistance variable material in the via by performing a process that includes providing a germanium amidinate precursor and a first reactant to a process chamber having the memory cell structure therein and providing an antimony ethoxide precursor and a second reactant to the process chamber subsequent to removing excess germanium.

    Abstract translation: 本文描述了限制性电阻变量存储单元结构和方法。 形成限制电阻可变存储单元结构的一种或多种方法包括在存储单元结构中形成通孔,并在通孔中形成电阻可变材料,通过执行包括向处理室提供锗酰脒前体和第一反应物的方法 在其中具有记忆单元结构并且在除去过量的锗之后向处理室提供锑乙醇前体和第二反应物。

    METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES INCLUDING METAL OXIDE STRUCTURES
    50.
    发明申请
    METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES INCLUDING METAL OXIDE STRUCTURES 有权
    形成包含金属氧化物结构的半导体器件结构的方法

    公开(公告)号:US20160163536A1

    公开(公告)日:2016-06-09

    申请号:US15044713

    申请日:2016-02-16

    Abstract: Methods of forming metal oxide structures and methods of forming metal oxide patterns on a substrate using a block copolymer system formulated for self-assembly. A block copolymer at least within a trench in the substrate and including at least one soluble block and at least one insoluble block may be annealed to form a self-assembled pattern including a plurality of repeating units of the at least one soluble block laterally aligned with the trench and positioned within a matrix of the at least one insoluble block. The self-assembled pattern may be exposed to a metal oxide precursor that impregnates the at least one soluble block. The metal oxide precursor may be oxidized to form a metal oxide. The self-assembled pattern may be removed to form a pattern of metal oxide lines on the substrate surface. Semiconductor device structures are also described.

    Abstract translation: 使用配制用于自组装的嵌段共聚物体系形成金属氧化物结构的方法和在基材上形成金属氧化物图案的方法。 至少在衬底中的沟槽内并且包括至少一个可溶性嵌段和至少一个不溶性嵌段的嵌段共聚物可以被退火以形成自组装图案,其包括多个与所述至少一个可溶嵌段的重复单元横向对准 并且定位在所述至少一个不溶性块的基质内。 自组装图案可以暴露于浸渍至少一个可溶性嵌段的金属氧化物前体。 金属氧化物前体可以被氧化以形成金属氧化物。 可以去除自组装图案以在衬底表面上形成金属氧化物线的图案。 还描述了半导体器件结构。

Patent Agency Ranking