公开(公告)号：US20090233400A1

公开(公告)日：2009-09-17

申请号：US12453832

申请日：2009-05-22

申请人： Hoe-Ku Jung ,  Myung-Sam Kang ,  Jung-Hyun Park

发明人： Hoe-Ku Jung ,  Myung-Sam Kang ,  Jung-Hyun Park

IPC分类号： H01L21/98 ,  B32B38/10

CPC分类号： H05K3/4691 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K1/183 ,  H05K1/189 ,  H05K3/4623 ,  H05K2201/055 ,  H05K2201/09536 ,  H05K2201/10515 ,  H05K2203/049 ,  H05K2203/063 ,  Y10T29/49124 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

摘要： A manufacturing method for rigid-flexible multi-layer printed circuit board including: a flexible substrate of which circuits are formed on both sides and which is bendable; a rigid substrate which is laminated on the flexible substrate and circuits are formed on both sides and a cavity within which a semiconductor chip is mounted is formed; and a bonding sheet adhering the flexible substrate and the rigid substrate and having a insulating property. When the same numbers of the semiconductor chips are mounted or the POP is embodied, the whole thickness of the package can be lower. Also, two more semiconductor chips can be mounted using the space as the thickness of the core layer, and the structure impossible when the number of semiconductor chip mounted on the bottom substrate becomes two from one in conventional technology can be embodied.

摘要翻译： 一种刚性柔性多层印刷电路板的制造方法，包括：柔性基板，其两侧形成有可弯曲的电路; 层叠在柔性基板上的刚性基板和电路形成在两侧，并且形成有安装半导体芯片的空腔; 以及粘合柔性基板和刚性基板并具有绝缘性的粘合片。 当安装相同数量的半导体芯片或实施POP时，封装的整体厚度可以更低。 此外，可以使用空间作为芯层的厚度来安装另外两个半导体芯片，并且可以实现当传统技术中安装在底部基板上的半导体芯片的数量变为二倍时的结构不可行。

公开(公告)号：US07494844B2

公开(公告)日：2009-02-24

申请号：US11524402

申请日：2006-09-21

申请人： Hoe-Ku Jung ,  Myung-Sam Kang ,  Jung-Hyun Park

发明人： Hoe-Ku Jung ,  Myung-Sam Kang ,  Jung-Hyun Park

IPC分类号： H01L21/44

CPC分类号： H05K3/4652 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/1058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H05K1/183 ,  H05K3/205 ,  H05K3/4697 ,  H05K2201/09536 ,  H05K2203/0574 ,  H05K2203/063 ,  H05K2203/308 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

摘要： A method for manufacturing a substrate having a cavity is disclosed. The method comprises: (a) forming a first circuit pattern on one side of a seed layer by use of a first dry film; (b) laminating a second dry film on the first dry film, the thickness of the second dry film corresponding to the depth of the cavity to be formed; (c) laminating a dielectric layer on an area outside of where the cavity is to be formed, the thickness of the dielectric layer corresponding to the depth of the cavity to be formed; (d) laminating on the seed layer a copper foil laminated master having a second circuit pattern; and (e) forming the cavity by peeling off the first dry film and the second dry film after removing the seed layer. The method in accordance with the present invention can mount a plurality of integrated circuits by reducing the thickness of a substrate on a package on package.

摘要翻译： 公开了一种用于制造具有空腔的衬底的方法。 该方法包括：（a）通过使用第一干膜在种子层的一侧上形成第一电路图案; （b）在第一干膜上层压第二干膜，第二干膜的厚度对应于待形成的空腔的深度; （c）在要形成空腔的区域外的区域上层叠电介质层，所述电介质层的厚度对应于待形成的空腔的深度; （d）在种子层上层叠具有第二电路图案的铜箔层叠主板; 和（e）通过在去除种子层之后剥离第一干膜和第二干膜来形成空腔。 根据本发明的方法可以通过减小封装上的封装上的衬底的厚度来安装多个集成电路。

公开(公告)号：US07802358B2

公开(公告)日：2010-09-28

申请号：US12453832

申请日：2009-05-22

申请人： Hoe-Ku Jung ,  Myung-Sam Kang ,  Jung-Hyun Park

发明人： Hoe-Ku Jung ,  Myung-Sam Kang ,  Jung-Hyun Park

IPC分类号： H05K3/00

CPC分类号： H05K3/4691 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K1/183 ,  H05K1/189 ,  H05K3/4623 ,  H05K2201/055 ,  H05K2201/09536 ,  H05K2201/10515 ,  H05K2203/049 ,  H05K2203/063 ,  Y10T29/49124 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

摘要： A manufacturing method for rigid-flexible multi-layer printed circuit board including: a flexible substrate of which circuits are formed on both sides and which is bendable; a rigid substrate which is laminated on the flexible substrate and circuits are formed on both sides and a cavity within which a semiconductor chip is mounted is formed; and a bonding sheet adhering the flexible substrate and the rigid substrate and having a insulating property. When the same numbers of the semiconductor chips are mounted or the POP is embodied, the whole thickness of the package can be lower. Also, two more semiconductor chips can be mounted using the space as the thickness of the core layer, and the structure impossible when the number of semiconductor chip mounted on the bottom substrate becomes two from one in conventional technology can be embodied.

摘要翻译： 一种刚性柔性多层印刷电路板的制造方法，包括：柔性基板，其两侧形成有可弯曲的电路; 层叠在柔性基板上的刚性基板和电路形成在两侧，并且形成有安装半导体芯片的空腔; 以及粘合柔性基板和刚性基板并具有绝缘性的粘合片。 当安装相同数量的半导体芯片或实施POP时，封装的整体厚度可以更低。 此外，可以使用空间作为芯层的厚度来安装另外两个半导体芯片，并且可以实现当传统技术中安装在底部基板上的半导体芯片的数量变为二倍时的结构是不可能的。

公开(公告)号：US20080115355A1

公开(公告)日：2008-05-22

申请号：US11984209

申请日：2007-11-14

申请人： Jung-Hyun Park ,  Byoung-Youl Min ,  Je-Gwang Yoo ,  Myung-Sam Kang

发明人： Jung-Hyun Park ,  Byoung-Youl Min ,  Je-Gwang Yoo ,  Myung-Sam Kang

IPC分类号： H05K3/10 ,  H01K3/10

CPC分类号： H05K3/421 ,  H05K1/115 ,  H05K3/205 ,  H05K2201/0394 ,  H05K2201/09545 ,  H05K2201/09563 ,  H05K2203/0353 ,  H05K2203/0542 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A method of manufacturing a printed circuit board is disclosed. Using the method, which includes embedding a first circuit pattern and a second circuit pattern in one side and the other side of an insulation substrate, forming a via hole by removing portions of the insulation substrate and the first circuit pattern, and electrically connecting the first circuit pattern and the second circuit pattern by forming a plating layer in the via hole, it is possible to form high-density circuits, as circuitry may be formed in portions that might have been occupied by lands, and more circuitry may be implemented for a given area of insulation substrate, whereby a fine-patterned printed circuit board may be implemented that has a high degree of integration. Also, a printed circuit board can be produced which allows good signal transfers between layers and with which fine circuit patterns can be implemented with inexpensive costs.

摘要翻译： 公开了一种制造印刷电路板的方法。 使用该方法，其包括在绝缘基板的一侧和另一侧嵌入第一电路图案和第二电路图案，通过去除绝缘基板和第一电路图案的部分而形成通孔，并且将第一 电路图案和第二电路图案，通过在通孔中形成镀层，可以形成高密度电路，因为电路可以形成为可能已经被焊盘占据的部分，并且可以实现更多的电路用于 可以实现具有高度集成度的精细图案化印刷电路板。 此外，可以制造印刷电路板，其可以在层之间进行良好的信号传输，并且可以以廉价的成本实现精细的电路图案。

公开(公告)号：US20070059918A1

公开(公告)日：2007-03-15

申请号：US11520730

申请日：2006-09-14

申请人： Hoe-Ku Jung ,  Myung-Sam Kang ,  Jung-Hyun Park

发明人： Hoe-Ku Jung ,  Myung-Sam Kang ,  Jung-Hyun Park

IPC分类号： H01L21/4763

CPC分类号： H05K3/4691 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K1/183 ,  H05K1/189 ,  H05K3/4623 ,  H05K2201/056 ,  H05K2201/09536 ,  H05K2201/10515 ,  H05K2203/049 ,  H05K2203/063 ,  Y10T29/49124 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

摘要： The present invention relates to a rigid-flexible multi-layer printed circuit board comprising: a flexible substrate of which circuits are formed on both sides and which is bendable; a rigid substrate which is laminated on the flexible substrate and circuits are formed on both sides and a cavity within which a semiconductor chip is mounted is formed; and a bonding sheet adhering the flexible substrate and the rigid substrate and having a insulating property. According the present invention, when the same numbers of the semiconductor chips are mounted or the POP is embodied, the whole thickness of the package can be lower. Also, two more semiconductor chips can be mounted using the space as the thickness of the core layer, and the structure impossible when the number of semiconductor chip mounted on the bottom substrate becomes two from one in conventional technology can be embodied.

摘要翻译： 硬质柔性多层印刷电路板技术领域本发明涉及一种柔性多层印刷电路板，包括：柔性基板，其两侧形成有可弯曲的电路; 层叠在柔性基板上的刚性基板和电路形成在两侧，并且形成有安装半导体芯片的空腔; 以及粘合柔性基板和刚性基板并具有绝缘性的粘合片。 根据本发明，当安装相同数量的半导体芯片或实施POP时，封装的整体厚度可以较低。 此外，可以使用空间作为芯层的厚度来安装另外两个半导体芯片，并且可以实现当传统技术中安装在底部基板上的半导体芯片的数量变为二倍时的结构不可行。

公开(公告)号：US20100099936A1

公开(公告)日：2010-04-22

申请号：US12577869

申请日：2009-10-13

申请人： Chae-Ho SHIN ,  Jung-Hyun Park ,  Eunae Noh ,  Kyoungho Row ,  Ji Won Park

发明人： Chae-Ho SHIN ,  Jung-Hyun Park ,  Eunae Noh ,  Kyoungho Row ,  Ji Won Park

IPC分类号： C07C5/333 ,  B01J23/18

CPC分类号： B01J23/8876 ,  B01J23/002 ,  B01J35/0006 ,  B01J35/1009 ,  B01J35/1038 ,  B01J37/03 ,  B01J37/10 ,  B01J2523/00 ,  C07C5/48 ,  C07C2523/18 ,  C07C2523/28 ,  C07C2523/745 ,  C07C11/167 ,  B01J2523/54 ,  B01J2523/68 ,  B01J2523/842

摘要： The present invention relates to a complex oxide catalyst of Bi/Mo/Fe and an oxidative dehydrogenation of 1-butene in the presence of a catalyst herein. A catalyst of the present invention is superior to the conventional Bi/Mo catalyst in thermal and mechanical stabilities, conversion and selectivity toward 1,3-butadiene, while showing a long-term catalytic activity.

摘要翻译： 本发明涉及Bi / Mo / Fe的复合氧化物催化剂和1-丁烯在本文催化剂存在下的氧化脱氢。 本发明的催化剂在热和机械稳定性，转化率和对1,3-丁二烯的选择性方面优于传统的Bi / Mo催化剂，同时显示出长期的催化活性。

公开(公告)号：USD560627S1

公开(公告)日：2008-01-29

申请号：US29269993

申请日：2006-12-12

申请人： Jung-Hyun Park ,  Hyun-Teak Lim ,  Min-Ho Cha

设计人： Jung-Hyun Park ,  Hyun-Teak Lim ,  Min-Ho Cha

公开(公告)号：USD560182S1

公开(公告)日：2008-01-22

申请号：US29269994

申请日：2006-12-12

申请人： Jung-Hyun Park

设计人： Jung-Hyun Park

公开(公告)号：USD541811S1

公开(公告)日：2007-05-01

申请号：US29241720

申请日：2005-10-31

申请人： Jung-Hyun Park

设计人： Jung-Hyun Park

公开(公告)号：US20070026651A1

公开(公告)日：2007-02-01

申请号：US11480380

申请日：2006-07-05

申请人： Hun-Hyeoung Leam ,  Hyeon-Deok Lee ,  Young-Sub You ,  Won-Jun Jang ,  Woong Lee ,  Jung-Hyun Park ,  Sang-Kyoung Lee ,  Jung-Geun Jee ,  Sang-Hoon Lee

发明人： Hun-Hyeoung Leam ,  Hyeon-Deok Lee ,  Young-Sub You ,  Won-Jun Jang ,  Woong Lee ,  Jung-Hyun Park ,  Sang-Kyoung Lee ,  Jung-Geun Jee ,  Sang-Hoon Lee

IPC分类号： H01L21/38

CPC分类号： H01L21/28273 ,  H01L21/32115 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

摘要： In a method of manufacturing a semiconductor device such as a flash memory device, an insulating pattern having an opening is formed to partially expose a surface of a substrate. A first silicon layer is formed on the exposed surface portion of the substrate and the insulating pattern. The first silicon layer has an opened seam overlying the previously exposed portion of the substrate. A heat treatment on the substrate is performed at a temperature sufficient to induce silicon migration so as to cause the opened seam to be closed via the silicon migration. A second silicon layer is then formed on the first silicon layer. Thus, surface profile of a floating gate electrode obtained from the first and second silicon layers may be improved.

摘要翻译： 在制造诸如闪速存储器件的半导体器件的方法中，形成具有开口的绝缘图案以部分地暴露衬底的表面。 第一硅层形成在基板的露出表面部分和绝缘图案上。 第一硅层具有覆盖衬底的先前暴露部分的开口接缝。 在足以诱导硅迁移的温度下进行在基板上的热处理，以便通过硅迁移使开放的接缝闭合。 然后在第一硅层上形成第二硅层。 因此，可以提高从第一和第二硅层获得的浮栅的表面轮廓。