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公开(公告)号：US10170929B2
公开(公告)日：2019-01-01
申请号：US15012108
申请日：2016-02-01
Applicant: Analog Devices Global
Inventor： Bin Shao , Yanfeng Lu , Scott D. Biederwolf
Abstract: Apparatus and techniques described herein can include a load circuit comprising a direct current (DC) input terminal, and a source circuit comprising a direct current (DC) output terminal coupled to the DC input terminal of the load circuit. The source circuit can include a source control circuit configured to provide a current-limited DC output voltage and monitor the current-limited DC output voltage to detect an authentication signal provided at the DC output terminal by the load circuit, the load circuit configured to modulate the voltage at the DC output terminal using a pull-down circuit. The load circuit can be configured to compare the supply voltage at the DC input terminal to a reference voltage and, in response, energize other portions of the load circuit when the input current provided the DC input terminal is sufficient as indicated at least in part by the comparison.
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公开(公告)号：US20180358248A1
公开(公告)日：2018-12-13
申请号：US16005499
申请日：2018-06-11
Applicant: Analog Devices Global Unlimited Company
Inventor： Edward John Coyne
CPC classification number: H01L21/67248 , G01K3/005 , G01K3/04 , G01K7/01 , G01K13/00
Abstract: A temperature shock monitor includes a solvent material and a diffusion material. An energy barrier between the solvent material and the diffusion material is selected to be lower than is would conventionally be used in semiconductor devices such that the diffusion material diffuses into the solvent material when exposed to a temperature above a designated temperature threshold. At a later time, electrical parameters of the temperature shock monitor that change based on the amount of diffusion of the diffusion material into the solvent material allows one to determine whether the temperature shock monitor was exposed to a temperature above the temperature threshold.
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503.发明申请公开(公告)号：US20180344203A1
公开(公告)日：2018-12-06
申请号：US15995130
申请日：2018-06-01
Applicant: Analog Devices Global
Inventor： Yogesh Jayaraman SHARMA , Christopher W. HYDE , Brendan CRONIN , Jochen SCHMITT
CPC classification number: A61B5/062 , G01R33/0206
Abstract: A minimally invasive surgical instrument using 3-axis magnetic positioning, system and methods thereof. This invention describes two key ideas that enable the development of a magnetic position system based on integrated anisotropic magnetoresistive (AMR) magnetic field sensors. This achieves the resolution, power and area targets necessary to integrate 3 axes anisotropic magnetoresistance (AMR) sensors along with the Analog Front End integrated circuit (IC) in a 4 mm by 350 um integrated solution for catheter applications. The stringent area and power dissipation requirements are met by development through both system level solutions for higher field strengths and a minimally necessary Analog Front End (AFE) to meet the 1 mm rms resolution requirement in the power dissipation and area budget.
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公开(公告)号：US10145906B2
公开(公告)日：2018-12-04
申请号：US14973314
申请日：2015-12-17
Applicant: Analog Devices Global
Inventor： Alan J. O'Donnell , Robert Guyol , Maria Jose Martinez , Jan Kubik , Padraig L. Fitzgerald , Javier Calpe Maravilla , Michael P. Lynch , Eoin E. English
Abstract: A magnetic device may include a magnetic structure, a device structure, and an associated circuit. The magnetic structure may include a patterned layer of material having a predetermined magnetic property. The patterned layer may be configured to, e.g., provide a magnetic field, sense a magnetic field, channel or concentrate magnetic flux, shield a component from a magnetic field, or provide magnetically actuated motion, etc. The device structure may be another structure of the device that is physically connected to or arranged relative to the magnetic structure to, e.g., structurally support, enable operation of, or otherwise incorporate the magnetic structure into the magnetic device, etc. The associated circuit may be electrically connected to the magnetic structure to receive, provide, condition or process of signals of the magnetic device.
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公开(公告)号：US20180338063A1
公开(公告)日：2018-11-22
申请号：US15685379
申请日：2017-08-24
Applicant: Analog Devices Global
Inventor： David O'Neill , Amogh D. Thaly , David Rowe , Niall D. O'Connell , Lucas Valentin Garcia
CPC classification number: H04N1/33346 , H04N1/32702 , H04N1/33323 , H04N1/33361 , H04N21/43635
Abstract: This disclosure relates generally to communicating video content and other data over networks. An example apparatus includes a transmitter for communicating data via a serial link with a receiver. The transmitter includes an input, an output interface to the serial link, and translation circuitry. The input includes multiple input data lanes and a clock lane, and the input is configured to concurrently receive data on the multiple input data lanes aligned with a clock signal received on the clock lane according to a multi-lane communication protocol. The output interface is a clock-less interface and includes a number of output data lanes less than a number of the multiple input data lanes. The translation circuitry translates the data received according to the multi-lane communication protocol to a serial link communication protocol for transmission on the serial link.
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Patent Agency Ranking
公开(公告)号：US20180337084A1
公开(公告)日：2018-11-22
申请号：US15600664
申请日：2017-05-19
Applicant: Analog Devices Global
Inventor： Alan John Blennerhassett , Bernard Patrick Stenson
IPC: H01L21/768
CPC classification number: H01L21/768 , H01F17/00 , H01G4/06 , H01L21/7682 , H01L21/7687 , H01L23/5227 , H01L29/0649
Abstract: Integrated digital isolators comprise a first transformer coil or capacitor plate mounted on an integrated circuit substrate, and separated from a second transformer coil or capacitor plate via an electrically insulating isolation layer. The electrical isolation that is achieved is dependent upon the material and thickness of the isolation layer. In order to reduce the amount of time required for fabrication while still allowing thick isolation layers to be deployed, in examples of the disclosure pre-formed sheets or tapes of dielectric material are applied to the substrate over the first transformer coil or capacitive plate, for example by being rolled onto the substrate using a heated roller. Such a technique results in a thick isolation layer that is formed using a simple process and much more quickly and reliably than conventional spin-coating or deposition techniques.
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公开(公告)号：US20180321349A1
公开(公告)日：2018-11-08
申请号：US15586877
申请日：2017-05-04
Applicant: Analog Devices Global
Inventor： GuangYang Qu , Leicheng Chen , Michael Looney
CPC classification number: G01R35/005 , G01R27/14
Abstract: The sensor interface IC measures or calibrates a target resistance to be used as a gain resistor for a TIA amplifier in the sensor interface IC. One or more excitation currents are generated in response to different specified excitation voltages that are applied to an external calibration resistor having a specified calibration resistance value. Response voltages are measured across the target resistor, respectively in response to the corresponding different one or more excitation currents. The resistance value of the target resistor is determined using a difference between the measured response voltages, a difference between the specified excitation voltages, and the specified calibration resistance value.
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公开(公告)号：US20180306908A1
公开(公告)日：2018-10-25
申请号：US15353955
申请日：2016-11-17
Applicant: Analog Devices Global
CPC classification number: G01S7/4861 , G01S7/486 , G01S7/4865 , G01S17/10 , G01S17/936 , H03M1/361 , H03M1/38 , H03M1/466
Abstract: Embodiments of the present disclosure propose analog-to-digital conversion (ADC) systems particularly suitable for Light Detection and Ranging (LIDAR) implementations. An exemplary proposed ADC system is configured to determine whether an absolute value of an analog value is greater than a threshold, and, upon positive determination, assign a predetermined digital value as a digital value corresponding to the analog value, without proceeding with the analog-to-digital conversion of the analog value. Because the ADC system only proceeds with the analog-to-digital conversion, using an ADC, when the input analog value is smaller than the threshold, and otherwise the input analog value is simply assigned some predefined digital value, design complexity and power consumption of the system may be significantly reduced, compared to conventional ADCs used in LIDAR applications.
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公开(公告)号：US20180302214A1
公开(公告)日：2018-10-18
申请号：US15655703
申请日：2017-07-20
Applicant: ANALOG DEVICES GLOBAL
Inventor： Bortecene Terlemez , Burak Dundar
CPC classification number: H04L7/0334 , H03L7/0807 , H03L7/091 , H04L7/0008 , H04L7/0331 , H04L7/06
Abstract: Phase detectors for clock and data recovery circuits are provided herein. In certain implementations, a phase detector includes sampling circuitry that generates a plurality of samples of an input data signal based on timing of a plurality of clock signals, a binary response circuit that processes the plurality of samples to generate a plurality of binary output signals providing a binary detector response, and a linear response circuit that processes the plurality of samples to generate a plurality of linear output signals providing a linear detector response. The phase detector generates one or more data output signals based on the plurality of samples to thereby recover data from the input data signal.
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公开(公告)号：US20180302101A1
公开(公告)日：2018-10-18
申请号：US15485919
申请日：2017-04-12
Applicant: Analog Devices Global
Inventor： Avinash Gutta , Venkata Aruna Srikanth Nittala , Abhilasha Kawle
IPC: H03M3/00
Abstract: A delta sigma modulator circuit comprises a forward circuit path including a first integrator stage and an analog-to-digital converter (ADC) circuit, wherein a transfer function of the forward circuit path includes a signal gain element of m, wherein m is a positive integer; an input path to the first integrator stage, wherein a transfer function of the input path includes a signal gain element of l/m; and a feedback circuit path operatively coupled to an output of the ADC circuit and an inverting input of an op amp of the first integrator stage, wherein the feedback circuit path includes at least a first digital-to-analog converter (DAC) circuit and a transfer function of the feedback circuit path includes a signal gain element of l/m.
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