公开(公告)号：US20160336078A1

公开(公告)日：2016-11-17

申请号：US15221947

申请日：2016-07-28

Applicant: Apple Inc.

Inventor： Eyal Gurgi ,  Yoav Kasorla ,  Barak Rotbard ,  Shai Ojalvo

IPC: G11C29/38 ,  G11C16/34 ,  G11C29/44 ,  G11C29/50 ,  G11C16/10 ,  G11C29/12

CPC classification number: G11C29/38 ,  G06F11/07 ,  G06F11/073 ,  G06F11/0772 ,  G06F11/263 ,  G11C11/1677 ,  G11C11/5628 ,  G11C11/5635 ,  G11C11/5678 ,  G11C13/0035 ,  G11C13/0064 ,  G11C13/0069 ,  G11C13/0097 ,  G11C16/10 ,  G11C16/3459 ,  G11C29/12015 ,  G11C29/44 ,  G11C29/50012

Abstract: A method for data storage includes receiving in a memory device data for storage in a group of memory cells. The data is stored in the group by performing a Program and Verify (P&V) process, which applies to the memory cells in the group a sequence of programming pulses and compares respective analog values of the memory cells in the group to respective verification thresholds. Immediately following successful completion of the P&V process, a mismatch between the stored data and the received data is detected in the memory device. An error in storage of the data is reported responsively to the mismatch.

公开(公告)号：US09449705B2

公开(公告)日：2016-09-20

申请号：US14173965

申请日：2014-02-06

Applicant: Apple Inc.

Inventor： Ofir Shalvi ,  Naftali Sommer ,  Dotan Sokolov ,  Yoav Kasorla

IPC: G11C29/00 ,  G06F11/10 ,  G11C11/56 ,  G11C16/34

CPC classification number: G11C11/5628 ,  G06F11/1008 ,  G06F11/1068 ,  G11C11/56 ,  G11C16/34 ,  G11C16/3459 ,  G11C29/00 ,  G11C29/52 ,  H03M13/2906

Abstract: A method for data storage includes storing first data bits in a set of multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels. Second data bits are stored in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits. A storage strategy is selected responsively to a difference between the first and second times. The storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits.

Abstract translation: 一种用于数据存储的方法包括：通过对存储器单元进行编程来采用各自的第一编程级别，来将第一数据位在第一时间存储在一组多位模拟存储单元中。 第二数据位通过对存储器单元进行编程以采取依赖于第一编程电平和第二数据位的相应的第二编程电平而在比第一时间晚的第二时间存储在存储单元组中。 响应于第一次和第二次之间的差异选择存储策略。 将存储策略应用于从第一数据位和第二数据位中选择的至少一组数据位。

公开(公告)号：US09423961B2

公开(公告)日：2016-08-23

申请号：US14479732

申请日：2014-09-08

Applicant: Apple Inc.

Inventor： Atai Levy ,  Yoav Kasorla ,  Stas Mouler ,  Alex Borisenkov ,  Dmitry Koyfman

IPC: G06F3/00 ,  G06F3/06 ,  G06F13/16 ,  G11C11/56 ,  G11C16/10

CPC classification number: G06F3/0604 ,  G06F3/061 ,  G06F3/0632 ,  G06F3/0659 ,  G06F3/0679 ,  G06F13/1689 ,  G11C11/5628 ,  G11C16/10

Abstract: An apparatus includes an interface and a processor. The interface is configured to communicate with a memory device. The processor is configured to send to the memory device, via the interface, a sequence of write commands that program multiple types of memory pages that incur respective different programming durations in the memory device, while inserting in the sequence suspension periods for permitting execution of storage commands that are not part of the sequence, such that at least some of the suspension periods are followed by write commands of types that do not have a shortest programming duration among the programming durations.

Abstract translation: 一种装置包括接口和处理器。 该接口被配置为与存储器设备通信。 处理器被配置为经由接口向存储器设备发送一系列写入命令，该命令编程在存储器设备中引起相应不同编程持续时间的多种类型的存储器页面，同时在序列中插入用于允许执行存储的暂停时段 不是序列的一部分的命令，使得至少一些暂停时间段之后是在编程持续时间中不具有最短编程持续时间的类型的写入命令。

公开(公告)号：US20160093386A1

公开(公告)日：2016-03-31

申请号：US14962333

申请日：2015-12-08

Applicant: Apple Inc.

Inventor： Yael Shur ,  Yoav Kasorla ,  Moshe Neerman ,  Naftali Sommer ,  Avraham Poza Meir ,  Etai Zaltsman ,  Eyal Gurgi ,  Meir Dalal

IPC: G11C16/14

CPC classification number: G11C16/14 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/16 ,  G11C16/3418 ,  G11C16/349

Abstract: A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.

Abstract translation: 一种非易失性存储器中的方法，其包括使用包括擦除级别的预定义编程级别集存储数据的多个存储器单元，包括接收指示要保留的一组存储器单元的存储操作，而不进行编程 长时间 组中的存储单元被设置为与擦除的电平不同的保持编程电平。 在准备使用数据对存储器单元组进行编程时，存储器单元组被擦除到擦除的电平，然后将数据编程在存储器单元组中。

公开(公告)号：US09098401B2

公开(公告)日：2015-08-04

申请号：US13683569

申请日：2012-11-21

Applicant: Apple Inc.

Inventor： Yoav Kasorla ,  Eyal Gurgi

IPC: G06F12/02 ,  G06F21/60 ,  G06F21/79 ,  G11C16/14 ,  G11C16/10 ,  G11C16/22

CPC classification number: G06F12/0246 ,  G06F21/60 ,  G06F21/79 ,  G06F2221/2143 ,  G11C16/10 ,  G11C16/14 ,  G11C16/22

Abstract: A method includes, in a memory with multiple analog memory cells, storing one or more data pages in respective groups of the memory cells using a first programming configuration having a first storage speed. Upon receiving a request to securely erase a data page from the memory, one or more of the memory cells in a group that stores the data page are re-programmed using a second programming configuration having a second storage speed that is faster than the first storage speed.

Abstract translation: 一种方法包括在具有多个模拟存储器单元的存储器中，使用具有第一存储速度的第一编程配置在存储器单元的相应组中存储一个或多个数据页。 在接收到从存储器安全地擦除数据页面的请求时，使用具有比第一存储器快的第二存储速度的第二编程配置来重新编程存储数据页面的组中的一个或多个存储器单元 速度。

公开(公告)号：US20140347924A1

公开(公告)日：2014-11-27

申请号：US14318876

申请日：2014-06-30

Applicant: Apple Inc.

Inventor： Yoav Kasorla ,  Naftali Sommer ,  Eyal Gurgi ,  Micha Anholt

IPC: G11C16/10 ,  G11C16/04

CPC classification number: G11C27/005 ,  G06F11/1048 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/10 ,  G11C2211/5647 ,  G11C2211/5648

Abstract: A method for data storage includes accepting data for storage in an array of analog memory cells, which are arranged in rows associated with respective word lines. At least a first page of the data is stored in a first row of the array, and at least a second page of the data is stored in a second row of the array, having a different word line from the first row. After storing the first and second pages, a third page of the data is stored jointly in the first and second rows.

Abstract translation: 一种用于数据存储的方法包括接收用于存储在与相应字线相关联的行中的模拟存储器单元阵列中的数据。 数据的至少第一页被存储在阵列的第一行中，并且数据的至少第二页被存储在阵列的第二行中，具有与第一行不同的字线。 在存储第一页和第二页之后，数据的第三页共同存储在第一行和第二行中。

公开(公告)号：US20140331106A1

公开(公告)日：2014-11-06

申请号：US13874995

申请日：2013-05-01

Applicant: APPLE INC.

Inventor： Barak Baum ,  Tomer Ish-Shalom ,  Micha Anholt ,  Eyal Gurgi ,  Yoav Kasorla

IPC: G06F11/10

CPC classification number: G06F11/10 ,  G06F11/1076 ,  G11C7/14 ,  G11C11/5621 ,  G11C29/021 ,  G11C29/028 ,  G11C29/42

Abstract: A method includes, in a memory that includes two or more memory units, storing a code word of an Error Correction Code (ECC) that is representable by a plurality of check equations, such that a first part of the code word is stored in a first memory unit and a second part of the code word is stored in a second memory unit. A subset of the check equations, which operate only on code word bits belonging to the first part stored in the first memory unit, is identified. The first part of the code word is retrieved from the first memory unit, and a count of the check equations in the identified subset that are not satisfied by the retrieved first part of the code word is evaluated. One or more readout parameters, for readout from the first memory unit, are set depending on the evaluated count.

Abstract translation: 一种方法包括在包括两个或多个存储器单元的存储器中，存储可由多个检验方程表示的纠错码（ECC）的代码字，使得代码字的第一部分被存储在 第一存储单元和码字的第二部分被存储在第二存储单元中。 识别仅对属于存储在第一存储器单元中的第一部分的代码字位操作的检验方程的子集。 从第一存储器单元检索代码字的第一部分，并且对所检索的代码字的第一部分不满足的所识别的子集中的检验方程的计数进行评估。 根据评估计数来设定用于从第一存储器单元读出的一个或多个读出参数。

公开(公告)号：US20140269051A1

公开(公告)日：2014-09-18

申请号：US13804427

申请日：2013-03-14

Applicant: APPLE INC.

Inventor： Yoav Kasorla ,  Avraham Poza Meir ,  Eyal Gurgi

IPC: G11C16/10

CPC classification number: G11C16/10 ,  G11C11/5628 ,  G11C16/3427

Abstract: A method includes providing data for storage in a memory, which includes multiple analog memory cells arranged in a three-dimensional (3-D) configuration having a first dimension associated with bit lines, a second dimension associated with word lines, and a third dimension associated with sections. The data is stored in the memory cells in accordance with a programming order that alternates among the sections, including storing a first portion of the data in a first section, then storing a second portion of the data in a second section different from the first section, and then storing a third portion of the data in the first section.

Abstract translation: 一种方法包括提供用于存储在存储器中的数据，其包括以具有与位线相关联的第一维度的三维（3-D）配置布置的多个模拟存储器单元，与字线相关联的第二维度，以及第三维度 与部分相关联。 根据在这些部分之间交替的编程顺序将数据存储在存储器单元中，包括在第一部分中存储数据的第一部分，然后将数据的第二部分存储在与第一部分不同的第二部分中 ，然后将数据的第三部分存储在第一部分中。

公开(公告)号：US08837214B2

公开(公告)日：2014-09-16

申请号：US13709303

申请日：2012-12-10

Applicant: Apple Inc.

Inventor： Yael Shur ,  Yoav Kasorla ,  Eyal Gurgi

IPC: G11C16/04 ,  G11C7/00

CPC classification number: G11C27/00 ,  G11C7/00 ,  G11C13/0002 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/0069 ,  G11C16/10 ,  G11C16/26 ,  G11C16/32 ,  G11C27/005

Abstract: A method includes, in an array of analog memory cells that are arranged in rows associated with respective word lines, reading a first group of the memory cells in a selected word line, including one or more memory cells that store a status of at least one word line in the array other than the selected word line. A readout configuration for a second group of the memory cells is set responsively to the read status. The second group of the memory cells is read using the readout configuration.

Abstract translation: 一种方法包括在与各个字线相关联的行中排列的模拟存储器单元的阵列中，读取选定字线中的第一组存储器单元，包括存储至少一个状态的一个或多个存储器单元 数组中除字线以外的所选字线。 响应于读取状态设置第二组存储器单元的读出配置。 使用读出配置读取第二组存储单元。

公开(公告)号：US20140215175A1

公开(公告)日：2014-07-31

申请号：US13755547

申请日：2013-01-31

Applicant: APPLE INC.

Inventor： Yoav Kasorla ,  Asaf Schushan ,  Asaf Vega ,  Eyal Gurgi ,  Shai Ojalvo

IPC: G11C7/10

CPC classification number: G06F13/161 ,  G06F13/24 ,  G06F13/26

Abstract: A method includes executing a first memory access operation in a memory. A progress indication, which is indicative of a progress of execution of the first memory access operation, is obtained from the memory. Based on the progress indication, a decision is made whether to suspend the execution of the first memory access operation in order to execute a second memory access operation.

Abstract translation: 一种方法包括在存储器中执行第一存储器访问操作。 从存储器获得指示执行第一存储器存取操作的进度指示。 基于进度指示，决定是否暂停执行第一存储器访问操作以便执行第二存储器访问操作。