公开(公告)号：US20190027605A1

公开(公告)日：2019-01-24

申请号：US15985298

申请日：2018-05-21

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joe Margetis

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/36 ,  H01L29/167

Abstract: A method for depositing a Group IV semiconductor on a surface of a substrate is disclosed. The method may include: providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include: exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA dopant precursor; wherein the at least one Group IIIA dopant precursor comprises a borohydride, an organic borohydride, a halide, or an organohalide. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

公开(公告)号：US20190019670A1

公开(公告)日：2019-01-17

申请号：US16000109

申请日：2018-06-05

Applicant: ASM IP Holding B.V.

Inventor： Xing Lin ,  Peipei Gao ,  Fei Wang ,  John Tolle ,  Bubesh Babu Jotheeswaran ,  Vish Ramanathan ,  Eric Hill

IPC: H01L21/02 ,  H01L21/67 ,  B08B5/00 ,  B08B7/00

Abstract: A system and method for removing both carbon-based contaminants and oxygen-based contaminants from a semiconductor substrate within a single process chamber is disclosed. The invention may comprise utilization of remote plasma units and multiple gas sources to perform the process within the single process chamber.

公开(公告)号：US20180312968A1

公开(公告)日：2018-11-01

申请号：US16029130

申请日：2018-07-06

Applicant: ASM IP HOLDING B.V.

Inventor： John Tolle ,  Eric Hill

IPC: C23C16/44 ,  C23C16/458 ,  C23C16/02 ,  C23C14/50 ,  C23C16/46 ,  H05B6/10 ,  C23C14/02

CPC classification number: C23C16/4405 ,  C23C14/021 ,  C23C14/50 ,  C23C16/0209 ,  C23C16/0218 ,  C23C16/458 ,  C23C16/4582 ,  C23C16/46 ,  H05B3/26 ,  H05B6/105

Abstract: A reactor system and related methods are provided which may include a heating element in a wafer tray. The heating element may be used to heat the wafer tray and a substrate or wafer seated on the wafer tray within a reaction chamber assembly, and may be used to cause sublimation of a native oxide of the wafer.

公开(公告)号：US20180151358A1

公开(公告)日：2018-05-31

申请号：US15863340

申请日：2018-01-05

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle ,  Gregory Bartlett ,  Nupur Bhargava

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/24

CPC classification number: H01L21/02636 ,  C23C16/24 ,  C23C16/455 ,  C23C16/45514 ,  C23C16/45574 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262

Abstract: A gas distribution system is disclosed in order to obtain better film uniformity on a substrate in a cross-flow reactor. The better film uniformity may be achieved by an asymmetric bias on individual injection ports of the gas distribution system. The gas distribution may allow for varied tunability of the film properties.

公开(公告)号：US20180127876A1

公开(公告)日：2018-05-10

申请号：US15860564

申请日：2018-01-02

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Eric Hill ,  Jereld Lee Winkler

IPC: C23C16/46 ,  H01J37/32 ,  C23C16/50 ,  C23C16/452 ,  C23C16/52

Abstract: A system and method for providing intermediate reactive species to a reaction chamber are disclosed. The system includes an intermediate reactive species formation chamber fluidly coupled to the reaction chamber to provide intermediate reactive species to the reaction chamber. A pressure control device can be used to control an operating pressure of the intermediate reactive species formation chamber, and a heater can be used to heat the intermediate reactive species formation chamber to a desired temperature.

公开(公告)号：US09892913B2

公开(公告)日：2018-02-13

申请号：US15450199

申请日：2017-03-06

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle ,  Gregory Bartlett ,  Nupur Bhargava

IPC: H01L21/20 ,  H01L21/02 ,  C23C16/455

CPC classification number: H01L21/02636 ,  C23C16/24 ,  C23C16/455 ,  C23C16/45514 ,  C23C16/45574 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262

Abstract: A gas distribution system is disclosed in order to obtain better film uniformity on a substrate in a cross-flow reactor. The better film uniformity may be achieved by an asymmetric bias on individual injection ports of the gas distribution system. The gas distribution may allow for varied tunability of the film properties.

公开(公告)号：US09647114B2

公开(公告)日：2017-05-09

申请号：US14827177

申请日：2015-08-14

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle

IPC: C23C16/00 ,  H01L29/78 ,  H01L21/02 ,  H01L29/161 ,  H01L29/167 ,  H01L29/08 ,  C23C16/455

CPC classification number: C23C16/455 ,  C23C16/0272 ,  C23C16/30 ,  C23C16/45512 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/167

Abstract: Methods of forming p-type doped germanium-tin layers, systems for forming the p-type doped germanium-tin layers, and structures including the p-type doped germanium-tin layers are disclosed. The p-type doped germanium-tin layers include an n-type dopant, which allows relatively high levels of tin and/or p-type dopant to be included into the p-type doped germanium-tin layers.

公开(公告)号：US20160254137A1

公开(公告)日：2016-09-01

申请号：US15083136

申请日：2016-03-28

Applicant: ASM IP HOLDING B.V.

Inventor： John Tolle ,  Matthew G. Goodman ,  Robert Michael Vyne ,  Eric R. Hill

IPC: H01L21/02 ,  C30B29/06 ,  C30B23/02 ,  C30B25/18 ,  B08B5/00 ,  B08B7/00

CPC classification number: H01L21/02049 ,  B08B5/00 ,  B08B7/0014 ,  B08B7/0071 ,  C30B23/025 ,  C30B25/186 ,  C30B29/06 ,  H01L21/02046 ,  H01L21/02068 ,  H01L21/0217 ,  H01L21/02301 ,  H01L21/02348 ,  H01L21/02532 ,  H01L21/02598 ,  H01L21/02636 ,  H01L21/02661 ,  H01L21/31116 ,  H01L21/3205 ,  H01L21/324

Abstract: A method for integrated circuit fabrication can include removing silicon oxide by a pre-clean process. The pre-clean process can include depositing a halogen-containing material on the surface of a substrate in a first reaction chamber, and transferring the substrate having the halogen-containing material to a second reaction chamber. Silicon oxide material can be removed from a surface of the substrate by sublimating the halogen-containing material in the second reaction chamber. A target material, such as a conductive material, may subsequently be deposited on the substrate surface in the second reaction chamber.

公开(公告)号：US09099423B2

公开(公告)日：2015-08-04

申请号：US14143719

申请日：2013-12-30

Applicant: ASM IP HOLDING B.V.

Inventor： Keith Doran Weeks ,  John Tolle ,  Matthew G. Goodman ,  Sandeep Mehta

IPC: H01L29/36 ,  H01L21/02 ,  H01L21/306

CPC classification number: H01L29/36 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/32135

Abstract: A method of forming a semiconductor material incorporating an electrical dopant is disclosed. In one aspect, a method of incorporating dopant in a semiconductor film comprises forming a first semiconductor material incorporating the dopant at a first dopant concentration and preferentially etching a portion of the first semiconductor material, wherein etching leaves a first etched semiconductor material incorporating the dopant at a second dopant concentration higher than the first dopant concentration.

Abstract translation: 公开了一种形成掺有电掺杂剂的半导体材料的方法。 在一个方面，一种在半导体膜中掺入掺杂剂的方法包括以第一掺杂剂浓度形成掺入掺杂剂的第一半导体材料，并优先蚀刻第一半导体材料的一部分，其中蚀刻留下掺入掺杂剂的第一蚀刻半导体材料 第二掺杂剂浓度高于第一掺杂剂浓度。

公开(公告)号：US20240321605A1

公开(公告)日：2024-09-26

申请号：US18678219

申请日：2024-05-30

Applicant: ASM IP Holding B.V.

Inventor： Shiva Rajavelu ,  John Tolle ,  Rich McCartney

IPC: H01L21/67 ,  C23C16/458 ,  C23C16/46 ,  C30B25/10

CPC classification number: H01L21/67115 ,  C30B25/10 ,  C30B25/105 ,  H01L21/67098 ,  H01L21/67248 ,  C23C16/4583 ,  C23C16/46

Abstract: A semiconductor processing apparatus is disclosed that may include a reaction chamber joined by an upstream inlet flange and a downstream outlet flange wherein a longitudinal direction of the chamber extends from the inlet flange to the outlet flange and a plurality of ribs are provided on an outer surface of at least an upper chamber wall. The semiconductor processing apparatus may also include at least one array of heating elements disposed above the reaction chamber and at least one variable positioning device coupled to the at least one array of heating elements and configured to controllably adjust the position of the at least one array of heating elements relative to the position of the plurality of ribs.