公开(公告)号：US20130161634A1

公开(公告)日：2013-06-27

申请号：US13335383

申请日：2011-12-22

申请人： Donald R. Disney ,  Isik C. Kizilyalli ,  Linda Romano ,  Andrew Edwards ,  Hui Nie

发明人： Donald R. Disney ,  Isik C. Kizilyalli ,  Linda Romano ,  Andrew Edwards ,  Hui Nie

IPC分类号： H01L29/18 ,  H01L21/302

CPC分类号： H01L29/872 ,  H01L21/0495 ,  H01L21/2654 ,  H01L21/76224 ,  H01L29/0611 ,  H01L29/0619 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/2003 ,  H01L29/402

摘要： A method for fabricating an edge termination, which can be used in conjunction with GaN-based materials, includes providing a substrate of a first conductivity type. The substrate has a first surface and a second surface. The method also includes forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate and forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type. The second GaN epitaxial layer is coupled to the first GaN epitaxial layer. The substrate, the first GaN epitaxial layer and the second GaN epitaxial layer can be referred to as an epitaxial structure.

摘要翻译： 可以与GaN基材料一起使用的用于制造边缘终端的方法包括提供第一导电类型的衬底。 基板具有第一表面和第二表面。 该方法还包括形成耦合到衬底的第一表面的第一导电类型的第一GaN外延层，并形成与第一导电类型相反的第二导电类型的第二GaN外延层。 第二GaN外延层耦合到第一GaN外延层。 衬底，第一GaN外延层和第二GaN外延层可以被称为外延结构。

公开(公告)号：US08741707B2

公开(公告)日：2014-06-03

申请号：US13335383

申请日：2011-12-22

申请人： Donald R. Disney ,  Isik C. Kizilyalli ,  Linda Romano ,  Andrew Edwards ,  Hui Nie

发明人： Donald R. Disney ,  Isik C. Kizilyalli ,  Linda Romano ,  Andrew Edwards ,  Hui Nie

IPC分类号： H01L21/338 ,  H01L29/18 ,  H01L29/872 ,  H01L29/06 ,  H01L29/20 ,  H01L21/04

CPC分类号： H01L29/872 ,  H01L21/0495 ,  H01L21/2654 ,  H01L21/76224 ,  H01L29/0611 ,  H01L29/0619 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/2003 ,  H01L29/402

摘要： A method for fabricating an edge termination, which can be used in conjunction with GaN-based materials, includes providing a substrate of a first conductivity type. The substrate has a first surface and a second surface. The method also includes forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate and forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type. The second GaN epitaxial layer is coupled to the first GaN epitaxial layer. The substrate, the first GaN epitaxial layer and the second GaN epitaxial layer can be referred to as an epitaxial structure.

摘要翻译： 可以与GaN基材料一起使用的用于制造边缘终端的方法包括提供第一导电类型的衬底。 基板具有第一表面和第二表面。 该方法还包括形成耦合到衬底的第一表面的第一导电类型的第一GaN外延层，并形成与第一导电类型相反的第二导电类型的第二GaN外延层。 第二GaN外延层耦合到第一GaN外延层。 衬底，第一GaN外延层和第二GaN外延层可以被称为外延结构。

公开(公告)号：US08785975B2

公开(公告)日：2014-07-22

申请号：US13529822

申请日：2012-06-21

申请人： Hui Nie ,  Andrew P. Edwards ,  Donald R. Disney ,  Isik C. Kizilyalli

发明人： Hui Nie ,  Andrew P. Edwards ,  Donald R. Disney ,  Isik C. Kizilyalli

IPC分类号： H01L27/088 ,  H01L29/778 ,  H01L29/06

CPC分类号： H01L21/0254 ,  H01L21/02664 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/0657 ,  H01L29/7786 ,  Y10S438/978

摘要： A semiconductor device includes a III-nitride substrate of a first conductivity type, a first III-nitride epitaxial layer of the first conductivity type coupled to the III-nitride substrate, and a first III-nitride epitaxial structure coupled to a first portion of a surface of the first III-nitride epitaxial layer. The first III-nitride epitaxial structure has a sidewall. The semiconductor device further includes a second III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial structure, a second III-nitride epitaxial layer of the first conductivity type coupled to the sidewall of the second III-nitride epitaxial layer and a second portion of the surface of the first III-nitride epitaxial layer, and a third III-nitride epitaxial layer of a second conductivity type coupled to the second III-nitride epitaxial layer. The semiconductor device also includes one or more dielectric structures coupled to a surface of the third III-nitride epitaxial layer.

摘要翻译： 半导体器件包括第一导电类型的III族氮化物衬底，耦合到III族氮化物衬底的第一导电类型的第一III族氮化物外延层和耦合到第一III族氮化物外延结构的第一部分 第一III族氮化物外延层的表面。 第一III族氮化物外延结构具有侧壁。 半导体器件还包括耦合到第一III族氮化物外延结构的第一导电类型的第二III族氮化物外延结构，第一导电类型的第二III族氮化物外延层耦合到第二III族氮化物外延的侧壁 层和第一III族氮化物外延层的表面的第二部分，以及耦合到第二III族氮化物外延层的第二导电类型的第三III族氮化物外延层。 半导体器件还包括耦合到第三III族氮化物外延层的表面的一个或多个电介质结构。

公开(公告)号：US20130341677A1

公开(公告)日：2013-12-26

申请号：US13529822

申请日：2012-06-21

申请人： Hui Nie ,  Donald R. Disney ,  Andrew P. Edwards ,  Isik C. Kizilyalli

发明人： Hui Nie ,  Donald R. Disney ,  Andrew P. Edwards ,  Isik C. Kizilyalli

IPC分类号： H01L27/088 ,  H01L21/8234

CPC分类号： H01L21/0254 ,  H01L21/02664 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/0657 ,  H01L29/7786 ,  Y10S438/978

摘要： A semiconductor device includes a III-nitride substrate of a first conductivity type, a first III-nitride epitaxial layer of the first conductivity type coupled to the III-nitride substrate, and a first III-nitride epitaxial structure coupled to a first portion of a surface of the first III-nitride epitaxial layer. The first III-nitride epitaxial structure has a sidewall. The semiconductor device further includes a second III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial structure, a second III-nitride epitaxial layer of the first conductivity type coupled to the sidewall of the second III-nitride epitaxial layer and a second portion of the surface of the first III-nitride epitaxial layer, and a third III-nitride epitaxial layer of a second conductivity type coupled to the second III-nitride epitaxial layer. The semiconductor device also includes one or more dielectric structures coupled to a surface of the third III-nitride epitaxial layer.

摘要翻译： 半导体器件包括第一导电类型的III族氮化物衬底，耦合到III族氮化物衬底的第一导电类型的第一III族氮化物外延层和耦合到第一III族氮化物外延结构的第一部分 第一III族氮化物外延层的表面。 第一III族氮化物外延结构具有侧壁。 半导体器件还包括耦合到第一III族氮化物外延结构的第一导电类型的第二III族氮化物外延结构，第一导电类型的第二III族氮化物外延层耦合到第二III族氮化物外延的侧壁 层和第一III族氮化物外延层的表面的第二部分，以及耦合到第二III族氮化物外延层的第二导电类型的第三III族氮化物外延层。 半导体器件还包括耦合到第三III族氮化物外延层的表面的一个或多个电介质结构。

公开(公告)号：US08698164B2

公开(公告)日：2014-04-15

申请号：US13315720

申请日：2011-12-09

申请人： Donald R. Disney ,  Hui Nie ,  Isik C. Kizilyalli ,  Richard J. Brown

发明人： Donald R. Disney ,  Hui Nie ,  Isik C. Kizilyalli ,  Richard J. Brown

IPC分类号： H01L29/808 ,  H01L21/335

CPC分类号： H01L29/8083 ,  H01L29/0623 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66446 ,  H01L29/66462 ,  H01L29/66909 ,  H01L29/66924

摘要： A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.

摘要翻译： 半导体结构包括具有第一表面和第二表面的GaN衬底。 GaN衬底的特征在于第一导电类型和第一掺杂剂浓度。 第一电极电耦合到GaN衬底的第二表面。 半导体结构还包括耦合到GaN衬底的第一表面的第一导电类型的第一GaN外延层和耦合到第一GaN外延层的第二导电类型的第二GaN层。 第一GaN外延层包括沟道区。 第二GaN外延层包括栅极区域和边缘端接结构。 耦合到栅极区域的第二电极和耦合到沟道区域的第三电极都设置在边缘端接结构内。

公开(公告)号：US20130161705A1

公开(公告)日：2013-06-27

申请号：US13334514

申请日：2011-12-22

申请人： Don Disney ,  Isik C. Kizilyalli ,  Hui Ne ,  Linda Romano ,  Richard J. Brown ,  Madhan Raj

发明人： Don Disney ,  Isik C. Kizilyalli ,  Hui Ne ,  Linda Romano ,  Richard J. Brown ,  Madhan Raj

IPC分类号： H01L29/808 ,  H01L21/337

CPC分类号： H01L29/66924 ,  H01L21/027 ,  H01L21/283 ,  H01L21/308 ,  H01L29/1095 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66446 ,  H01L29/66893 ,  H01L29/66909 ,  H01L29/66916 ,  H01L29/7832 ,  H01L29/808 ,  H01L29/8083 ,  H01L29/8086

摘要： A semiconductor device includes a III-nitride substrate, a first III-nitride epitaxial layer coupled to the III-nitride substrate and having a mesa, and a second III-nitride epitaxial layer coupled to a top surface of the mesa. The semiconductor device further includes a III-nitride gate structure coupled to a side surface of the mesa, and a spacer configured to provide electrical insulation between the second III-nitride epitaxial layer and the III-nitride gate structure.

摘要翻译： 半导体器件包括III族氮化物衬底，耦合到III族氮化物衬底并具有台面的第一III族氮化物外延层和耦合到台面的顶表面的第二III族氮化物外延层。 半导体器件还包括耦合到台面的侧表面的III族氮化物栅极结构，以及被配置为在第二III族氮化物外延层和III族氮化物栅极结构之间提供电绝缘的间隔物。

公开(公告)号：US20130146886A1

公开(公告)日：2013-06-13

申请号：US13315720

申请日：2011-12-09

申请人： Donald R. Disney ,  Hui Nie ,  Isik C. Kizilyalli ,  Richard J. Brown

发明人： Donald R. Disney ,  Hui Nie ,  Isik C. Kizilyalli ,  Richard J. Brown

IPC分类号： H01L29/808 ,  H01L21/335 ,  H01L29/20

CPC分类号： H01L29/8083 ,  H01L29/0623 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66446 ,  H01L29/66462 ,  H01L29/66909 ,  H01L29/66924

摘要： A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure.

摘要翻译： 半导体结构包括具有第一表面和第二表面的GaN衬底。 GaN衬底的特征在于第一导电类型和第一掺杂剂浓度。 第一电极电耦合到GaN衬底的第二表面。 半导体结构还包括耦合到GaN衬底的第一表面的第一导电类型的第一GaN外延层和耦合到第一GaN外延层的第二导电类型的第二GaN层。 第一GaN外延层包括沟道区。 第二GaN外延层包括栅极区域和边缘端接结构。 耦合到栅极区域的第二电极和耦合到沟道区域的第三电极都设置在边缘端接结构内。

公开(公告)号：US09716196B2

公开(公告)日：2017-07-25

申请号：US13023733

申请日：2011-02-09

申请人： Hui Nie ,  Brendan M. Kayes ,  Isik C. Kizilyalli

发明人： Hui Nie ,  Brendan M. Kayes ,  Isik C. Kizilyalli

IPC分类号： H01L31/0304 ,  H01L27/142 ,  H01L31/0735 ,  H01L31/0443

CPC分类号： H01L31/03046 ,  H01L27/142 ,  H01L31/0304 ,  H01L31/0443 ,  H01L31/0735 ,  Y02E10/544 ,  Y02P70/521

摘要： Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect.

公开(公告)号：US09006800B2

公开(公告)日：2015-04-14

申请号：US13326192

申请日：2011-12-14

申请人： Linda Romano ,  Andrew Edwards ,  Dave P. Bour ,  Isik C. Kizilyalli

发明人： Linda Romano ,  Andrew Edwards ,  Dave P. Bour ,  Isik C. Kizilyalli

IPC分类号： H01L29/66 ,  H01L29/20 ,  H01L29/201 ,  H01L29/205 ,  H01L29/45 ,  H01L29/808 ,  H01L29/10

CPC分类号： H01L29/66916 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/452 ,  H01L29/66924 ,  H01L29/8083

摘要： A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drift region, a gate region at least partially surrounding the channel region, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region. The source includes a GaN-layer coupled to an InGaN layer. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction.

摘要翻译： 垂直III族氮化物场效应晶体管包括：包含第一III族氮化物材料的漏极，与漏极电耦合的漏极接触点;以及漂移区域，包括耦合到漏极并邻近漏极设置的第二III族氮化物材料 垂直方向 场效应晶体管还包括沟道区，该沟道区包括耦合到漂移区的第三III族氮化物材料，至少部分围绕沟道区的栅极区和电耦合到栅极区的栅极接触。 场效应晶体管还包括耦合到沟道区的源极。 源包括耦合到InGaN层的GaN层。 沟道区域沿着垂直方向设置在漏极和源极之间，使得垂直III族氮化物场效应晶体管的工作期间的电流沿垂直方向。

公开(公告)号：US09093591B2

公开(公告)日：2015-07-28

申请号：US13451455

申请日：2012-04-19

申请人： Hui Nie ,  Brendan M. Kayes ,  Isik C. Kizilyalli

发明人： Hui Nie ,  Brendan M. Kayes ,  Isik C. Kizilyalli

IPC分类号： H01L21/04 ,  H01L31/0735 ,  H01L31/0224 ,  H01L31/18

摘要： Embodiments generally relate to optoelectronic semiconductor devices such as solar cells. In one aspect, a device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device and is made of a different material and having a higher bandgap than the absorber layer. A heterojunction is formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. An intermediate layer is located between the absorber layer and the emitter layer and provides the offset of the p-n junction from the heterojunction, and includes a graded layer and an ungraded back window layer.