公开(公告)号：US08222117B2

公开(公告)日：2012-07-17

申请号：US12076794

申请日：2008-03-24

申请人： Shunpei Yamazaki ,  Hideto Ohnuma

发明人： Shunpei Yamazaki ,  Hideto Ohnuma

IPC分类号： H01L21/30

CPC分类号： H01L21/76254 ,  G06K19/07749 ,  G06K19/0775 ,  G06K19/07786 ,  H01L21/84 ,  H01L24/83 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/83851 ,  H01L2924/00011 ,  H01L2924/01019 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2224/29075 ,  H01L2924/00014 ,  H01L2924/00

摘要： An SOI substrate and a manufacturing method of the SOI substrate, by which enlargement of the substrate is possible and its productivity can be increased, are provided. A step (A) of cutting a single crystal silicon substrate to form a single crystal silicon substrate which is n (n is an optional positive integer, n≧1) times as large as a size of one shot of an exposure apparatus; a step (B) of forming an insulating layer on one surface of the single crystal silicon substrate, and forming an embrittlement layer in the single crystal substrate; and a step (C) of bonding a substrate having an insulating surface and the single crystal silicon substrate with the insulating layer therebetween, and conducting heat treatment to separate the single crystal silicon substrate along the embrittlement layer, and forming a single crystal silicon thin film on the substrate having an insulating surface are conducted.

摘要翻译： 提供SOI衬底和SOI衬底的制造方法，通过其可以扩大衬底并提高其生产率。 一种切割单晶硅衬底以形成单一曝光设备的一个大小的n（n是任选的正整数，n≥1）倍的单晶硅衬底的步骤（A）; 在单晶硅衬底的一个表面上形成绝缘层并在单晶衬底中形成脆化层的步骤（B）; 以及使具有绝缘面的基板与单晶硅基板之间具有绝缘层的步骤（C），并进行热处理以沿着脆化层分离单晶硅基板，并且形成单晶硅薄膜 在具有绝缘表面的基板上进行。

公开(公告)号：US08143118B2

公开(公告)日：2012-03-27

申请号：US12073618

申请日：2008-03-07

申请人： Hideto Ohnuma ,  Atsuo Isobe ,  Hiromichi Godo

发明人： Hideto Ohnuma ,  Atsuo Isobe ,  Hiromichi Godo

IPC分类号： H01L21/84

CPC分类号： H01L29/78696 ,  H01L21/0237 ,  H01L21/02675 ,  H01L21/02691 ,  H01L27/1281

摘要： A semiconductor device having a highly responsive thin film transistor (TFT) with low subthreshold swing and suppressed decrease in the on-state current and a manufacturing method thereof are demonstrated. The TFT of the present invention is characterized by its semiconductor layer where the thickness of the source region or the drain region is larger than that of the channel formation region. Manufacture of the TFT is readily achieved by the formation of an amorphous semiconductor layer on a projection portion and a depression portion, which is followed by subjecting the melting process of the semiconductor layer, resulting in the formation of a crystalline semiconductor layer having different thicknesses. Selective addition of impurity to the thick portion of the semiconductor layer provides a semiconductor layer in which the channel formation region is thinner than the source or drain region.

摘要翻译： 示出了具有低亚阈值摆动和抑制导通电流下降的高响应性薄膜晶体管（TFT）的半导体器件及其制造方法。 本发明的TFT的特征在于其源极区域或漏极区域的厚度大于沟道形成区域的厚度的半导体层。 通过在突起部分和凹陷部分上形成非晶半导体层来容易地实现TFT的制造，随后对半导体层进行熔化处理，形成具有不同厚度的晶体半导体层。 选择性地向半导体层的厚部分添加杂质提供了沟道形成区域比源区或漏区更薄的半导体层。

公开(公告)号：US08110478B2

公开(公告)日：2012-02-07

申请号：US12253301

申请日：2008-10-17

申请人： Shunpei Yamazaki ,  Hideto Ohnuma ,  Jun Koyama

发明人： Shunpei Yamazaki ,  Hideto Ohnuma ,  Jun Koyama

IPC分类号： H01L21/76

CPC分类号： H01L27/1266 ,  C03C17/3435 ,  C03C17/3482 ,  C03C2218/32 ,  H01L21/76254 ,  H01L27/1214 ,  H01L29/66772 ,  Y10S438/938 ,  Y10S438/961

摘要： If the size of a single crystal silicon layer attached is not appropriate, even when a large glass substrate is used, the number of panels to be obtained cannot be maximized. Therefore, in the present invention, a substantially quadrangular single crystal semiconductor substrate is formed from a substantially circular single crystal semiconductor wafer, and a damaged layer is formed by irradiation with an ion beam into the single crystal semiconductor substrate. A plurality of the single crystal semiconductor substrates are arranged so as to be separated from each other over one surface of a supporting substrate. By thermal treatment, a crack is generated in the damaged layer and the single crystal semiconductor substrate is separated while a single semiconductor layer is left over the supporting substrate. After that, one or a plurality of display panels is manufactured from the single crystal semiconductor layer bonded to the supporting substrate.

摘要翻译： 如果附着的单晶硅层的尺寸不合适，即使使用大的玻璃基板，也不能使要获得的面板的数量最大化。 因此，在本发明中，从大致圆形的单晶半导体晶片形成大致四边形的单晶半导体基板，通过将离子束照射到单晶半导体基板中形成损伤层。 多个单晶半导体基板被布置成在支撑基板的一个表面上彼此分离。 通过热处理，在损伤层中产生裂纹，并且单个半导体衬底被分离，而单个半导体层留在支撑衬底上。 之后，从结合到支撑基板的单晶半导体层制造一个或多个显示面板。

公开(公告)号：US20100248444A1

公开(公告)日：2010-09-30

申请号：US12729983

申请日：2010-03-23

申请人： Shunpei Yamazaki ,  Masaki Koyama ,  Kosei Noda ,  Kenichiro Makino ,  Hideto Ohnuma ,  Kosei Nei

发明人： Shunpei Yamazaki ,  Masaki Koyama ,  Kosei Noda ,  Kenichiro Makino ,  Hideto Ohnuma ,  Kosei Nei

IPC分类号： H01L21/762 ,  C30B1/02

CPC分类号： H01L27/1274 ,  C30B13/24 ,  C30B29/06 ,  C30B31/22 ,  C30B33/02 ,  C30B33/06 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02675 ,  H01L21/76254 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/1281 ,  H01L29/66772

摘要： A single crystal semiconductor separated from a single crystal semiconductor substrate is formed partly over a supporting substrate with a buffer layer provided therebetween. The single crystal semiconductor is separated from the single crystal semiconductor substrate by irradiation with accelerated ions, formation of a fragile layer by the ion irradiation, and heat treatment. A non-single crystal semiconductor layer is formed over the single crystal semiconductor and irradiated with a laser beam to be crystallized, whereby an SOI substrate is manufactured.

摘要翻译： 从单晶半导体衬底分离的单晶半导体部分地在支撑衬底上形成，其间设置有缓冲层。 通过照射加速离子，通过离子照射形成脆性层，进行热处理，将单晶半导体与单晶半导体基板分离。 在单晶半导体上形成非单晶半导体层，并照射待结晶的激光束，由此制造SOI衬底。

公开(公告)号：US07772054B2

公开(公告)日：2010-08-10

申请号：US12131151

申请日：2008-06-02

申请人： Hideto Ohnuma

发明人： Hideto Ohnuma

IPC分类号： H01L21/84

CPC分类号： H01L27/12 ,  H01L27/1266 ,  H01L29/66772 ,  H01L29/78654

摘要： A highly responsive semiconductor device in which the subthreshold swing (S value) is small and reduction in on-current is suppressed is manufactured. A semiconductor layer in which a thickness of a source region or a drain region is larger than that of a channel formation region is formed. A semiconductor layer having a concavo-convex shape which is included in the semiconductor device is formed by the steps of forming a first semiconductor layer over a substrate; forming a first insulating layer and a conductive layer over the first semiconductor layer; forming a second insulating layer over a side surface of the conductive layer; forming a second semiconductor layer over the first insulating layer, the conductive layer and the second insulating layer; etching the second semiconductor layer using a resist formed partially as a mask; and performing heat treatment to the first semiconductor layer and the second semiconductor layer.

摘要翻译： 制造其中亚阈值摆动（S值）小并且抑制导通电流降低的高响应性半导体器件。 形成源极区域或漏极区域的厚度大于沟道形成区域的厚度的半导体层。 包括在半导体器件中的具有凹凸形状的半导体层通过以下步骤形成：在衬底上形成第一半导体层; 在所述第一半导体层上形成第一绝缘层和导电层; 在所述导电层的侧表面上形成第二绝缘层; 在所述第一绝缘层，所述导电层和所述第二绝缘层上形成第二半导体层; 使用部分作为掩模形成的抗蚀剂蚀刻第二半导体层; 对第一半导体层和第二半导体层进行热处理。

公开(公告)号：US07767542B2

公开(公告)日：2010-08-03

申请号：US12078091

申请日：2008-03-27

申请人： Hideto Ohnuma ,  Yoichi Iikubo ,  Takayoshi Sato

发明人： Hideto Ohnuma ,  Yoichi Iikubo ,  Takayoshi Sato

IPC分类号： H01L21/30 ,  H01L21/46

CPC分类号： H01L27/1266 ,  H01L21/76259 ,  H01L27/1214 ,  H01L29/66772

摘要： There is provided a method of manufacturing an SOI substrate which is practicable even when a supporting substrate having a low allowable temperature limit is used. A separation layer is formed in a region at a certain depth from a surface of a semiconductor substrate, and a first heat treatment is conducted when a semiconductor layer on the separation layer is bonded to the supporting substrate and separated. A second heat treatment is conducted to the supporting substrate to which the semiconductor layer is bonded. The second heat treatment is conducted at a temperature which is equal to or higher than the temperature of the first heat treatment and does not exceed a strain point of the supporting substrate. When the first heat treatment and the second heat treatment are conducted at the same temperature, a treatment time of the second heat treatment may be set to be longer.

摘要翻译： 提供了制造SOI衬底的方法，即使使用具有低允许温度极限的支撑衬底也是可行的。 在与半导体衬底的表面一定深度的区域中形成分离层，并且当分离层上的半导体层结合到支撑衬底上并分离时，进行第一热处理。 对与半导体层接合的支撑基板进行第二热处理。 第二热处理在等于或高于第一热处理的温度的温度下进行，并且不超过支撑基板的应变点。 当在相同温度下进行第一热处理和第二热处理时，可以将第二热处理的处理时间设定得更长。

公开(公告)号：US20100047952A1

公开(公告)日：2010-02-25

申请号：US12341699

申请日：2008-12-22

申请人： Hideto Ohnuma ,  Takashi Hirose

发明人： Hideto Ohnuma ,  Takashi Hirose

IPC分类号： H01L21/322 ,  H01L31/00

CPC分类号： H01L31/0236 ,  H01L31/02363 ,  H01L31/076 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

摘要： A fragile layer is formed in a single crystal silicon substrate, a first impurity silicon layer is formed on the one surface side in the single crystal silicon substrate, and a first electrode is formed thereover. After one surface of a supporting substrate and the first electrode are bonded, the single crystal silicon substrate is separated along the fragile layer to form a single crystal silicon layer over the supporting substrate. Crystal defect repair treatment or crystal defect elimination treatment of the single crystal silicon layer is performed; then, epitaxial growth is conducted on the single crystal silicon layer by activating a source gas containing at least a silane-based gas with plasma generated at atmospheric pressure or near atmospheric pressure. A second impurity silicon layer is formed on a surface side in the single crystal silicon layer which is epitaxial grown.

摘要翻译： 在单晶硅衬底中形成脆性层，在单晶硅衬底的一个表面侧形成第一杂质硅层，并在其上形成第一电极。 在支撑基板的一个表面和第一电极接合之后，沿着脆性层分离单晶硅基板，以在支撑基板上形成单晶硅层。 执行晶体缺陷修复处理或单晶硅层的晶体缺陷消除处理; 然后通过在大气压或接近大气压下产生的等离子体激活至少含有硅烷系气体的源气体，在单晶硅层上进行外延生长。 在外延生长的单晶硅层的表面侧形成第二杂质硅层。

公开(公告)号：US20090309183A1

公开(公告)日：2009-12-17

申请号：US12546719

申请日：2009-08-25

申请人： Shunpei Yamazaki ,  Hideto Ohnuma

发明人： Shunpei Yamazaki ,  Hideto Ohnuma

IPC分类号： H01L21/762 ,  H01L27/12 ,  H01L23/544

CPC分类号： H01L27/1266 ,  H01L21/3081 ,  H01L21/76254 ,  H01L27/1214 ,  H01L29/66772

摘要： An object is to provide a method for manufacturing, with high yield, a semiconductor device having a crystalline semiconductor layer even if a substrate with low upper temperature limit. A groove is formed in a part of a semiconductor substrate to form a semiconductor substrate that has a projecting portion, and a bonding layer is formed to cover the projecting portion. In addition, before the bonding layer is formed, a portion of the semiconductor substrate to be the projecting portion is irradiated with accelerated ions to form a brittle layer. After the bonding layer and the supporting substrate are bonded together, heat treatment for separation of the semiconductor substrate is performed to provide a semiconductor layer over the supporting substrate. The semiconductor layer is selectively etched, and a semiconductor element is formed and a semiconductor device is manufactured.

摘要翻译： 本发明的目的是提供一种制造具有晶体半导体层的半导体器件的高产率的方法，即使是具有低的上限极限的衬底。 在半导体衬底的一部分中形成沟槽以形成具有突出部分的半导体衬底，并且形成接合层以覆盖突出部分。 此外，在形成接合层之前，用加速离子照射作为突出部分的半导体衬底的一部分以形成脆性层。 在接合层和支撑基板接合在一起之后，进行用于分离半导体衬底的热处理，以在支撑衬底上提供半导体层。 选择性地蚀刻半导体层，形成半导体元件并制造半导体器件。

公开(公告)号：US07569440B2

公开(公告)日：2009-08-04

申请号：US11134291

申请日：2005-05-23

申请人： Shunpei Yamazaki ,  Satoshi Teramoto ,  Naoto Kusumoto ,  Hideto Ohnuma

发明人： Shunpei Yamazaki ,  Satoshi Teramoto ,  Naoto Kusumoto ,  Hideto Ohnuma

IPC分类号： H01L21/84

CPC分类号： H01L27/12 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02686 ,  H01L21/2026 ,  H01L21/3003 ,  H01L21/67155 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78675

摘要： A method of manufacturing a semiconductor device, comprises the steps of: forming an amorphous silicon film on a substrate having an insulating surface; processing said amorphous silicon film by plasma of a gas that mainly contains hydrogen or helium; and giving an energy to said amorphous silicon film.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤：在具有绝缘表面的衬底上形成非晶硅膜; 通过主要含有氢或氦的气体的等离子体处理所述非晶硅膜; 并向所述非晶硅膜提供能量。

公开(公告)号：US07534670B2

公开(公告)日：2009-05-19

申请号：US11148288

申请日：2005-06-09

申请人： Osamu Nakamura ,  Masayuki Kajiwara ,  Shunpei Yamazaki ,  Hideto Ohnuma

发明人： Osamu Nakamura ,  Masayuki Kajiwara ,  Shunpei Yamazaki ,  Hideto Ohnuma

IPC分类号： H01L21/337

CPC分类号： H01L29/78675 ,  H01L21/3221 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/32 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78663

摘要： Provided is a technique of effectively removing a metallic element that has catalytic action in terms of the crystallization of a semiconductor film and remains in a semiconductor film obtained using the metallic element. With the technique of the present invention, to remove a catalytic element used to crystallize a semiconductor film having an amorphous structure, gettering is completed by forming a region or a semiconductor film, to which a rare gas element is added, and by having the catalytic element move to the formed region or semiconductor film.