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    Semiconductor memory devices and signal line arrangements and related methods
    51.
    发明授权
    Semiconductor memory devices and signal line arrangements and related methods 失效
    半导体存储器件和信号线布置及相关方法

    公开(公告)号：US07259978B2

    公开(公告)日：2007-08-21

    申请号：US11221684

    申请日：2005-09-08

    申请人： Chul-Woo Park ,  Jung-Bae Lee ,  Young-Sun Min ,  Jong-Hyun Choi ,  Jong-Eon Lee

    发明人： Chul-Woo Park ,  Jung-Bae Lee ,  Young-Sun Min ,  Jong-Hyun Choi ,  Jong-Eon Lee

    IPC分类号： G11C5/06

    CPC分类号： G11C5/063 ,  G11C7/18 ,  G11C8/14

    摘要： A semiconductor memory device may include a memory cell array, a bit line sense amplifier, a sub word line driver, and an electrode. The memory cell array may include a sub memory cell array connected between sub word lines and bit line pairs and having memory cells which are selected in response to a signal transmitted to the sub word lines and column selecting signal lines. The bit line sense amplifier may be configures to sense and amplify data of the bit line pairs. The sub word line driver may be configured to combine signals transmitted from word selecting signal lines and signals transmitted from main word lines to select the sub word lines. Moreover, the memory cell array may be configured to transmit data between the bit line pairs and local data line pairs and to transmit data between the local data line pairs and global data line pairs. The electrode may be configured to cover the whole memory cell array and to apply a voltage needed for the memory cells. The local data line pairs may be arranged on a first layer above the electrode in the same direction as the sub word line. The column selecting signal lines and the global data line pairs may be arranged on a second layer above the electrode in the same direction as the bit line. The word selecting signal lines and the main word lines may be arranged on a third layer above the electrode in the same direction as the sub word line. Related methods of signal line arrangement are also discussed.

    摘要翻译： 半导体存储器件可以包括存储单元阵列，位线读出放大器，子字线驱动器和电极。 存储单元阵列可以包括连接在子字线和位线对之间并具有响应于发送到子字线和列选择信号线的信号而被选择的存储器单元的子存储单元阵列。 位线读出放大器可以被配置为感测和放大位线对的数据。 子字线驱动器可以被配置为组合从字选择信号线发送的信号和从主字线发送的信号，以选择子字线。 此外，存储单元阵列可以被配置为在位线对和本地数据线对之间传输数据，并且在本地数据线对和全局数据线对之间传送数据。 电极可以被配置为覆盖整个存储单元阵列并施加存储单元所需的电压。 局部数据线对可以以与子字线相同的方向布置在电极上方的第一层上。 列选择信号线和全局数据线对可以以与位线相同的方向布置在电极上方的第二层上。 字选择信号线和主字线可以沿与子字线相同的方向布置在电极上方的第三层上。 还讨论了信号线布置的相关方法。

    Semiconductor memory devices having conductive line in twisted areas of twisted bit line pairs
    52.
    发明授权
    Semiconductor memory devices having conductive line in twisted areas of twisted bit line pairs 失效
    半导体存储器件在绞合位线对的扭转区域具有导线

    公开(公告)号：US07242602B2

    公开(公告)日：2007-07-10

    申请号：US11002034

    申请日：2004-12-02

    申请人： Chang-Ho Lee ,  Jong-Hyun Choi

    发明人： Chang-Ho Lee ,  Jong-Hyun Choi

    IPC分类号： G11C5/08 ,  G11C5/06 ,  G11C11/12

    CPC分类号： G11C11/4097 ,  G11C5/14 ,  G11C7/02 ,  Y10S257/907

    摘要： A semiconductor memory device includes spaced apart twisted bit line pairs, a respective one of which includes a spaced apart twisted area. A conductive line overlaps the respective twisted areas of the spaced apart twisted line pairs. The conductive line can extend parallel to the memory device word lines, and can provide a power supply ground and/or signal line.

    摘要翻译： 半导体存储器件包括间隔开的扭曲位线对，其相应的一个包括间隔开的扭曲区域。 导线与间隔开的扭绞线对的相应扭曲区域重叠。 导线可以平行于存储器件字线延伸，并且可以提供电源接地和/或信号线。

    System and method for performing partial array self-refresh operation in a semiconductor memory device
    53.
    发明授权
    System and method for performing partial array self-refresh operation in a semiconductor memory device 有权

    公开(公告)号：US06992943B2

    公开(公告)日：2006-01-31

    申请号：US10959804

    申请日：2004-10-06

    申请人： Hyong-Ryol Hwang ,  Jong-Hyun Choi ,  Hyun-Soon Jang

    发明人： Hyong-Ryol Hwang ,  Jong-Hyun Choi ,  Hyun-Soon Jang

    IPC分类号： G11C7/00

    CPC分类号： G11C11/40622 ,  G11C7/1018 ,  G11C11/406 ,  G11C11/4087

    摘要： Systems and methods for performing a PASR (partial array self-refresh) operation wherein a refresh operation for recharging stored data is performed on a portion (e.g., ½ ¼, ⅛, or 1/16) of one or more selected memory banks comprising a cell array in a semiconductor memory device. In one aspect, a PASR operation is performed by (1) controlling the generation of row addresses by a row address counter during a self-refresh operation and (2) controlling a self-refresh cycle generating circuit to adjust the self-refresh cycle output therefrom. The self-refresh cycle is adjusted in a manner that provides a reduction in the current dissipation during the PASR operation. In another aspect, a PASR operation is performed by controlling one or more row addresses corresponding to a partial cell array during a self-refresh operation, whereby a reduction in a self-refresh current dissipation is achieved by blocking the activation of a non-used block of a memory bank.

    Decoding circuit for controlling activation of wordlines in a semiconductor memory device
    55.
    发明授权
    Decoding circuit for controlling activation of wordlines in a semiconductor memory device 失效
    用于控制半导体存储器件中的字线激活的解码电路

    公开(公告)号：US06490222B2

    公开(公告)日：2002-12-03

    申请号：US09875371

    申请日：2001-06-05

    申请人： Jong-Hyun Choi ,  Sang-Seok Kang ,  Jei-Hwan Yoo ,  Jae-Hoon Joo

    发明人： Jong-Hyun Choi ,  Sang-Seok Kang ,  Jei-Hwan Yoo ,  Jae-Hoon Joo

    IPC分类号： G11C800

    CPC分类号： G11C8/08 ,  G11C8/14 ,  G11C29/34

    摘要： A semiconductor memory device of the invention includes: main decoders for generating wordline enable signals in response to first decoding signals, a first precharge signal, and a second precharge signal; wordline drivers for wordline drive signals in response to the wordline enable signals and second decoding signals; and a circuit for generating the second precharge signal in response to a command signal. The wordline drive signals are inactivated in sequence in response to the first decoding signals and the second precharge signal, in order to reducing ground noises.

    摘要翻译： 本发明的半导体存储器件包括：主解码器，用于响应于第一解码信号，第一预充电信号和第二预充电信号产生字线使能信号; 响应于字线使能信号和第二解码信号的字线驱动信号的字线驱动器; 以及用于响应于命令信号产生第二预充电信号的电路。 响应于第一解码信号和第二预充电信号，字线驱动信号被顺序地去激活，以便减少地面噪声。

    Scan driving circuit and method of repairing the same
    58.
    发明授权
    Scan driving circuit and method of repairing the same 有权
    扫描驱动电路及其修理方法

    公开(公告)号：US09152251B2

    公开(公告)日：2015-10-06

    申请号：US13477204

    申请日：2012-05-22

    申请人： Guang-Hai Jin ,  Jae-Beom Choi ,  Kwan-Wook Jung ,  June-Woo Lee ,  Moo-Jin Kim ,  Jong-Hyun Choi

    发明人： Guang-Hai Jin ,  Jae-Beom Choi ,  Kwan-Wook Jung ,  June-Woo Lee ,  Moo-Jin Kim ,  Jong-Hyun Choi

    IPC分类号： G09G3/30 ,  G09G3/32 ,  G06F3/038

    CPC分类号： G06F3/038 ,  G09G3/30 ,  G09G3/3266 ,  G09G2330/08

    摘要： A scan driving circuit includes a shift register configured to sequentially output a first scan signal to scan lines through respective first output lines during a first section of a frame period, a simultaneous switching block configured to simultaneously output a second scan signal to the scan lines through respective second output lines during a second section of the frame period, the first and second periods of the frame period being different from each other, a switching device electrically connected to the second output line, and a repair line across the first output line and the second output line.

    摘要翻译： 扫描驱动电路包括：移位寄存器，被配置为在帧周期的第一部分期间顺序地输出第一扫描信号以扫描线通过相应的第一输出线;同时切换块，被配置为同时向扫描线通过第二扫描信号 在帧周期的第二部分期间相应的第二输出线，帧周期的第一和第二周期彼此不同，电连接到第二输出线的开关装置和穿过第一输出线的修复线和 第二输出线。

    Organic light-emitting display device and method of manufacturing the same
    59.
    发明授权
    Organic light-emitting display device and method of manufacturing the same 有权
    有机发光显示装置及其制造方法

    公开(公告)号：US08822999B2

    公开(公告)日：2014-09-02

    申请号：US13313596

    申请日：2011-12-07

    申请人： Jong-Hyun Choi ,  Kwang-Hae Kim

    发明人： Jong-Hyun Choi ,  Kwang-Hae Kim

    IPC分类号： H01L33/42 ,  H01L33/16 ,  H01L33/08

    CPC分类号： H01L27/3265 ,  H01L27/1255 ,  H01L27/3262 ,  H01L29/4908

    摘要： An organic light-emitting display device includes a capacitor lower electrode that includes a semiconductor material doped with ion impurities. A first insulating layer covers an active layer and the capacitor lower electrode. A gate electrode includes a gate lower electrode formed of a transparent conductive material and a gate upper electrode formed of metal. A pixel electrode is electrically connected to the thin film transistor. A capacitor upper electrode is at the same level as the pixel electrode. An etch block layer is formed between the first insulating layer and the capacitor upper electrode. Source and drain electrodes are electrically connected to the active layer. A second insulating layer has an opening completely exposing the capacitor upper electrode. A third insulating layer exposes the pixel electrode. An intermediate layer includes an emissive layer. An opposite electrode faces the pixel electrode.

    摘要翻译： 有机发光显示装置包括具有掺杂有离子杂质的半导体材料的电容器下电极。 第一绝缘层覆盖有源层和电容器下电极。 栅电极包括由透明导电材料形成的栅极下电极和由金属形成的栅极上电极。 像素电极电连接到薄膜晶体管。 电容器上电极与像素电极处于同一水平。 在第一绝缘层和电容器上电极之间形成蚀刻阻挡层。 源电极和漏电极电连接到有源层。 第二绝缘层具有完全暴露电容器上电极的开口。 第三绝缘层暴露像素电极。 中间层包括发射层。 相对电极面对像素电极。

    Organic light emitting diode display including source and drain electrodes separated from a gate electrode
    60.
    发明授权
    Organic light emitting diode display including source and drain electrodes separated from a gate electrode 有权
    有机发光二极管显示器包括从栅电极分离的源极和漏极

    公开(公告)号：US08669700B2

    公开(公告)日：2014-03-11

    申请号：US12923136

    申请日：2010-09-03

    申请人： Jong-Hyun Choi ,  Jae-Kyeong Jeong ,  Hui-Won Yang

    发明人： Jong-Hyun Choi ,  Jae-Kyeong Jeong ,  Hui-Won Yang

    IPC分类号： H01L51/50 ,  H01L51/52 ,  H01L29/41 ,  H01L29/786

    CPC分类号： H01L27/1225 ,  H01L27/124 ,  H01L27/3262

    摘要： An organic light emitting diode (OLED) display includes a substrate main body, a thin film transistor formed on the substrate main body, and an OLED formed on the substrate main body. The thin film transistor includes a gate electrode, an oxide semiconductor layer disposed on the gate electrode in an insulated manner, and source and drain electrodes respectively contacting the oxide semiconductor layer. Parts of the source and drain electrodes contacting the oxide semiconductor layer are separated from the gate electrode in a direction that is parallel with the substrate main body by a predetermined distance.

    摘要翻译： 有机发光二极管（OLED）显示器包括基板主体，形成在基板主体上的薄膜晶体管和形成在基板主体上的OLED。 薄膜晶体管包括栅电极，以绝缘方式设置在栅电极上的氧化物半导体层，以及分别与氧化物半导体层接触的源极和漏极。 与氧化物半导体层接触的源电极和漏电极的一部分在与基板主体平行的方向上与栅电极分开预定距离。