公开(公告)号：US5477065A

公开(公告)日：1995-12-19

申请号：US191132

申请日：1994-01-24

申请人： Akio Nakagawa ,  Tsuneo Ogura

发明人： Akio Nakagawa ,  Tsuneo Ogura

IPC分类号： H01L21/8234 ,  H01L21/98 ,  H01L23/433 ,  H01L23/538 ,  H01L25/065 ,  H01L25/07 ,  H01L25/16 ,  H01L25/18 ,  H01L27/00 ,  H01L27/01 ,  H01L27/082 ,  H01L27/088 ,  H01L27/12 ,  H01L27/15 ,  H01L29/73 ,  H01L29/739 ,  H01L29/74 ,  H01L29/78 ,  H01L29/786 ,  H01L31/12 ,  H01L29/749

CPC分类号： H01L29/7317 ,  H01L23/4334 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/25 ,  H01L24/73 ,  H01L24/82 ,  H01L25/16 ,  H01L25/18 ,  H01L25/50 ,  H01L27/082 ,  H01L27/1203 ,  H01L29/7436 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24051 ,  H01L2224/24137 ,  H01L2224/24147 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/48463 ,  H01L2224/73227 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12043 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107

摘要： A composite integrated circuit device includes a semiconductor element chip, a positioning guide formed on the semiconductor element chip, and an electronic element set in a preset position on the semiconductor element chip in a self-alignment manner by means of the positioning guide and mounted thereon. Also disclosed is are lateral, thin film devices with tapered shapes to reduce breakdown.

摘要翻译： 复合集成电路器件包括半导体元件芯片，形成在半导体元件芯片上的定位引导件和通过定位引导件以自对准方式设置在半导体元件芯片上的预设位置的电子元件并安装在其上 。 还公开了具有锥形形状以减少击穿的横向薄膜装置。

公开(公告)号：US5443524A

公开(公告)日：1995-08-22

申请号：US73418

申请日：1993-06-09

申请人： Seishi Sawamura ,  Sakuya Nakajima ,  Kunio Amemori ,  Hidehisa Oku ,  Akio Nakagawa ,  Ichiro Kitayama ,  Mikio Yuki ,  Shiro Horiguchi ,  Yoshihisa Araki ,  Shigeru Yuki ,  Toshihiro Hamada

发明人： Seishi Sawamura ,  Sakuya Nakajima ,  Kunio Amemori ,  Hidehisa Oku ,  Akio Nakagawa ,  Ichiro Kitayama ,  Mikio Yuki ,  Shiro Horiguchi ,  Yoshihisa Araki ,  Shigeru Yuki ,  Toshihiro Hamada

IPC分类号： A61F2/64 ,  A61F2/68 ,  A61F2/70 ,  A61F2/72 ,  A61F2/74

CPC分类号： A61F2/68 ,  A61F2/64 ,  A61F2/70 ,  A61F2002/705 ,  A61F2002/747

摘要： The present invention is intended to provide a teaching playback swing-phase-controlled above knee prosthesis which enables an external data setting to set the mechanism of the teaching playback swing-phase-controlled above knee prosthesis for conditions that enable the mechanism to operate for motions according to a walking speed. The teaching playback swing-phase-controlled above knee prosthesis includes a structural body having a thigh frame and a leg frame pivotally joined to the thigh frame for swing motion relative to the thigh frame, an air cylinder having a cylinder body, a piston axially slidably fitted in the cylinder body and provided with a valve, and a piston rod having one end fixed to the piston and the other end pivotally joined to the thigh frame, and a stepping motor for adjusting the opening of the valve of the cylinder. The opening of the valve of the cylinder is adjusted by the stepping motor to regulate sliding speed of the piston by adjusting the resistance against the flow of air through the valve so that the leg frame is able to swing relative to the thigh frame properly according to a predetermined walking speed. Data concerning the opening of the valve is taught to the teaching playback swing-phase-controlled above knee prosthesis by signals sent out by an external data setting device.

摘要翻译： 本发明旨在提供一种教学重放摆动相位控制的膝关节假体，其使得外部数据设置能够将使得该机构能够运动的条件的条件设定在膝关节假体上方的摆动相位控制的回放机构 根据步行速度。 在膝关节假体上方的回放摆动相控制的教学回放包括具有大腿框架和枢转地连接到大腿框架以相对于大腿框架摆动的腿架的结构体，气缸，具有缸体，活塞可轴​​向滑动 安装在缸体中并设置有阀，以及活塞杆，其一端固定到活塞，另一端枢转地连接到大腿架;以及步进电机，用于调节气缸的阀的开度。 通过步进电机调节气缸阀门的开度，通过调节抵抗通过阀门的空气流动的阻力来调节活塞的滑动速度，使得腿架能够相对于大腿架适当地摆动，根据 预定行走速度。 通过由外部数据设定装置发出的信号，教导了关于阀的打开的数据。

公开(公告)号：US5381026A

公开(公告)日：1995-01-10

申请号：US760344

申请日：1991-09-16

申请人： Takashi Shinohe ,  Kazuya Nakayama ,  Minami Takeuchi ,  Masakazu Yamaguchi ,  Mitsuhiko Kitagawa ,  Ichiro Omura ,  Akio Nakagawa

发明人： Takashi Shinohe ,  Kazuya Nakayama ,  Minami Takeuchi ,  Masakazu Yamaguchi ,  Mitsuhiko Kitagawa ,  Ichiro Omura ,  Akio Nakagawa

IPC分类号： H01L29/423 ,  H01L29/745 ,  H01L29/749 ,  H01L27/08 ,  H01L29/74

CPC分类号： H01L29/7455 ,  H01L29/42308 ,  H01L29/749

摘要： Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.

公开(公告)号：US5332920A

公开(公告)日：1994-07-26

申请号：US850964

申请日：1992-03-11

申请人： Akio Nakagawa ,  Kazuyoshi Furukawa ,  Tsuneo Ogura ,  Katsujiro Tanzawa

发明人： Akio Nakagawa ,  Kazuyoshi Furukawa ,  Tsuneo Ogura ,  Katsujiro Tanzawa

IPC分类号： H01L21/761 ,  H01L21/762 ,  H01L21/763 ,  H01L27/088 ,  H01L27/12 ,  H01L29/739 ,  H01L29/70

CPC分类号： H01L21/76264 ,  H01L21/761 ,  H01L21/76297 ,  H01L21/763 ,  H01L27/088 ,  H01L27/1203 ,  H01L29/7394 ,  H01L21/76275 ,  H01L21/76283 ,  H01L21/76286 ,  H01L2924/10158

摘要： A dielectric isolation substrate comprises a first semiconductor wafer, a second semiconductor wafer bonded on the first semiconductor wafer with a first insulating layer interposed therebetween, a semiconductor layer formed on the second semiconductor wafer, a first groove formed in the semiconductor layer and the second semiconductor wafer so as to reach the first insulating layer, thereby isolating the semiconductor layer and the second semiconductor wafer, and a second insulating layer formed on the side face of the first groove or embedded in the first groove. In this dielectric isolation substrate, a high breakdown voltage element and a low breakdown voltage element are formed in a region isolated by the first groove.

摘要翻译： 绝缘隔离衬底包括：第一半导体晶片;第二半导体晶片，其在第一半导体晶片上具有第一绝缘层，第二绝缘层插入在第二半导体晶片之间，形成在第二半导体晶片上的半导体层，形成在半导体层中的第一沟槽和第二半导体层 晶片，以便到达第一绝缘层，从而隔离半导体层和第二半导体晶片，以及形成在第一凹槽的侧面上或嵌入在第一凹槽中的第二绝缘层。 在该绝缘隔离衬底中，在由第一沟槽隔离的区域中形成高击穿电压元件和低击穿电压元件。

公开(公告)号：US5210432A

公开(公告)日：1993-05-11

申请号：US615252

申请日：1990-11-19

申请人： Takashi Shinohe ,  Masaki Atsuta ,  Akio Nakagawa

发明人： Takashi Shinohe ,  Masaki Atsuta ,  Akio Nakagawa

IPC分类号： H01L29/744 ,  H01L29/08 ,  H01L29/74 ,  H01L29/749

CPC分类号： H01L29/0839

摘要： According to this invention, there is disclosed an insulated gate GTO thyristor comprising a pnpn structure including a p-type emitter layer, an n-type base layer, a p-type base layer, and an n-type emitter layer. The thyristor has a first gate electrode contacting the p-type base layer and a second gate electrode formed on a channel region of the p-type base layer through a gate insulating film. An n+-type layer of the n-type emitter layer immediately below a cathode electrode and an n--type layer of the n-type emitter layer contacting the channel region are formed in different manufacturing steps, and an emitter breakdown voltage and the threshold voltage of the second gate electrode are optimally set.

摘要翻译： 根据本发明，公开了一种包括p型结构的绝缘栅GTO晶闸管，其包括p型发射极层，n型基极层，p型基极层和n型发射极层。 晶闸管具有通过栅极绝缘膜与p型基极层接触的第一栅电极和形成在p型基极层的沟道区上的第二栅电极。 在不同的制造步骤中形成正好在阴极电极正下方的n型发射极层的n +型层和与沟道区接触的n型发射极层的n型层，并且发射极击穿电压和阈值 最优地设定第二栅电极的电压。

公开(公告)号：US5124773A

公开(公告)日：1992-06-23

申请号：US563720

申请日：1990-08-07

申请人： Akio Nakagawa ,  Yoshihiro Yamaguchi ,  Kiminori Watanabe

发明人： Akio Nakagawa ,  Yoshihiro Yamaguchi ,  Kiminori Watanabe

IPC分类号： H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/739 ,  H01L29/745

CPC分类号： H01L29/405 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/402 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7455

摘要： A conductivity-modulation MOSFET employs a substrate of an N type conductivity as its N base. A first source layer of a heavily-doped N type conductivity is formed in a P base layer formed in the N base. A source electrode electrically conducts the P base and the source. A first gate electrode insulatively covers a channel region defined by the N.sup.+ source layer in the P base. A P drain layer is formed on an opposite substrate surface. An N.sup.+ second source layer is formed in a P type drain layer by diffusion to define a second channel region. A second gate electrode insulatively covers the second channel region, thus providing a voltage-controlled turn-off controlling transistor. A drain electrode of the MOSFET conducts the P type drain and second source. When the turn-off controlling transistor is rendered conductive to turn off the MOSFET a "shorted anode structure" is temporarily formed wherein the N type base is short-circuited to the drain electrode, whereby case, the flow of carriers accumulated in the N type base into the drain electrode is facilitated to accelerate dispersion of carriers upon turn-off of the transistor.

摘要翻译： 导电调制型MOSFET采用N型导电性基板作为N基极。 在形成在N基底中的P基底层中形成重掺杂N型导电性的第一源极层。 源极电极导电P基极和源极。 第一栅极绝缘地覆盖由P基底中的N +源层限定的沟道区域。 在相对的基板表面上形成P漏极层。 通过扩散在P型漏极层中形成N +第二源极层，以限定第二沟道区。 第二栅电极绝缘地覆盖第二沟道区，从而提供电压控制关断控制晶体管。 MOSFET的漏电极导通P型漏极和第二源极。 当关断控制晶体管导通以关断MOSFET时，暂时形成“短路阳极结构”，其中N型基极短路到漏极，由此情况下，累积在N型的载流子 有助于在晶体管截止时加速载流子的分散。

公开(公告)号：US5105243A

公开(公告)日：1992-04-14

申请号：US399342

申请日：1989-08-25

申请人： Akio Nakagawa ,  Yoshihiro Yamaguchi ,  Kiminori Watanabe

发明人： Akio Nakagawa ,  Yoshihiro Yamaguchi ,  Kiminori Watanabe

IPC分类号： H01L21/336 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/739

CPC分类号： H01L29/7396 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/402 ,  H01L29/405 ,  H01L29/7393 ,  H01L29/7395

摘要： There is disclosed a single-gate type conductivity-modulation field effect transistor having a first base layer, a second base layer, and a source layer formed in the second base layer. A source electrode is provided on a surface of the first base layer, for electrically shorting the second base layer with the source layer. A drain layer is provided in the first base layer surface. A drain electrode is formed on the layer surface to be in contact with the drain layer. A gate electrode is insulatively provided above the layer surface, for covering a certain surface portion of the second base layer which is positioned between the first base layer and the source layer to define a channel region below the gate electrode. A heavily-doped semiconductor layer is formed in the drain layer to have the opposite conductivity type to that of the drain layer. This semiconductor layer is in contact with the drain electrode. When the transistor is turned off, this layer facilitates carriers accumulated in the first base layer to flow into the drain electrode through the drain layer, thereby accelerating dispersion of the carriers in said transistor.

摘要翻译： 公开了具有形成在第二基极层中的第一基极层，第二基极层和源极层的单栅极型导电调制场效应晶体管。 源极电极设置在第一基极层的表面上，用于使第二基极层与源极层电气短路。 在第一基层表面设置漏极层。 漏极电极形成在层表面上以与漏极层接触。 栅极电极被绝缘地设置在层表面之上，用于覆盖位于第一基极层和源极层之间的第二基极层的特定表面部分，以限定栅电极下方的沟道区。 在漏极层中形成重掺杂的半导体层，以具有与漏极层相反的导电类型。 该半导体层与漏电极接触。 当晶体管截止时，该层便于积聚在第一基极层中的载流子通过漏极层流入漏电极，从而加速载流子在所述晶体管中的分散。

公开(公告)号：US5093701A

公开(公告)日：1992-03-03

申请号：US146405

申请日：1988-01-21

申请人： Akio Nakagawa ,  Hiromichi Ohashi ,  Yoshihiro Yamaguchi ,  Kiminori Watanabe ,  Thuneo Thukakoshi

发明人： Akio Nakagawa ,  Hiromichi Ohashi ,  Yoshihiro Yamaguchi ,  Kiminori Watanabe ,  Thuneo Thukakoshi

IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/739

CPC分类号： H01L29/1095 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/7393 ,  H01L29/7395

摘要： A conductivity modulated MOSFET, having a semiconductor substrate of a first conductivity type, a semiconductor layer of a second conductivity type formed on the semiconductor substrate and having a high resistance, a base layer of the first conductivity type formed in the semiconductor layer, a source layer of the second conductivity type formed in the base layer, a gate electrode formed on a gate insulating film which is formed on a channel region, the channel region being formed in a surface of the base layer between the semiconductor layer and the source layer, a source electrode ohmic-contacting the source layer and the base layer, and a drain electrode formed on the surface of the semiconductor substrate opposite to the semiconductor layer, characterized in that the conductivity modulated MOSFET has a saturation current smaller than a latch-up current when a predetermined gate voltage is applied to the gate electrode.

公开(公告)号：US5068700A

公开(公告)日：1991-11-26

申请号：US622351

申请日：1990-11-29

申请人： Yoshihiro Yamaguchi ,  Kiminori Watanabe ,  Akio Nakagawa

发明人： Yoshihiro Yamaguchi ,  Kiminori Watanabe ,  Akio Nakagawa

IPC分类号： H01L29/06 ,  H01L29/08 ,  H01L29/739

CPC分类号： H01L29/7394 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/7393

摘要： A lateral conductivity modulated MOSFET comprises a semiconductor wafer, a first-conductivity type base layer selectively formed in a surface region of the semiconductor wafer, a second-conductivity type source layer selectively formed in a surface region of the first-conductivity type base layer, a second-conductivity type base layer selectively formed in the semiconductor wafer, a first-conductivity type drain layer formed in a surface region of the second-conductivity type base layer, a gate insulation film formed on that surface portion of the first-conductivity type base layer which is sandwiched between the source layer and the second-conductivity type base layer, a gate electrode formed on the gate insulation film, a source electrode in contact with both the source layer and the first-conductivity type base layer, and a drain electrode in contact with the drain layer. A second-conductivity type cathode layer is formed in a surface region of the semiconductor wafer in such a manner that it is located adjacent to the second-conductivity type base layer. A cathode electrode is in contact with the cathode layer and is kept at the same potential level as that of the drain electrode.

公开(公告)号：US5062856A

公开(公告)日：1991-11-05

申请号：US327894

申请日：1989-03-23

申请人： Seishi Sawamura ,  Sakuya Nakajima ,  Kunio Amemori ,  Hidehisa Oku ,  Akio Nakagawa ,  Ichiro Kitayama ,  Hiromu Matsuda ,  Katsuhiko Yoshida ,  Masaru Takeda ,  Toshio Nakane ,  Shiro Horiguchi ,  Shigeru Yuki

发明人： Seishi Sawamura ,  Sakuya Nakajima ,  Kunio Amemori ,  Hidehisa Oku ,  Akio Nakagawa ,  Ichiro Kitayama ,  Hiromu Matsuda ,  Katsuhiko Yoshida ,  Masaru Takeda ,  Toshio Nakane ,  Shiro Horiguchi ,  Shigeru Yuki

IPC分类号： A61F2/64 ,  A61F2/68 ,  A61F2/70 ,  A61F2/74

CPC分类号： A61F2/68 ,  A61F2/64 ,  A61F2002/6818 ,  A61F2002/704 ,  A61F2002/747 ,  A61F2002/748

摘要： A teaching playback swing-phase-controlled above-knee prosthesis has a thigh frame, a leg frame, an air cylinder interconnecting the thigh and leg frames and provided with adjusting means for adjusting the degree of opening the valve of the air cylinder to a plurality of degrees respectively for a plurality of walking speeds selected during trial walking. A mode selecting switch has positions respectively for setting degrees of opening of the valve of the air cylinder in a teaching mode and for a playback mode in which one of the degrees of opening is selected according to an actual walking speed. An opening detector detects the degree of opening of the valve of the air cylinder. An opening storage device for stores a plurality of set degrees of opening of the valve of the air cylinder. A phase detector detects swing phases and stance phases, walking speed detector determines an actual walking speed, and control unit adjusts the degree of opening of the valve of the air cylinder to one of the set degrees of opening corresponding to the actual walking speed. The teaching playback swing-phase-controlled above-knee prosthesis is capable of automatically controlling the speed of swing motion of the leg frame according to the actual walking speed of the prosthesis wearer.

摘要翻译： 教学回放摆动相位控制的膝上假体具有大腿架，腿架，连接大腿和腿框架的气缸，并设置有用于将气缸的阀打开程度调节到多个的调节装置 分别用于在试行中选择的多个步行速度。 模式选择开关具有分别用于在示教模式下设置气缸的阀的开度的位置和根据实际步行速度选择开度之一的重放模式。 打开检测器检测气缸的阀的打开程度。 一种开放存储装置，用于存储气缸的阀的多个设定开度。 相位检测器检测摆动相位和姿势相位，行走速度检测器确定实际行走速度，并且控制单元根据实际步行速度将气缸的阀的打开程度调整到设定的开度之一。 教学回放摆动相位控制的膝上假体能够根据假体佩戴者的实际步行速度自动控制腿部框架的摆动运动的速度。