公开(公告)号：US20240142519A1

公开(公告)日：2024-05-02

申请号：US18470911

申请日：2023-09-20

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazushi NAKAMURA

IPC: G01R31/317

CPC classification number: G01R31/31727

Abstract: In scan testing of semiconductor devices, instantaneous power consumption in both shift and capture modes is efficiently reduced. The scan chain is provided with circuit blocks 1 to 4. Each of the temporary storage flip-flops F1 to F3 is connected between one of the two circuit blocks. Clock generating circuit 10 outputs a clock signal CLK used for the scan test. The clock gating cells GC1 to GC4 takes the clock signal CLK and provides the clock signals CLK1 to CLK4 to circuit blocks 1 to 4 and the clock signals CLK1 to CLK3 to the temporary storage flip-flops F1 to F3. The control circuit 20 controls the clock gating cells GC1 to GC4 so as to operate the circuit blocks 1 to 4 at differing timings from the input-side one by one and simultaneously operate each circuit block and a temporary storage flip-flop connected to the output of each circuit block.

公开(公告)号：US20240136410A1

公开(公告)日：2024-04-25

申请号：US18449769

申请日：2023-08-14

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yu NAGAHAMA ,  Yuya ABIKO

IPC: H01L29/40 ,  H01L21/28 ,  H01L29/66

CPC classification number: H01L29/401 ,  H01L21/28229 ,  H01L29/404 ,  H01L29/407 ,  H01L29/66734

Abstract: A trench is formed in a semiconductor substrate. A first silicon oxide film is formed in an inside of the trench. A poly-crystalline silicon film is formed on the first silicon oxide film. A second silicon oxide film is formed from the poly-crystalline silicon film by performing a thermal oxidation treatment to the poly-crystalline silicon film. Thus, an insulating film including the first silicon oxide film and the second silicon oxide film is formed. A first conductive film is formed so as to embed the inside of the trench via the insulating film.

公开(公告)号：US20240136302A1

公开(公告)日：2024-04-25

申请号：US18452829

申请日：2023-08-20

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Ryusei TAKAISHI

IPC: H01L23/544 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L25/065 ,  H01L25/16

CPC classification number: H01L23/544 ,  H01L23/3157 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49586 ,  H01L24/05 ,  H01L24/48 ,  H01L24/78 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/16 ,  H01L2223/54426 ,  H01L2224/05013 ,  H01L2224/48145 ,  H01L2224/48175 ,  H01L2224/78 ,  H01L2224/85125 ,  H01L2924/1305 ,  H01L2924/13091

Abstract: A bonding region is specified by having a horizontal line partially constituting crosshairs displayed on a monitor of a wire bonding apparatus superimposed on a first line segment of a first marker, and having a vertical line partially constituting the crosshairs superimposed on a first line segment of a second marker.

公开(公告)号：US20240133944A1

公开(公告)日：2024-04-25

申请号：US18470820

申请日：2023-09-19

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yoshiaki TANAKA ,  Kouji NAKAJIMA

IPC: G01R31/28

CPC classification number: G01R31/2853

Abstract: A semiconductor device making it easy to detect disconnection in source wires and achieving a reduction in resistance and an inspection method for the semiconductor device are provided. A semiconductor device according to the present embodiment includes: a lead frame; a semiconductor chip on the lead frame; a source pad provided in the semiconductor chip; a plurality of source wires connected to the source pad; a disconnection detection wire connected to the source pad; source terminals connected to the plurality of source wires; and a disconnection detection terminal connected to the disconnection detection wire. One end of the disconnection detection wire is positioned in vicinity of a corner of the source pad closer to the disconnection detection terminal side.

公开(公告)号：US11961909B2

公开(公告)日：2024-04-16

申请号：US17686042

申请日：2022-03-03

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Hideki Sugiyama

IPC: H01L29/78 ,  H01L21/265 ,  H01L21/266 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/7836 ,  H01L21/26513 ,  H01L21/266 ,  H01L29/0847 ,  H01L29/6659

Abstract: Semiconductor device includes a well region formed in an active region of a semiconductor substrate, a gate electrode formed on the well region via a gate dielectric film, and a source region and a drain region formed in the well region. At the vicinity of both end portions of the active region in the first direction, a first region and a second region having the same conductivity type as the well region and having impurity concentration higher than that of the well region are formed in the well region. The first region and the second region are spaced from each other in a second direction perpendicular to the first direction, and at least a portion of each of them is located under the gate electrode. The first region and the second region are not formed at the center portion of the active region in the first direction.

公开(公告)号：US20240120406A1

公开(公告)日：2024-04-11

申请号：US18449763

申请日：2023-08-15

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Tadashi YAMAGUCHI ,  Yoshiki MARUYAMA

IPC: H01L29/66 ,  H01L21/225 ,  H01L21/265 ,  H01L21/266 ,  H01L21/28

CPC classification number: H01L29/66348 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/28211

Abstract: It is related to improving a performance of a semiconductor device and suppressing yield deterioration. Using a resist pattern as a mask, an ion-implantation is performed from an upper surface of a semiconductor substrate to form an ion-implanted layer in the semiconductor substrate. By subsequently, another ion-implantation is performed. Then, another ion-implanted layer is formed in the semiconductor substrate so as to overlap with the ion-implanted layer. Next, a heat treatment is performed on the semiconductor substrate to diffuse impurities contained in the ion-implanted layers, thereby an p-type floating region is formed.

公开(公告)号：US11955101B2

公开(公告)日：2024-04-09

申请号：US17872503

申请日：2022-07-25

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yoshihito Ogawa

IPC: G09G5/36

CPC classification number: G09G5/363 ,  G09G2354/00 ,  G09G2370/16 ,  G09G2380/10

Abstract: A display control device and a display control method capable of displaying a desired image regardless of a state of wireless communication are provided. A wireless control unit causes an external apparatus to draw a first image in accordance with input information. A first unit acquires the first image via the wireless communication and displays the first image on a display apparatus. A second unit causes a GPU to draw a second image in accordance with the unput information and displays the second image on the display apparatus. A switching unit determines whether a received radio wave is in a good state or a bad state, select the first unit when a determination result is that the received radio wave is in the good state, and select the second unit when the determination result is that the received radio wave is in the bad state.

公开(公告)号：US20240104018A1

公开(公告)日：2024-03-28

申请号：US18347148

申请日：2023-07-05

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazuaki TERASHIMA

IPC: G06F12/0831 ,  G06F13/28

CPC classification number: G06F12/0835 ,  G06F13/28

Abstract: A second memory stores a plurality of input data sets DSi composed of a plurality of pieces of input data. N multiply-accumulate units are capable of performing parallel processings, and each performs a multiply-accumulate operation on any one of the plurality of weight parameter sets and any one of the plurality of input data sets. A second DMA controller transfers the input data set from the second memory to the n multiply-accumulate units. A measurement circuit measures a degree of matching/mismatching of logic levels among the plurality of pieces of input data contained in the input data set within the memory MEM2, the sequence controller controls the number of parallel processings by the n multiply-accumulate units based on a measurement result by the measurement circuit.

公开(公告)号：US11942890B2

公开(公告)日：2024-03-26

申请号：US17479185

申请日：2021-09-20

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Satoshi Narumi ,  Minoru Kurosawa ,  Takeshi Ohtsuki

IPC: H02P6/182 ,  H02P6/20

CPC classification number: H02P6/182 ,  H02P6/20 ,  H02P2203/03

Abstract: The magnetic pole position of the rotor is estimated with high accuracy at the initial start of a three-phase motor of the sensorless system. Semiconductor device for driving and controlling the three-phase motor of the sensorless system have a detector connected to the three-phase output nodes of the inverter circuit and the virtual neutral point (or neutral point), and detecting a voltage generated in the output node of the non-energized phase of the three-phase. Controller applies the initial drive voltage by the inverter circuit to any two phases of the three-phase motor based on the estimated position of the magnetic pole of the rotor in the stop state. Controller estimates the position of the rotor based on a difference voltage detected by the detector in a driving voltage applying period and a regeneration period immediately after or immediately before the driving voltage applying period.

公开(公告)号：US20240094299A1

公开(公告)日：2024-03-21

申请号：US17934048

申请日：2022-09-21

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Tetsuji TSUDA ,  Saika ARAI

IPC: G01R31/374 ,  G01R31/3835 ,  H01M10/42

CPC classification number: G01R31/374 ,  G01R31/3835 ,  H01M10/425 ,  H01M2220/20

Abstract: A battery simulator includes a circuit simulator that simulates an operation of an RC parallel circuit which is an equivalent circuit of a battery to be monitored and an RC parallel circuit optimization device that optimizes the RC parallel circuit based on a monitoring frequency of the battery, wherein the RC parallel circuit optimization device is configured to: delete a capacitance value of the RC parallel circuit when the monitoring frequency is determined to be a low frequency, and delete resistance and capacitance values of the RC parallel circuit when the monitoring frequency is determined to be a high frequency.