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公开(公告)号：US11886224B2
公开(公告)日：2024-01-30
申请号：US16945519
申请日：2020-07-31
Applicant: ADVANCED MICRO DEVICES, INC.
Inventor： Leonardo De Paula Rosa Piga , Karthik Rao , Indrani Paul , Mahesh Subramony , Kenneth Mitchell , Dana Glenn Lewis , Sriram Sambamurthy , Wonje Choi
CPC classification number: G06F9/5027 , G06F9/48 , G06F9/4806 , G06F9/4843 , G06F9/4881 , G06F9/4893 , G06F9/50 , G06F9/5005 , G06F9/5011 , G06F9/5033 , G06F9/5044 , G06F9/5055 , G06F9/5094 , G06F9/30098 , G06F2209/5021
Abstract: A processing unit of a processing system compiles a priority queue listing of a plurality of processor cores to run a workload based on a cost of running the workload on each of the processor cores. The cost is based on at least one of a system usage policy, characteristics of the workload, and one or more physical constraints of each processor core. The processing unit selects a processor core based on the cost to run the workload and communicates an identifier of the selected processor core to an operating system of the processing system.
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公开(公告)号：US11829222B2
公开(公告)日：2023-11-28
申请号：US17127681
申请日：2020-12-18
Applicant: Advanced Micro Devices, Inc.
Inventor： Sriram Sambamurthy , Sriram Sundaram , Indrani Paul , Larry David Hewitt , Anil Harwani , Aaron Joseph Grenat , Dana Glenn Lewis , Leonardo Piga , Wonje Choi , Karthik Rao
Abstract: A system and method for updating power supply voltages due to variations from aging are described. A functional unit includes a power supply monitor capable of measuring power supply variations in a region of the functional unit. An age counter measures an age of the functional unit. A control unit notifies the power supply monitor to measure an operating voltage reference. When the control unit receives a measured operating voltage reference, the control unit determines an updated age of the region different from the current age based on the measured operating voltage reference. The control unit updates the age counter with the corresponding age, which is younger than the previous age in some cases due to the region not experiencing predicted stress and aging. The control unit is capable of determining a voltage adjustment for the operating voltage reference based on an age indicated by the age counter.
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公开(公告)号：US20230315188A1
公开(公告)日：2023-10-05
申请号：US17710521
申请日：2022-03-31
Applicant: Advanced Micro Devices, Inc.
Inventor： Alexander J. Branover , Thomas J. Gibney , Mihir Shaileshbhai Doctor , Indrani Paul , Benjamin Tsien , Stephen V. Kosonocky , John P. Petry , Christopher T. Weaver
IPC: G06F1/3234
CPC classification number: G06F1/3234
Abstract: Methods and systems are disclosed for transitioning, by a hardware-based controller, a system on a chip (SoC) into different power states. Techniques disclosed include tracking, by the controller, metrics associated with the SoC and transitioning, by the controller, the SoC from a first power state to a second power state based on the tracked metrics. Were the total amount of power that is used by at least a portion of the transition between the first power state to the second power state and a time spent in the second power state is less than the total amount of power that would have been used by remaining in the first power state.
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64.发明公开公开(公告)号：US20230205248A1
公开(公告)日：2023-06-29
申请号：US17560823
申请日：2021-12-23
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Meeta Surendramohan Srivastav , Ashwini Chandrashekhara Holla , Alex Sabino Duenas , Xinzhe Li , Michael John Austin , Indrani Paul , Sriram Sambamurthy
Abstract: An electronic device includes an accelerated processing unit (APU) and multiple elements. The APU performs operations for a platform boost and throttle (PBT) controller. For the operations, the APU receives a platform electrical power limit, the platform electrical power limit being a limit on a total electrical power allowed to be consumed by a group of the elements at a given time. The APU then determines a present platform electrical power consumption. The APU next adjusts one or more operating parameters for specified elements from among the group of elements to control electrical power consumption by the specified elements based on a relationship between the present platform electrical power consumption and the platform electrical power limit.
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公开(公告)号：US20230095622A1
公开(公告)日：2023-03-30
申请号：US17485194
申请日：2021-09-24
Applicant: Advanced Micro Devices, Inc.
Inventor： Alexander J. Branover , Indrani Paul , Benjamin Tsien , Christopher T. Weaver , John P. Petry , Mihir Shaileshbhai Doctor , Thomas J. Gibney
Abstract: A method and apparatus for isolating and restoring general-purpose input/output (GPIO) pads in a computer system includes identifying GPIO pads associated with the region responsive to an entry into a power-down state of a region of a circuit. The GPIO pads are isolated from one or more external circuits. Upon exit from the power-down state, each associated GPIO pad is restored to a current value.
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Patent Agency Ranking
公开(公告)号：US20230031295A1
公开(公告)日：2023-02-02
申请号：US17390475
申请日：2021-07-30
Applicant: Advanced Micro Devices, Inc.
Inventor： Thomas J. Gibney , Alexander J. Branover , Mihir Shaileshbhai Doctor , Xiaojie He , Indrani Paul , Benjamin Tsien , John P. Petry , Pitchaiah Katari
IPC: G06F1/324 , G06F1/3237 , G06F1/3218 , G06F1/08
Abstract: A disclosed technique includes triggering entry into a clock bypass mode, in which a bypass clock generator provides clock signals to functional elements and a primary clock generator does not provide clock signals to functional elements; and triggering exit from the clock bypass mode, in which the bypass clock generator does not provide clock signals to the functional elements and the primary clock generator does provide clock signals to the functional elements.
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公开(公告)号：US11543877B2
公开(公告)日：2023-01-03
申请号：US17219097
申请日：2021-03-31
Applicant: ADVANCED MICRO DEVICES, INC. , ATI TECHNOLOGIES ULC
Inventor： Karthik Rao , Indrani Paul , Donny Yi , Oleksandr Khodorkovsky , Leonardo De Paula Rosa Piga , Wonje Choi , Dana G. Lewis , Sriram Sambamurthy
IPC: G06F1/32 , G06F1/3287
Abstract: An apparatus includes a processor, a sleep state duration prediction module, and a system management unit. The sleep state duration prediction module is configured to predict a sleep state duration for component of the processing device. The system management unit is to transition the component into a sleep state selected from a plurality of sleep states based on a comparison of the predicted sleep state duration to at least one duration threshold. Each sleep state of the plurality of sleep states is a lower power state than a previous sleep state of the plurality of sleep states.
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公开(公告)号：US11073888B2
公开(公告)日：2021-07-27
申请号：US16428312
申请日：2019-05-31
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Indrani Paul , Sriram Sambamurthy , Larry David Hewitt , Kevin M. Lepak , Samuel D. Naffziger , Adam Neil Calder Clark , Aaron Joseph Grenat , Steven Frederick Liepe , Sandhya Shyamasundar , Wonje Choi , Dana Glenn Lewis , Leonardo de Paula Rosa Piga
IPC: G06F1/00 , G06F1/3225 , G06F1/3234 , G06F1/3203
Abstract: Platform power management includes boosting performance in a platform power boost mode or restricting performance to keep a power or temperature under a desired threshold in a platform power cap mode. Platform power management exploits the mutually exclusive nature of activities and the associated headroom created in a temperature and/or power budget of a server platform to boost performance of a particular component while also keeping temperature and/or power below a threshold or budget.
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公开(公告)号：US10955884B2
公开(公告)日：2021-03-23
申请号：US15071643
申请日：2016-03-16
Applicant: Advanced Micro Devices, Inc.
Inventor： Wei Huang , Manish Arora , Abhinandan Majumdar , Indrani Paul , Leonardo de Paula Rosa Piga
IPC: G06F1/20 , G06F1/324 , G06F1/329 , G06F1/3296
Abstract: A method and apparatus for managing power in a thermal couple aware system includes determining a candidate configuration mapping based upon one or more criteria, the candidate configuration mapping being a mapping of performance for a candidate configuration of processor sockets in the thermal couple aware system. The candidate configuration mapping is evaluated by comparing the candidate configuration mapping to a stored configuration. If the evaluated candidate configuration mapping provides a better metric than the stored configuration, the stored configuration is updated with the evaluated candidate configuration mapping, and programming instructions are executed in accordance with the candidate configuration mapping if no other configuration mappings are to be determined.
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公开(公告)号：US20180210531A1
公开(公告)日：2018-07-26
申请号：US15416993
申请日：2017-01-26
Applicant: Advanced Micro Devices, Inc.
Inventor： Md Abdullah Shahneous Bari , Leonardo Piga , Indrani Paul
CPC classification number: G06F1/324 , G06F3/0604 , G06F3/0611 , G06F3/0625 , G06F3/0629 , G06F3/0673
Abstract: Systems, apparatuses, and methods for implementing performance estimation mechanisms are disclosed. In one embodiment, a computing system includes at least one processor and a memory subsystem. During a characterization phase, the system utilizes a memory intensive workload to detect when the memory subsystem reaches its saturation point. Then, the system collects performance counter values during a sampling phase of a target application to determine the memory bandwidth. If the memory bandwidth is greater than the saturation point, then the system generates a prediction of the memory time which is based on a ratio of the memory bandwidth over the saturation point. Otherwise, if the memory bandwidth is less than the saturation point, the system assumes memory time is constant versus processor frequency. Then, the system uses the memory time and an estimate of the compute time to estimate a phase time for the target application at different processor frequencies.
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