公开(公告)号：US5096849A

公开(公告)日：1992-03-17

申请号：US693136

申请日：1991-04-29

申请人： Kenneth E. Beilstein, Jr. ,  Claude L. Bertin ,  Francis R. White

发明人： Kenneth E. Beilstein, Jr. ,  Claude L. Bertin ,  Francis R. White

IPC分类号： C23C16/06 ,  H01L21/311 ,  H01L21/312 ,  H01L21/3213 ,  H01L21/336 ,  H01L21/47 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L29/78

CPC分类号： H01L21/31138 ,  H01L21/31144 ,  H01L21/312 ,  H01L21/32139 ,  Y10S148/05 ,  Y10S148/106 ,  Y10S438/945

摘要： A method is described for selectively masking sidewall regions of a concave surface formed in a semiconductor body, the method comprising the steps of: forming a conformal layer of masking material on a sidewall of the concave structure; emplacing in the concave structure, a selectively removable material that partially fills the concave structure, an upper surface of the material determining the edge of a region of the concave structure to be masked; removing a portion of the conformal layer above the upper surface of the selectively removable material; and removing the selectively removable material to leave a region of remaining conformal material as a mask.

摘要翻译： 描述了一种用于选择性地掩蔽形成在半导体主体中的凹面的侧壁区域的方法，该方法包括以下步骤：在凹构造的侧壁上形成掩模材料的共形层; 在凹形结构中放置一部分填充凹形结构的选择性可移除材料，该材料的上表面确定待掩蔽的凹形结构的区域的边缘; 去除所述可选择移除的材料的上表面上方的所述共形层的一部分; 并且移除可选择性地移除的材料以留下剩余的保形材料的区域作为掩模。

公开(公告)号：US4602170A

公开(公告)日：1986-07-22

申请号：US530450

申请日：1983-09-08

申请人： Claude L. Bertin

发明人： Claude L. Bertin

IPC分类号： H01L27/088 ,  H01L21/8234 ,  H01L29/43 ,  H01L29/78 ,  H03K19/0944 ,  H03K19/094 ,  H03K19/20

CPC分类号： H01L29/435 ,  H03K19/09441

摘要： A family of digital logic circuits constructed with resistive gate field effect transistors is provided. The logic circuits are comprised of AND and OR circuits, each implemented with resistive gate devices. In constructing the AND circuit, the resistive gate lies along the length of the channel region between the source and drain of the device. Logic input signals are selectively applied along the length of the channel region to the resistive gate. The device will conduct between source and drain only if all points along the channel are above the local threshold voltage of the channel region which will occur when appropriate logic signals are applied simultaneously to all logic input terminals. A logic OR device is realized when the resistive gate is formed transverse to the channel such that each input to the gate controls a portion of the channel between the source and drain. NAND and NOR circuits are provided using the resistive gate logic device in an inverter circuit.

摘要翻译： 提供了由电阻栅场效应晶体管构成的数字逻辑电路系列。 逻辑电路由AND和OR电路组成，每个电路都使用电阻栅极器件实现。 在构建AND电路时，电阻栅极沿着器件的源极和漏极之间的沟道区域的长度。 选择性地将逻辑输入信号沿通道区域的长度施加到电阻门。 只有沿着通道的所有点都高于通道区域的局部阈值电压，器件才会在源极和漏极之间导通，当适当的逻辑信号同时施加到所有逻辑输入端子时，该通道区域将发生。 当电阻栅极横穿于通道形成时，实现逻辑或器件，使得到栅极的每个输入控制源极和漏极之间的沟道的一部分。 在逆变器电路中使用电阻门逻辑器件提供NAND和NOR电路。

公开(公告)号：US4139935A

公开(公告)日：1979-02-20

申请号：US782574

申请日：1977-03-29

申请人： Claude L. Bertin ,  Francisco H. De La Moneda

发明人： Claude L. Bertin ,  Francisco H. De La Moneda

IPC分类号： H03F1/52 ,  H01L21/265 ,  H01L21/822 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06 ,  H01L29/06 ,  H01L29/78 ,  H02H7/20 ,  H03F1/42 ,  H03K17/0812 ,  H01L21/26

CPC分类号： H01L27/0251 ,  H01L21/2652 ,  H01L29/0688 ,  H03K17/08122

摘要： Protective devices and circuits for insulated gate transistors are improved by another p/n junction diode or MOS diode preventing breakdown of the thin oxide of the protective device. The breakdown voltage of the protective device or p/n diode may be tailored to a preselected voltage by altering its metallurgical junction by ion implantation or other techniques. Tailoring permits the breakdown voltage of the protective device to be independent of process and circuit specification of a protected or internal circuit. A plurality of parallel circuits connected as a protective device limits or controls secondary breakdown of the protective device.

摘要翻译： 用于绝缘栅极晶体管的保护器件和电路由另一个p / n结二极管或MOS二极管改善，以防止保护器件的薄氧化物破坏。 保护装置或p / n二极管的击穿电压可以通过改变其冶金接合通过离子注入或其它技术来调整为预选电压。 裁缝允许保护装置的击穿电压与受保护或内部电路的工艺和电路规格无关。 作为保护装置连接的多个并联电路限制或控制保护装置的二次击穿。

公开(公告)号：US09911743B2

公开(公告)日：2018-03-06

申请号：US11835852

申请日：2007-08-08

申请人： Claude L. Bertin ,  Thomas Rueckes ,  X. M. Henry Huang ,  Ramesh Sivarajan ,  Eliodor G. Ghenciu ,  Steven L. Konsek ,  Mitchell Meinhold ,  Jonathan W. Ward ,  Darren K. Brock

发明人： Claude L. Bertin ,  Thomas Rueckes ,  X. M. Henry Huang ,  Ramesh Sivarajan ,  Eliodor G. Ghenciu ,  Steven L. Konsek ,  Mitchell Meinhold ,  Jonathan W. Ward ,  Darren K. Brock

IPC分类号： H01L27/102 ,  B82Y10/00 ,  G11C13/02 ,  H01L21/822 ,  H01L27/06 ,  H01L27/12

CPC分类号： H01L27/1021 ,  B82Y10/00 ,  G11C13/025 ,  G11C2213/19 ,  G11C2213/71 ,  G11C2213/72 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/1203

摘要： Under one aspect, a method of making a nanotube switch includes: providing a substrate having a first conductive terminal; depositing a multilayer nanotube fabric over the first conductive terminal; and depositing a second conductive terminal over the multilayer nanotube fabric, the nanotube fabric having a thickness, density, and composition selected to prevent direct physical and electrical contact between the first and second conductive terminals. In some embodiments, the first and second conductive terminals and the multilayer nanotube fabric are lithographically patterned so as to each have substantially the same lateral dimensions, e.g., to each have a substantially circular or rectangular lateral shape. In some embodiments, the multilayer nanotube fabric has a thickness from 10 nm to 200 nm, e.g., 10 nm to 50 nm. The structure may include an addressable diode provided under the first conductive terminal or deposited over the second terminal.

公开(公告)号：US09196615B2

公开(公告)日：2015-11-24

申请号：US11835865

申请日：2007-08-08

申请人： Claude L. Bertin ,  Thomas Rueckes ,  X. M. Henry Huang ,  Ramesh Sivarajan ,  Eliodor G. Ghenciu ,  Steven L. Konsek ,  Mitchell Meinhold

发明人： Claude L. Bertin ,  Thomas Rueckes ,  X. M. Henry Huang ,  Ramesh Sivarajan ,  Eliodor G. Ghenciu ,  Steven L. Konsek ,  Mitchell Meinhold

IPC分类号： G11C11/36 ,  H01L27/102 ,  B82Y10/00 ,  G11C13/02 ,  H01L21/822 ,  H01L23/525 ,  H01L27/06 ,  H01L27/12

CPC分类号： H01L27/1021 ,  B82Y10/00 ,  G11C13/025 ,  G11C2213/19 ,  H01L21/8221 ,  H01L23/5256 ,  H01L27/0688 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/00

摘要： Under one aspect, a nanotube diode includes: a cathode formed of a semiconductor material; and an anode formed of nanotubes. The cathode and anode are in fixed and direct physical contact, and are constructed and arranged such that sufficient electrical stimulus applied to the cathode and the anode creates a conductive pathway between the cathode and the anode. In some embodiments, the anode includes a non-woven nanotube fabric having a plurality of unaligned nanotubes. The non-woven nanotube fabric may have a thickness, e.g., of 0.5 to 20 nm. Or, the non-woven nanotube fabric may include a block of nanotubes. The nanotubes may include metallic nanotubes and semiconducting nanotubes, and the cathode may include an n-type semiconductor material. A Schottky barrier can form between the n-type semiconductor material and the metallic nanotubes and/or a PN junction can form between the n-type semiconductor material and the semiconducting nanotubes.

摘要翻译： 在一个方面，纳米管二极管包括：由半导体材料形成的阴极; 和由纳米管形成的阳极。 阴极和阳极是固定和直接的物理接触，并被构造和布置成使得施加到阴极和阳极的足够的电刺激在阴极和阳极之间产生导电通路。 在一些实施方案中，阳极包括具有多个未对准纳米管的无纺布纳米管织物。 无纺布纳米管织物可以具有例如0.5至20nm的厚度。 或者，无纺布纳米管织物可以包括纳米管块。 纳米管可以包括金属纳米管和半导体纳米管，并且阴极可以包括n型半导体材料。 可以在n型半导体材料和金属纳米管之间形成肖特基势垒，和/或在n型半导体材料和半导体纳米管之间形成PN结。

公开(公告)号：US08809917B2

公开(公告)日：2014-08-19

申请号：US12511779

申请日：2009-07-29

申请人： Claude L. Bertin ,  X. M. Henry Huang ,  Thomas Rueckes ,  Ramesh Sivarajan

发明人： Claude L. Bertin ,  X. M. Henry Huang ,  Thomas Rueckes ,  Ramesh Sivarajan

IPC分类号： H01L29/84

CPC分类号： G11C5/063 ,  B82Y10/00 ,  G11C13/0002 ,  G11C13/0021 ,  G11C13/025 ,  G11C17/16 ,  G11C17/165 ,  G11C2213/19 ,  G11C2213/77 ,  G11C2213/79 ,  H01L27/10 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/112 ,  H01L29/0665 ,  H01L29/0669 ,  H01L29/0673 ,  H01L51/0048 ,  H01L51/0591 ,  Y10S977/943

摘要： Under one aspect, a covered nanotube switch includes: (a) a nanotube element including an unaligned plurality of nanotubes, the nanotube element having a top surface, a bottom surface, and side surfaces; (b) first and second terminals in contact with the nanotube element, wherein the first terminal is disposed on and substantially covers the entire top surface of the nanotube element, and wherein the second terminal contacts at least a portion of the bottom surface of the nanotube element; and (c) control circuitry capable of applying electrical stimulus to the first and second terminals. The nanotube element can switch between a plurality of electronic states in response to a corresponding plurality of electrical stimuli applied by the control circuitry to the first and second terminals. For each different electronic state, the nanotube element provides an electrical pathway of different resistance between the first and second terminals.

摘要翻译： 在一个方面，覆盖的纳米管开关包括：（a）包括不对齐的多个纳米管的纳米管元件，所述纳米管元件具有顶表面，底表面和侧表面; （b）与纳米管元件接触的第一和第二端子，其中第一端子设置在并基本上覆盖纳米管元件的整个顶表面，并且其中第二端子接触纳米管的底表面的至少一部分 元件; 和（c）能够向第一和第二端子施加电刺激的控制电路。 纳米管元件可以响应于由控制电路施加到第一和第二端子的对应的多个电刺激而在多个电子状态之间切换。 对于每个不同的电子状态，纳米管元件提供在第一和第二端子之间具有不同电阻的电路径。

公开(公告)号：US08471238B2

公开(公告)日：2013-06-25

申请号：US11227468

申请日：2005-09-15

申请人： Jonathan W. Ward ,  Mitchell Meinhold ,  Claude L. Bertin ,  Benjamin Schlatka ,  Brent M. Segal ,  Thomas Ruckes

发明人： Jonathan W. Ward ,  Mitchell Meinhold ,  Claude L. Bertin ,  Benjamin Schlatka ,  Brent M. Segal ,  Thomas Ruckes

IPC分类号： H01L29/06

CPC分类号： H01K1/04 ,  B82Y10/00 ,  B82Y20/00 ,  H01L51/0048 ,  H01L51/0052

摘要： Light emitters using nanotubes and methods of making same. A light emitter includes a nanotube article in electrical communication with a first and a second contact, a substrate having a predefined region with a relatively low thermal conductivity said region in predefined physical relation to said nanotube article; and a stimulus circuit in electrical communication with the first and second contacts. The stimulus circuit provides electrical stimulation sufficient to induce light emission from the nanotube article in the proximity of the predefined region. The predefined region is a channel formed in the substrate or a region of material with relatively low thermal conductivity. The light emitter can be integrated with semiconductor circuits including CMOS circuits. The light emitter can be integrated into optical driver circuits (on- and off-chip drivers) and opto-isolators.

摘要翻译： 使用纳米管的发光体及其制作方法。 光发射器包括与第一和第二接触电连通的纳米管制品，具有预定区域的基底，所述预定区域具有相对于所述纳米管制品预定的物理关系的相对低导热性的所述区域; 以及与第一和第二触点电连通的激励电路。 刺激电路提供足以在预定区域附近从纳米管制品引发光发射的电刺激。 预定区域是形成在衬底中的通道或具有相对较低热导率的材料区域。 光发射器可以与包括CMOS电路的半导体电路集成。 光发射器可以集成到光驱动器电路（片上和片外驱动器）和光隔离器中。

公开(公告)号：US07985906B2

公开(公告)日：2011-07-26

申请号：US12951896

申请日：2010-11-22

申请人： Claude L. Bertin ,  Thomas Rueckes ,  Brent M. Segal

发明人： Claude L. Bertin ,  Thomas Rueckes ,  Brent M. Segal

IPC分类号： H03K19/20 ,  H01L29/84

CPC分类号： H01L29/0665 ,  B82Y10/00 ,  G11C13/025 ,  G11C23/00 ,  G11C2213/16 ,  G11C2213/17 ,  H01H1/0094 ,  H01H1/027 ,  H01H2001/0005 ,  H01L27/28 ,  H01L29/0673 ,  H01L29/73 ,  H01L29/78 ,  H01L51/0048 ,  H01L51/0508 ,  Y10S977/762 ,  Y10S977/932 ,  Y10S977/94 ,  Y10T29/49002

摘要： Nanotube-based switching elements and logic circuits are disclosed. Under one embodiment of the invention, a Boolean logic circuit includes at least one input terminal and an output terminal, and a network of nanotube switching elements electrically disposed between said at least one input terminal and said output terminal. The network of nanotube switching elements effectuates a Boolean function transformation of Boolean signals on said at least one input terminal. The Boolean function transformation includes a Boolean inversion within the function, such as a NOT or NOR function.

摘要翻译： 公开了基于纳米管的开关元件和逻辑电路。 在本发明的一个实施例中，布尔逻辑电路包括至少一个输入端子和输出端子，以及电气设置在所述至少一个输入端子和所述输出端子之间的纳米管开关元件网络。 纳米管切换元件的网络在所述至少一个输入端上实现布尔信号的布尔函数变换。 布尔函数变换包括函数内的布尔反转，如NOT或NOR函数。

公开(公告)号：US20110176359A1

公开(公告)日：2011-07-21

申请号：US12934545

申请日：2009-03-25

申请人： Claude L. Bertin ,  Brent M. Segal ,  Darren K. Brock

发明人： Claude L. Bertin ,  Brent M. Segal ,  Darren K. Brock

IPC分类号： G11C11/54 ,  B82Y30/00

CPC分类号： G06N3/063

摘要： Physical neural networks based nanotechnology include dendrite circuits that comprise non-volatile nanotube switches. A first terminal of the non-volatile nanotube switches is able to receive an electrical signal and a second terminal of the non-volatile nanotube switches is coupled to a common node that sums any electrical signals at the first terminals of the nanotube switches. The neural networks further includes transfer circuits to propagate the electrical signal, synapse circuits, and axon circuits.

摘要翻译： 基于物理神经网络的纳米技术包括包含非挥发性纳米管开关的枝晶电路。 非挥发性纳米管开关的第一端子能够接收电信号，并且非易失性纳米管开关的第二端子耦合到公共节点，该公共节点与纳米管开关的第一端子处的任何电信号相加。 神经网络还包括传输电路以传播电信号，突触电路和轴突电路。

公开(公告)号：US07927992B2

公开(公告)日：2011-04-19

申请号：US12066063

申请日：2006-09-05

申请人： Jonathan W. Ward ,  Claude L. Bertin ,  Brent M. Segal

发明人： Jonathan W. Ward ,  Claude L. Bertin ,  Brent M. Segal

IPC分类号： H01L21/20

CPC分类号： H01L23/373 ,  H01L23/433 ,  H01L24/28 ,  H01L24/31 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/1306 ,  H01L2924/14 ,  Y10S977/80 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： Under one aspect, a method of cooling a circuit element includes providing a thermal reservoir having a temperature lower than an operating temperature of the circuit element; and providing a nanotube article in thermal contact with the circuit element and with the reservoir, the nanotube article including a non-woven fabric of nanotubes in contact with other nanotubes to define a plurality of thermal pathways along the article, the nanotube article having a nanotube density and a shape selected such that the nanotube article is capable of transferring heat from the circuit element to the thermal reservoir.

摘要翻译： 在一个方面，冷却电路元件的方法包括提供具有低于电路元件的工作温度的温度的热存储器; 并且提供与所述电路元件和所述储存器热接触的纳米管制品，所述纳米管制品包括与其它纳米管接触的纳米管的无纺织物以限定沿着所述制品的多个热路径，所述纳米管制品具有纳米管 密度和形状，使得纳米管制品能够将热量从电路元件传递到热储存器。