公开(公告)号：US20080203526A1

公开(公告)日：2008-08-28

申请号：US12072210

申请日：2008-02-25

申请人： Ichiro Mihara

发明人： Ichiro Mihara

IPC分类号： H01L27/06

CPC分类号： H01L23/645 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5227 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/131 ,  H01L2924/0002 ,  H01L2924/19015 ,  H01L2924/014 ,  H01L2224/05552

摘要： A plurality of wirings, column-shaped electrodes, sealing films, and soldering balls, are provided on a third upper-layer insulating film formed on a silicon substrate. A spirally configured thin-film inductive element is disposed beneath the bottom surface of a ground insulating film formed beneath the silicon substrate. The inner and outer end portions of the thin-film inductive element are respectively connected to the wirings via a vertical conductor disposed in the silicon substrate. In this case, it is not required to secure a certain area otherwise needed for the formation of the thin-film inductive element over the surface of the third upper-layer insulating film that accommodates the wirings. Hence, even when the thin-film inductive element has been provided, it is possible to evade a feasibility to incur restraint on the distribution of the wirings formed over the surface of the third upper-layer insulating film.

摘要翻译： 多个布线，柱状电极，密封膜和焊球设置在形成于硅基板上的第三上层绝缘膜上。 螺旋构造的薄膜感应元件设置在形成在硅衬底下方的接地绝缘膜的底表面下方。 薄膜电感元件的内端部和外端部分别经由布置在硅衬底中的垂直导体连接到布线。 在这种情况下，不需要确保在容纳布线的第三上层绝缘膜的表面上形成薄膜感应元件所需的某些区域。 因此，即使设置了薄膜感应元件，也可以避免对在第三上层绝缘膜的表面上形成的布线的分布产生约束的可行性。

公开(公告)号：US07417330B2

公开(公告)日：2008-08-26

申请号：US11226769

申请日：2005-09-14

申请人： Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L23/29 ,  H01L23/28 ,  H01L23/31

CPC分类号： H01L21/6835 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/10 ,  H01L24/13 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68331 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05569 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor device includes a semiconductor substrate having an integrated circuit and at least one connection pad, and at least one external connection electrode electrically connected with the connection pad. A first sealing material is provided on the semiconductor substrate around the external connection electrode, each impurity concentration of an Na ion, a K ion, a Ca ion and Cl ion contained in the first sealing material being not greater than 10 ppm. A second sealing material is provided on at least one of a lower surface and a peripheral side surface of the semiconductor substrate, a total impurity concentration of an Na ion, a K ion, a Ca ion and a Cl ion contained in the second sealing material being not smaller than 100 ppm.

公开(公告)号：US20070158857A1

公开(公告)日：2007-07-12

申请号：US11650808

申请日：2007-01-08

申请人： Ichiro Mihara

发明人： Ichiro Mihara

IPC分类号： H01L23/48

CPC分类号： H01L23/5389 ,  H01L23/3114 ,  H01L24/24 ,  H01L24/82 ,  H01L24/94 ,  H01L24/97 ,  H01L2224/12105 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06568 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2224/83

摘要： A semiconductor device includes a plurality of semiconductor constructs, each of the semiconductor constructs including a semiconductor substrate and external connection electrodes provided on an upper surface of the semiconductor substrate. The semiconductor substrates of the semiconductor constructs are different in a planar-size. The plurality of semiconductor constructs are stacked from bottom to top in descending order of planar-sizes of the semiconductor substrates included in the plurality of semiconductor constructs. An insulating film at least is provided around one semiconductor construct disposed on the top of the plurality of semiconductor constructs and on another semiconductor construct disposed under the one semiconductor construct. Each of the upper surfaces of the plurality of external connection electrodes is exposed from the one semiconductor construct and from the insulating film.

摘要翻译： 半导体器件包括多个半导体构造，每个半导体构造包括半导体衬底和设置在半导体衬底的上表面上的外部连接电极。 半导体结构的半导体衬底在平面尺寸上是不同的。 多个半导体构造以从多个半导体构造体中包含的半导体衬底的平面尺寸的降序的顺序从底部到顶部堆叠。 绝缘膜至少设置在设置在多个半导体结构的顶部上的一个半导体构造周围，以及设置在一个半导体构造下的另一个半导体构造。 多个外部连接电极的每个上表面都从一个半导体结构和绝缘膜露出。

公开(公告)号：US20070145518A1

公开(公告)日：2007-06-28

申请号：US11645044

申请日：2006-12-22

申请人： Ichiro Mihara

发明人： Ichiro Mihara

IPC分类号： H01L29/00

CPC分类号： H01L21/6835 ,  H01L21/4857 ,  H01L23/5389 ,  H01L24/48 ,  H01L24/73 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2224/82039 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A circuit board includes a semiconductor substrate which has a plurality of through holes passing from an upper surface to a lower surface thereof. A plurality of wiring lines are provided on the upper surface of the semiconductor substrate and have bottomed cylindrical portions located within regions corresponding to the through holes. Bottom surfaces of the bottomed cylindrical portions of the wiring lines serve as connection pad portions.

摘要翻译： 电路板包括具有从上表面到下表面通过的多个通孔的半导体基板。 在半导体衬底的上表面上设置有多个布线，并且具有位于对应于通孔的区域内的有底圆筒部。 布线的有底圆筒部分的底表面用作连接垫部分。

公开(公告)号：US07190064B2

公开(公告)日：2007-03-13

申请号：US10472803

申请日：2003-02-03

申请人： Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L23/52

CPC分类号： H01L21/6835 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/16225 ,  H01L2224/24195 ,  H01L2224/24226 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/83 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

摘要： A plurality of semiconductor chips (23) are bonded to an adhesive layer (22) formed on a base plate (21). Then, first to third insulating films (31, 35, 39), first and second underlying metal layers (33, 37), first and second re-wirings (34, 38), and a solder ball (41) are collectively formed for the plural semiconductor chips (23). In this case, the first and second underlying metal layers (33, 37) are formed by a sputtering method, and the first and second re-wirings (34, 38) are formed by an electroplating method. Then, a laminate structure consisting of the three insulating films (39, 35, 31), the adhesive layer (22), and the base plate (21) is cut in a region positioned between the adjacent semiconductor chips (23).

摘要翻译： 多个半导体芯片（23）被接合到形成在基板（21）上的粘合剂层（22）上。 然后，共同形成第一至第三绝缘膜（31,35,39），第一和第二下面的金属层（33,37），第一和第二重新布线（34,38）以及焊球（41） 多个半导体芯片（23）。 在这种情况下，通过溅射法形成第一和第二下面的金属层（33,37），并且通过电镀方法形成第一和第二重新布线（34,38）。 然后，在位于相邻的半导体芯片（23）之间的区域中切割由三个绝缘膜（39,35,31），粘合剂层（22）和基板（21）组成的层叠结构。

公开(公告)号：US20060273463A1

公开(公告)日：2006-12-07

申请号：US11443858

申请日：2006-05-31

申请人： Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/3114 ,  H01L23/5286 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： A semiconductor device includes a semiconductor substrate having an integrated circuit, a first insulating film formed on the semiconductor substrate, at least one power source internal wiring line formed on the first insulating film, and a second insulating film formed on the first insulating film and on the internal wiring line and having a plurality of openings exposing parts of the internal wiring line. At least one wiring line is formed on an upper side of the second insulating film to correspond to the internal wiring line and electrically connected to the internal wiring line via the plurality of openings of the second insulating film. The wiring line has at least one external electrode pad portion whose number is smaller than the number of openings in the second insulating film.

摘要翻译： 半导体器件包括具有集成电路的半导体衬底，形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的至少一个电源内部布线和形成在第一绝缘膜上的第二绝缘膜， 内部布线并且具有暴露内部布线的部分的多个开口。 至少一条布线形成在第二绝缘膜的上侧，以对应于内部布线，并且经由第二绝缘膜的多个开口与内部布线相电连接。 布线具有数量小于第二绝缘膜中的开口数量的至少一个外部电极焊盘部分。

公开(公告)号：US20060244136A1

公开(公告)日：2006-11-02

申请号：US11457360

申请日：2006-07-13

申请人： Ichiro Mihara

发明人： Ichiro Mihara

IPC分类号： H01L23/48

CPC分类号： H01L24/24 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2224/83 ,  H01L2924/00

摘要： A semiconductor device includes a base member made of a material containing at least a thermosetting resin, and at least one semiconductor constructing body mounted on the base member, and having a semiconductor substrate and a plurality of external connecting electrodes formed on the semiconductor substrate. An insulating layer is formed on the base member around the semiconductor constructing body. An interconnection of at least one layer is formed on one sides of the semiconductor constructing body and insulating layer, electrically connected to the external connecting electrode of the semiconductor constructing body, and having a connecting pad portion, the semiconductor substrate is fixed to the base member by fixing force of the base member.

摘要翻译： 一种半导体器件包括由至少含有热固性树脂的材料制成的基底构件和安装在基底构件上的至少一个半导体构造体，并且具有形成在半导体衬底上的半导体衬底和多个外部连接电极。 在半导体构造体周围的基底构件上形成绝缘层。 至少一层的互连形成在与半导体构造体的外部连接电极电连接的半导体构造体和绝缘层的一侧上，并且具有连接焊盘部分，半导体衬底固定到基底构件 通过基体的固定力。

公开(公告)号：US20060202353A1

公开(公告)日：2006-09-14

申请号：US11429368

申请日：2006-05-05

申请人： Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L23/48

CPC分类号： H01L21/6835 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/16225 ,  H01L2224/24195 ,  H01L2224/24226 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/83 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

摘要： A plurality of semiconductor chips are bonded to an adhesive layer formed on a base plate. Then, first to third insulating films, first and second underlying metal layers, first and second re-wirings, and a solder ball are collectively formed for the plural semiconductor chips. In this case, the first and second underlying metal layers are formed by a sputtering method, and the first and second re-wirings are formed by an electroplating method. Then, a laminate structure consisting of the three insulating films, the adhesive layer, and the base plate is cut in a region positioned between the adjacent semiconductor chips.

摘要翻译： 多个半导体芯片被接合到形成在基板上的粘合剂层。 然后，对于多个半导体芯片，共同形成第一至第三绝缘膜，第一和第二下面的金属层，第一和第二重新布线以及焊球。 在这种情况下，通过溅射法形成第一和第二基底金属层，并且通过电镀方法形成第一和第二重新布线。 然后，在位于相邻的半导体芯片之间的区域中切割由三个绝缘膜，粘合剂层和基板组成的层叠结构。

公开(公告)号：US20050161803A1

公开(公告)日：2005-07-28

申请号：US11037423

申请日：2005-01-18

申请人： Ichiro Mihara

发明人： Ichiro Mihara

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/44 ,  H01L21/60 ,  H01L23/053 ,  H01L23/12 ,  H01L23/31 ,  H01L23/485 ,  H01L23/538 ,  H01L25/04 ,  H01L25/18

CPC分类号： H01L24/24 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2224/83 ,  H01L2924/00

摘要： A semiconductor device includes a base member made of a material containing at least a thermosetting resin, and at least one semiconductor constructing body mounted on the base member, and having a semiconductor substrate and a plurality of external connecting electrodes formed on the semiconductor substrate. An insulating layer is formed on the base member around the semiconductor constructing body. An interconnection of at least one layer is formed on one sides of the semiconductor constructing body and insulating layer, electrically connected to the external connecting electrode of the semiconductor constructing body, and having a connecting pad portion, the semiconductor substrate is fixed to the base member by fixing force of the base member.

摘要翻译： 一种半导体器件包括由至少含有热固性树脂的材料制成的基底构件和安装在基底构件上的至少一个半导体构造体，并且具有形成在半导体衬底上的半导体衬底和多个外部连接电极。 在半导体构造体周围的基底构件上形成绝缘层。 至少一层的互连形成在与半导体构造体的外部连接电极电连接的半导体构造体和绝缘层的一侧上，并且具有连接焊盘部分，半导体衬底固定到基底构件 通过基体的固定力。

公开(公告)号：US20050098891A1

公开(公告)日：2005-05-12

申请号：US10472803

申请日：2003-02-03

申请人： Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L21/58 ,  H01L21/60 ,  H01L21/68 ,  H01L23/31 ,  H01L23/538 ,  H01L25/10 ,  H01L23/485

CPC分类号： H01L21/6835 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/16225 ,  H01L2224/24195 ,  H01L2224/24226 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/83 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

摘要： A plurality of semiconductor chips (23) are bonded to an adhesive layer (22) formed on a base plate (21). Then, first to third insulating films (31, 35, 39), first and second underlying metal layers (33, 37), first and second re-wirings (34, 38), and a solder ball (41) are collectively formed for the plural semiconductor chips (23). In this case, the first and second underlying metal layers (33, 37) are formed by a sputtering method, and the first and second re-wirings (34, 38) are formed by an electroplating method. Then, a laminate structure consisting of the three insulating films (39, 35, 31), the adhesive layer (22), and the base plate (21) is cut in a region positioned between the adjacent semiconductor chips (23).

摘要翻译： 多个半导体芯片（23）被接合到形成在基板（21）上的粘合剂层（22）上。 然后，共同形成第一至第三绝缘膜（31,35,39），第一和第二下面的金属层（33,37），第一和第二重新布线（34,38）以及焊球（41） 多个半导体芯片（23）。 在这种情况下，通过溅射法形成第一和第二下面的金属层（33,37），并且通过电镀方法形成第一和第二重新布线（34,38）。 然后，在位于相邻的半导体芯片（23）之间的区域中切割由三个绝缘膜（39,35,31），粘合剂层（22）和基板（21）组成的层叠结构。