公开(公告)号：US06855436B2

公开(公告)日：2005-02-15

申请号：US10448947

申请日：2003-05-30

申请人： Stephen W. Bedell ,  Keith E. Fogel ,  Devendra K. Sadana ,  Ghavam G. Shahidi

发明人： Stephen W. Bedell ,  Keith E. Fogel ,  Devendra K. Sadana ,  Ghavam G. Shahidi

IPC分类号： H01L27/08 ,  H01L21/02 ,  H01L21/20 ,  H01L21/265 ,  H01L21/762 ,  H01L27/12 ,  B32B9/04

CPC分类号： H01L21/76243 ,  H01L21/26506 ,  H01L21/76267 ,  Y10T428/12674 ,  Y10T428/12681

摘要： A method of forming a substantially relaxed, high-quality SiGe-on-insulator substrate material using SIMOX and Ge interdiffusion is provided. The method includes first implanting ions into a Si-containing substrate to form an implant rich region in the Si-containing substrate. The implant rich region has a sufficient ion concentration such that during a subsequent anneal at high temperatures a barrier layer that is resistant to Ge diffusion is formed. Next, a Ge-containing layer is formed on a surface of the Si-containing substrate, and thereafter a heating step is performed at a temperature which permits formation of the barrier layer and interdiffusion of Ge thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer.

摘要翻译： 提供了使用SIMOX和Ge相互扩散形成基本上松弛的，优质的绝缘体上硅衬底材料的方法。 该方法包括首先将离子注入到含Si衬底中以在含Si衬底中形成富含注入区的区域。 注入富含区域具有足够的离子浓度，使得在随后的高温退火期间，形成耐Ge扩散的阻挡层。 接下来，在含Si衬底的表面上形成Ge含有层，然后在允许形成阻挡层和Ge的相互扩散的温度下进行加热步骤，从而形成基本上松弛的单晶SiGe层 阻挡层顶部。

公开(公告)号：US09099596B2

公开(公告)日：2015-08-04

申请号：US13194301

申请日：2011-07-29

申请人： Stephen W. Bedell ,  Keith E. Fogel ,  Bahman Hekmatshoar-Tabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Keith E. Fogel ,  Bahman Hekmatshoar-Tabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L31/0745 ,  H01L31/18 ,  H01L31/0312 ,  H01L31/0747 ,  H01L31/0725 ,  H01L31/078 ,  H01L31/20

CPC分类号： H01L31/0725 ,  C23C14/3407 ,  H01L31/02167 ,  H01L31/022441 ,  H01L31/074 ,  H01L31/0747 ,  H01L31/078 ,  H01L31/1808 ,  H01L31/1812 ,  H01L31/204 ,  Y02E10/50 ,  Y02P70/521

摘要： A photovoltaic device and method include a doped germanium-containing substrate, an emitter contact coupled to the substrate on a first side and a back contact coupled to the substrate on a side opposite the first side. The emitter includes at least one doped layer of an opposite conductivity type as that of the substrate and the back contact includes at least one doped layer of the same conductivity type as that of the substrate. The at least one doped layer of the emitter contact or the at least one doped layer of the back contact is in direct contact with the substrate, and the at least one doped layer of the emitter contact or the back contact includes an n-type material having an electron affinity smaller than that of the substrate, or a p-type material having a hole affinity larger than that of the substrate.

摘要翻译： 光伏器件和方法包括掺杂的含锗衬底，在第一侧耦合到衬底的发射极触点和在与第一侧相对的一侧耦合到衬底的后触点。 发射极包括与衬底相反的导电类型的至少一个掺杂层，而后接触包括至少一个与衬底相同导电类型的掺杂层。 发射极接触的至少一个掺杂层或背接触的至少一个掺杂层与衬底直接接触，并且发射极接触或后接触的至少一个掺杂层包括n型材料 具有小于衬底的电子亲和力，或具有大于衬底的孔亲合力的p型材料。

公开(公告)号：US09064722B2

公开(公告)日：2015-06-23

申请号：US13418476

申请日：2012-03-13

申请人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L27/088 ,  H01L21/8252 ,  H01L27/06 ,  G06F17/50

CPC分类号： H01L29/7786 ,  G06F17/5045 ,  G06F17/5063 ,  H01L21/6835 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/088 ,  H01L27/095 ,  H01L29/0634 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/402 ,  H01L29/66462 ,  H01L29/872 ,  H01L2221/68363

摘要： A circuit includes a first field effect transistor having a gate, a first drain-source terminal, and a second drain-source terminal; and a second field effect transistor having a gate, a first drain-source terminal, and a second drain-source terminal. The second field effect transistor and the first field effect transistor are of the same type, i.e., both n-channel transistors or both p-channel transistors. The second drain-source terminal of the first field effect transistor is coupled to the first drain-source terminal of the second field effect transistor; and the gate of the second field effect transistor is coupled to the first drain-source terminal of the second field effect transistor. The resulting three-terminal device can be substituted for a single field effect transistor that would otherwise suffer breakdown under proposed operating conditions.

摘要翻译： 电路包括具有栅极的第一场效应晶体管，第一漏极 - 源极端子和第二漏极 - 源极端子; 以及具有栅极的第二场效应晶体管，第一漏极 - 源极端子和第二漏极 - 源极端子。 第二场效应晶体管和第一场效应晶体管是相同类型的，即n沟道晶体管或两个p沟道晶体管。 第一场效应晶体管的第二漏极 - 源极端子耦合到第二场效应晶体管的第一漏极 - 源极端子; 并且第二场效应晶体管的栅极耦合到第二场效应晶体管的第一漏极 - 源极端子。 所得到的三端子器件可以替代否则在所提出的工作条件下会损坏的单个场效应晶体管。

公开(公告)号：US08912424B2

公开(公告)日：2014-12-16

申请号：US13612632

申请日：2012-09-12

申请人： Stephen W. Bedell ,  Keith E. Fogel ,  Bahman Hekmatshoar-Tabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Keith E. Fogel ,  Bahman Hekmatshoar-Tabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L21/00

CPC分类号： H01L31/1892 ,  H01L31/02167 ,  H01L31/0687 ,  H01L31/0725 ,  H01L31/0747 ,  H01L31/076 ,  H01L31/1808 ,  H01L31/1812 ,  Y02E10/544 ,  Y02E10/548 ,  Y02P70/521

摘要： A method of forming a photovoltaic device that includes bonding a substrate to a germanium-containing semiconductor layer with a stressor layer, wherein the stressor layer cleaves the germanium-containing semiconductor layer. At least one semiconductor layer is formed on a cleaved surface of the germanium-containing semiconductor layer that is opposite the conductivity type of the germanium-containing semiconductor layer to provide a first solar cell. The first solar cell absorbs a first range of wavelengths. At least one second solar cell may be formed on the first solar cell, wherein the at least one second solar cell is composed of at least one semiconductor material to absorb a second range of wavelengths that is different than the first range wavelengths absorbed by the first solar cell.

摘要翻译： 一种形成光伏器件的方法，该光电器件包括将衬底粘合到含锗半导体层与应力层，其中所述应力层切割含锗半导体层。 在与含锗半导体层的导电类型相反的含锗半导体层的切割表面上形成至少一个半导体层以提供第一太阳能电池。 第一太阳能电池吸收第一波长范围。 可以在第一太阳能电池上形成至少一个第二太阳能电池，其中至少一个第二太阳能电池由至少一个半导体材料组成，以吸收不同于由第一太阳能电池吸收的第一范围波长的第二波长范围 太阳能电池。

公开(公告)号：US08624104B2

公开(公告)日：2014-01-07

申请号：US13179731

申请日：2011-07-11

申请人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L31/00 ,  H01L21/00

CPC分类号： H01L31/075 ,  H01L31/03046 ,  H01L31/074 ,  Y02E10/544 ,  Y02P70/521

摘要： An InxGa1-xAs interlayer is provided between a III-V base and an intrinsic amorphous semiconductor layer of a heterojunction III-V solar cell structure. Improved surface passivation and open circuit voltage may be obtained through the incorporation of the interlayer within the structure.

摘要翻译： 在III-V基极和异质结III-V族太阳能电池结构的本征非晶半导体层之间提供In x Ga 1-x As夹层。 可以通过在结构内并入中间层来获得改进的表面钝化和开路电压。

公开(公告)号：US20130309791A1

公开(公告)日：2013-11-21

申请号：US13472584

申请日：2012-05-16

申请人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L33/52 ,  H01L21/50

CPC分类号： H01L27/1218 ,  H01L21/304 ,  H01L21/6835 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1266 ,  H01L2221/68368

摘要： A high resolution active matrix backplane is fabricated using techniques applicable to flexible substrates. A backplane layer including active semiconductor devices is formed on a semiconductor-on-insulator substrate. The backplane layer is spalled from the substrate. A frontplane layer including passive devices such as LCDs, OLEDs, photosensitive materials, or piezo-electric materials is formed over the backplane layer to form an active matrix structure. The active matrix structure may be fabricated to allow bottom emission and provide mechanical flexibility.

摘要翻译： 使用适用于柔性基板的技术制造高分辨率有源矩阵背板。 包含有源半导体器件的背板层形成在绝缘体上半导体衬底上。 背板层从基板剥离。 包括诸如LCD，OLED，感光材料或压电材料的无源器件的前端层形成在背板层上以形成有源矩阵结构。 可以制造有源矩阵结构以允许底部发射并提供机械灵活性。

公开(公告)号：US20130240951A1

公开(公告)日：2013-09-19

申请号：US13418438

申请日：2012-03-13

申请人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L29/778 ,  H01L29/872

CPC分类号： H01L29/0634 ,  H01L21/2007 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/872

摘要： Gallium nitride high electron mobility transistor structures enable high breakdown voltages and are usable for high-power, and/or high-frequency switching. Schottky diodes facilitate high voltage applications and offer fast switching. A superjunction formed by p/n junctions in gallium nitride facilitates operation of the high electron mobility transistor structures and Schottky diodes as well as gated diodes formed by drain to gate connections of the transistor structures. Breakdown between the gate and drain of the high electron mobility transistor structures, through the substrate, or both is suppressed.

摘要翻译： 氮化镓高电子迁移率晶体管结构能够实现高击穿电压，并且可用于大功率和/或高频开关。 肖特基二极管便于高压应用，并提供快速切换。 由氮化镓中的p / n结形成的超连接有助于高电子迁移率晶体管结构和肖特基二极管以及由晶体管结构的漏极到栅极连接形成的门控二极管的操作。 抑制高电子迁移率晶体管结构的栅极和漏极之间的通过衬底或二者的破坏。

公开(公告)号：US20100221867A1

公开(公告)日：2010-09-02

申请号：US12436249

申请日：2009-05-06

申请人： Stephen W. Bedell ,  Joel P. de Souza ,  Keith E. Fogel ,  Harold J. Hovel ,  Daniel A. Inns ,  Jeehwan Kim ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Ghavam G. Shahidi

发明人： Stephen W. Bedell ,  Joel P. de Souza ,  Keith E. Fogel ,  Harold J. Hovel ,  Daniel A. Inns ,  Jeehwan Kim ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Ghavam G. Shahidi

IPC分类号： H01L31/0376 ,  H01L21/762

CPC分类号： H01L31/03921 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/02667 ,  H01L21/7624 ,  H01L21/76245 ,  H01L21/76262 ,  H01L31/046 ,  H01L31/0463 ,  H01L31/0465 ,  H01L31/1872 ,  Y02E10/50 ,  Y02P70/521

摘要： A lost cost method for fabricating SOI substrates is provided. The method includes forming a stack of p-type doped amorphous Si-containing layers on a semiconductor region of a substrate by utilizing an evaporation deposition process. A solid phase recrystallization step is then performed to convert the amorphous Si-containing layers within the stack into a stack of p-type doped single crystalline Si-containing layers. After recrystallization, the single crystalline Si-containing layers are subjected to anodization and at least an oxidation step to form an SOI substrate. Solar cells and/or other semiconductor devices can be formed on the upper surface of the inventive SOI substrate.

摘要翻译： 提供了一种用于制造SOI衬底的损耗成本方法。 该方法包括通过利用蒸发沉积工艺在衬底的半导体区域上形成一层p型掺杂的非晶态含Si层。 然后进行固相重结晶步骤，以将叠层内的非晶态含硅层转化为p型掺杂单晶含Si层的堆叠。 重结晶后，对单晶含Si层进行阳极氧化和至少氧化步骤以形成SOI衬底。 太阳能电池和/或其他半导体器件可以形成在本发明的SOI衬底的上表面上。

公开(公告)号：US20100032684A1

公开(公告)日：2010-02-11

申请号：US12539248

申请日：2009-08-11

申请人： Stephen W. Bedell ,  Huajie Chen ,  Keith E. Fogel ,  Devendra K. Sadana ,  Ghavam G. Shahidi

发明人： Stephen W. Bedell ,  Huajie Chen ,  Keith E. Fogel ,  Devendra K. Sadana ,  Ghavam G. Shahidi

IPC分类号： H01L29/267 ,  H01L29/161 ,  H01L29/165

CPC分类号： H01L21/26506 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02694 ,  H01L21/2658

摘要： A method for fabricating substantially relaxed SiGe alloy layers with a reduced planar defect density is disclosed The method of the present invention includes forming a strained Ge-containing layer on a surface of a Si-containing substrate; implanting ions at or below the Ge-containing layer/Si-containing substrate interface and heating to form a substantially relaxed SiGe alloy layer that has a reduced planar defect density. A substantially relaxed SiGe-on-insulator substrate material having a SiGe layer with a reduced planar defect density as well as heterostructures containing the same are also provided.

摘要翻译： 公开了一种制造具有减小的平面缺陷密度的基本上松弛的SiGe合金层的方法。本发明的方法包括在含Si衬底的表面上形成应变的含Ge层; 在含锗层/含Si衬底界面处或下方注入离子，并加热以形成具有减小的平面缺陷密度的基本上松弛的SiGe合金层。 还提供了具有具有减小的平面缺陷密度的SiGe层以及含有该SiGe层的异质结构的基本上松弛的绝缘体上硅衬底材料。

公开(公告)号：US07501318B2

公开(公告)日：2009-03-10

申请号：US10984212

申请日：2004-11-09

申请人： Stephen W. Bedell ,  Keith E. Fogel ,  Devendra K. Sadana ,  Ghavam G. Shahidi

发明人： Stephen W. Bedell ,  Keith E. Fogel ,  Devendra K. Sadana ,  Ghavam G. Shahidi

IPC分类号： H01L21/84

CPC分类号： H01L21/76243 ,  H01L21/26506 ,  H01L21/76267 ,  Y10T428/12674 ,  Y10T428/12681

摘要： A method of forming a substantially relaxed, high-quality SiGe-on-insulator substrate material using SIMOX and Ge interdiffusion is provided. The method includes first implanting ions into a Si-containing substrate to form an implant rich region in the Si-containing substrate. The implant rich region has a sufficient ion concentration such that during a subsequent anneal at high temperatures a barrier layer that is resistant to Ge diffusion is formed. Next, a Ge-containing layer is formed on a surface of the Si-containing substrate, and thereafter a heating step is performed at a temperature which permits formation of the barrier layer and interdiffusion of Ge thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer.

摘要翻译： 提供了使用SIMOX和Ge相互扩散形成基本上松弛的，优质的绝缘体上硅衬底材料的方法。 该方法包括首先将离子注入到含Si衬底中以在含Si衬底中形成富含注入区的区域。 注入富含区域具有足够的离子浓度，使得在随后的高温退火期间，形成耐Ge扩散的阻挡层。 接下来，在含Si衬底的表面上形成Ge含有层，然后在允许形成阻挡层和Ge的相互扩散的温度下进行加热步骤，从而形成基本上松弛的单晶SiGe层 阻挡层顶部。