公开(公告)号：US06539216B1

公开(公告)日：2003-03-25

申请号：US09475053

申请日：1999-12-30

Applicant: Eung Gie Oh ,  Min Gun Kim ,  Sung Weon Kang ,  Jae Jin Lee

Inventor： Eung Gie Oh ,  Min Gun Kim ,  Sung Weon Kang ,  Jae Jin Lee

IPC: H04B126

CPC classification number: H04B1/18

Abstract: A microwave frequency converting receiver of an RF unit should be generally used in wireless/mobile communications systems such as cellular, PCS, WLL and IMT2000 systems and also have low power consumption, low-noise characteristic, high gain and small size. In order to produce the above frequency converting receiver, a multi-band and multi-mode frequency converting receiver for use in a wireless mobile communications system comprises a wideband low-noise amplifier for amplifying a radio frequency input signal, a frequency mixer for generating an intermediate frequency signal having a relatively high linearity by mixing a local oscillator frequency signal and the amplified radio frequency signal outputted from the wideband low noise amplifier, an intermediate frequency amplifier for producing a final intermediate frequency signal by amplifying the intermediate frequency signal derived from the frequency mixer and an input matching circuit for receiving a microwave signal within a frequency band of the wireless mobile communications system, impedance-matching the received microwave signal to the radio frequency input signal of the wideband low-noise amplifier and determining an operating frequency band of the frequency converting receiver.

Abstract translation: RF单元的微波频率转换接收机通常应用在诸如蜂窝，PCS，WLL和IMT2000系统的无线/移动通信系统中，并且还具有低功耗，低噪声特性，高增益和小尺寸。 为了生产上述频率转换接收机，用于无线移动通信系统的多频和多模式频率转换接收机包括用于放大射频输入信号的宽带低噪声放大器，用于产生 通过混合本地振荡器频率信号和从宽带低噪声放大器输出的放大射频信号具有较高线性度的中频信号，用于通过放大从频率导出的中频信号来产生最终中频信号的中频放大器 混频器和用于在无线移动通信系统的频带内接收微波信号的输入匹配电路，将接收到的微波信号与宽带低噪声放大器的射频输入信号进行阻抗匹配，并确定该宽带低噪声放大器的工作频带 变频接收机。

公开(公告)号：US06448633B1

公开(公告)日：2002-09-10

申请号：US09444035

申请日：1999-11-19

Applicant: Jae Hak Yee ,  Young Suk Chung ,  Jae Jin Lee ,  Terry Davis ,  Chung Suk Han ,  Jae Hun Ku ,  Jae Sung Kwak ,  Sang Hyun Ryu

Inventor： Jae Hak Yee ,  Young Suk Chung ,  Jae Jin Lee ,  Terry Davis ,  Chung Suk Han ,  Jae Hun Ku ,  Jae Sung Kwak ,  Sang Hyun Ryu

IPC: H01L23495

CPC classification number: H01L23/3107 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49551 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/29007 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0106 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A lead frame for making a semiconductor package is disclosed. The leadframe's leads include a lead lock provided at a free end of each inner lead that is adapted to increase a bonding force of the inner lead to a resin encapsulate, thereby effectively preventing a separation of the inner lead from occurring in a singulation process involved in the fabrication of the semiconductor package. A semiconductor package fabricated using the lead frame and a fabrication method for the semiconductor package are also disclosed. The lead frame includes a paddle, a plurality of tie bars for supporting the comers of the paddle, a plurality of leads arranged at each of four sides or two facing sides of the paddle in such a fashion that they are spaced apart from an adjacent side of the paddle while extending perpendicularly to the associated side of the paddle, each of the leads having lead separation preventing means adapted to increase a bonding force of the lead to a resin encapsulate subsequently molded to encapsulate the lead frame for fabrication of the semiconductor package, and dam bars for supporting the leads and the tie bars. Additional package embodiments include exposed protrusions extending downward from the leads. The exposed protrusions are irradiated with a laser to remove set resin prior to a solder ball attachment step.

Abstract translation: 公开了一种用于制造半导体封装的引线框架。 引线框架的引线包括提供在每个内引线的自由端处的引线锁，其适于增加内引线与树脂封装件的结合力，从而有效地防止内引线的分离在所涉及的单个加工过程中发生 制造半导体封装。 还公开了使用引线框制造的半导体封装和用于半导体封装的制造方法。 引线框架包括桨，用于支撑桨的角的多个连杆，多个引线布置在桨的四个侧面或两个相对的侧面中，使得它们与相邻侧面间隔开 的叶片，同时垂直于桨叶的相关侧延伸，每个引线具有引线分离防止装置，其适于增加引线与随后模制的树脂封装件的结合力，以封装引线框架以制造半导体封装， 和用于支撑引线和连接条的阻挡条。 另外的封装实施例包括从引线向下延伸的暴露突起。 在焊球附着步骤之前，用激光照射暴露的突起以去除固化树脂。

公开(公告)号：US06411801B1

公开(公告)日：2002-06-25

申请号：US09399832

申请日：1999-09-21

Applicant: Min-Gun Kim ,  Sung-Won Kang ,  Eung-Gie Oh ,  Jae-Jin Lee

Inventor： Min-Gun Kim ,  Sung-Won Kang ,  Eung-Gie Oh ,  Jae-Jin Lee

IPC: H04B128

CPC classification number: H03D7/1441 ,  H03D7/1458 ,  H03D7/1491 ,  H03D2200/0084

Abstract: A double balanced active mixer is used for compensating an asymmetric characteristic of complementary radio frequency signals, to thereby improve linearity of the double balanced active mixer. The double balanced active mixer includes an input transistor part for amplifying first and second radio frequency signals having complementary phase each other which are inputted from external circuit and for transferring the amplified first and second radio frequency signals and an Output transistor part for outputting first and second intermediate frequency signals which are complementary each other by switching the amplified first and second radio frequency signals.

Abstract translation: 双平衡有源混频器用于补偿互补射频信号的不对称特性，从而提高双平衡有源混频器的线性度。 双平衡有源混频器包括：输入晶体管部分，用于放大从外部电路输入的互补相位的第一和第二射频信号，以及用于传送放大的第一和第二射频信号;以及输出晶体管部分，用于输出第一和第二 通过切换放大的第一和第二射频信号彼此互补的中频信号。

公开(公告)号：US06275439B1

公开(公告)日：2001-08-14

申请号：US09604516

申请日：2000-06-27

Applicant: Jae-Jin Lee

Inventor： Jae-Jin Lee

IPC: G11C700

CPC classification number: G11C11/406

Abstract: The present invention relates to a power supply selectively using a chip driving power and a data input/output driving power in a semiconductor device. The power supply according to the present invention includes a switch for selectively coupling a first power line providing power to an internal circuit to a second power line providing power to a data input/output unit in response to a control signal which is produces according to an operation mode; and a controller for receiving row address strobe signals corresponding to each of memory banks, and a self-refresh signal activated in a refresh mode and producing the control signal. Accordingly, the present invention has an effect on the reduction of a noise generated on the power line, by selectively using the chip driving power and the data input/output driving power. Furthermore, the present invention increases the operation speed of the memory device by effectively using the power lines.

Abstract translation: 本发明涉及一种在半导体器件中选择性地使用芯片驱动功率和数据输入/输出驱动功率的电源。 根据本发明的电源包括用于响应于根据本发明的电源产生的控制信号而选择性地将向内部电路提供电力的第一电力线耦合到向数据输入/输出单元提供电力的第二电力线的开关 操作模式; 以及控制器，用于接收与每个存储体相对应的行地址选通信号，以及在刷新模式下激活的自刷新信号并产生控制信号。 因此，通过选择性地使用芯片驱动功率和数据输入/输出驱动电力，本发明对减少电力线上产生的噪声具有影响。 此外，本发明通过有效地使用电力线来增加存储装置的操作速度。

公开(公告)号：US5861327A

公开(公告)日：1999-01-19

申请号：US889939

申请日：1997-07-10

Applicant: Sung-Jae Maeng ,  Jae-Jin Lee ,  Kwang-Eui Pyun

Inventor： Sung-Jae Maeng ,  Jae-Jin Lee ,  Kwang-Eui Pyun

IPC: H01L21/336 ,  H01L21/027 ,  H01L21/285 ,  H01L21/338

CPC classification number: H01L29/66863 ,  H01L21/0274 ,  H01L21/28581 ,  H01L21/28587

Abstract: A fabrication method of a semiconductor device is disclosed. A T-shaped gate used for decreasing the gate resistance is adopted in fabricating an ultrahigh frequency and low-noise device. According to the present invention, a gate pattern is formed by a dual exposure technique, a thin metal film is formed, a pattern for plating is formed, and a gate is formed by electroplating, whereby decreasing a gate length and gate resistance. Therefore, the cost of production is decreased, the yield is improved, and the noise figure is minimized.

Abstract translation: 公开了一种半导体器件的制造方法。 在制造超高频和低噪声器件时采用了用于降低栅极电阻的T形栅极。 根据本发明，通过双重曝光技术形成栅极图案，形成薄金属膜，形成用于电镀的图案，并且通过电镀形成栅极，从而减小栅极长度和栅极电阻。 因此，生产成本降低，产量提高，噪音指标最小化。

公开(公告)号：US5453398A

公开(公告)日：1995-09-26

申请号：US335453

申请日：1994-11-07

Applicant: Hae-Gwon Lee ,  Jae-Jin Lee ,  Bo-Woo Kim

Inventor： Hae-Gwon Lee ,  Jae-Jin Lee ,  Bo-Woo Kim

IPC: H01L33/06 ,  H01L33/20 ,  H01L33/30 ,  H01L33/36 ,  H01S5/00 ,  H01S5/20 ,  H01S5/34 ,  H01S5/343 ,  H01L21/20

CPC classification number: H01S5/341 ,  B82Y20/00 ,  H01S2304/02 ,  H01S5/2081 ,  H01S5/3432 ,  Y10S438/962

Abstract: Disclosed is a fabricating method of a quantum wire laser diode, comprising the steps of preparing a GaAs substrate; sequentially forming n-type epitaxial layers and a first photoresist layer on the GaAs substrate; removing a portion of the intrinsic GaAs layer by using a first etching solution, and then removing the photoresist layer; wet-etching away a portion of the intrinsic AlAs layer in the vicinity of the opening by using a second etching solution; growing a quantum structure in the molecular beam epitaxy apparatus to form a multiple quantum well on the intrinsic GaAs layer and form a quantum wire on the n-type energy band slope layer through the opening; removing the quantum well, the intrinsic GaAs layer and the intrinsic AlAs layer simultaneously by using a third etching solution; sequentially forming a p-type energy band slope layer, a p-type cladding layer and a p.sup.+ -GaAs layer, on the n-type energy band slope layer and the quantum wire, and forming a second photoresist layer having a predetermined pattern on the p.sup.+ -GaAs layer; removing the layers laminated on the n-type resistive contact layer using the second photoresist layer patterned thus as an etching mask and then removing the second photoresist layer; and forming an n-type ohmic contact metal on the n-type resistive contact layer and a p-type ohmic contact metal on the p.sup.+ -GaAs layer. By this method, because a quantum well formed near to a quantum wire therein is simultaneously removed during removal of other epitaxial layers, another etching process is not required for removing only the quantum well.

Abstract translation: 公开了一种量子线激光二极管的制造方法，包括以下步骤：制备GaAs衬底; 在GaAs衬底上依次形成n型外延层和第一光致抗蚀剂层; 通过使用第一蚀刻溶液去除本征GaAs层的一部分，然后除去光致抗蚀剂层; 通过使用第二蚀刻溶液湿蚀刻在开口附近的本征AlAs层的一部分; 在分子束外延装置中生长量子结构，在本征GaAs层上形成多量子阱，并通过开口在n型能带斜率层上形成量子线; 通过使用第三蚀刻溶液同时去除量子阱，本征GaAs层和本征AlAs层; 在n型能带斜率层和量子线上依次形成p型能带斜率层，p型包覆层和p + -GaAs层，并在其上形成具有预定图案的第二光致抗蚀剂层 p + -GaAs层; 使用图案化为蚀刻掩模的第二光致抗蚀剂层去除层压在n型电阻接触层上的层，然后除去第二光致抗蚀剂层; 在n型电阻接触层上形成n型欧姆接触金属，在p + -GaAs层上形成p型欧姆接触金属。 通过该方法，由于在去除其它外延层期间同时去除在其内的量子线附近形成的量子阱，因此不需要另外的蚀刻工艺来仅去除量子阱。

公开(公告)号：US09287477B2

公开(公告)日：2016-03-15

申请号：US14124974

申请日：2012-02-02

Applicant: Jae Jin Lee ,  Sung Ho Choi ,  Duk In Kang

Inventor： Jae Jin Lee ,  Sung Ho Choi ,  Duk In Kang

IPC: H01L27/32 ,  H01L51/50 ,  H01L33/62 ,  H01L33/64

CPC classification number: H01L33/62 ,  H01L27/32 ,  H01L33/642 ,  H01L33/647 ,  H01L51/50 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014

Abstract: An LED package includes a lead frame, a housing part, and a lead heat dissipating part. The lead frame includes a first lead mounting an LED chip and a second lead spaced apart from the first lead. The housing part covers a portion of the lead frame and includes an opening part for exposing the LED chip, a first side corresponding to a support side contacting the first lead and the second lead, and a second side opposite to the first side. The lead heat dissipating part is extended from the first lead and exposed partially to the first side of the housing part. Herein, the first side of the housing part is thicker than the second side.

Abstract translation: LED封装包括引线框架，壳体部分和引线散热部件。 引线框架包括安装LED芯片的第一引线和与第一引线间隔开的第二引线。 壳体部分覆盖引线框架的一部分并且包括用于暴露LED芯片的开口部分，对应于接触第一引线和第二引线的支撑侧的第一侧和与第一侧相对的第二侧。 引线散热部分从第一引线延伸并部分暴露于壳体部分的第一侧。 这里，壳体部分的第一侧比第二侧厚。

公开(公告)号：US09070806B2

公开(公告)日：2015-06-30

申请号：US14114884

申请日：2012-08-22

Applicant: Jae Jin Lee

Inventor： Jae Jin Lee

IPC: H02N6/00 ,  H01L31/042 ,  F24J2/38 ,  F24J2/40 ,  G01S3/786

CPC classification number: H01L31/042 ,  F24S30/45 ,  F24S50/00 ,  F24S50/20 ,  G01S3/7861 ,  H01L25/042 ,  H02S20/00 ,  H02S20/32 ,  Y02E10/47

Abstract: Provided is a self-powered solar tracker, which is a solar tracker for adjusting the altitude of and horizontally rotating a solar collector panel such that the solar collector panel on which a plurality of solar cells are provided can face the sun, wherein the self-powered solar tracker comprises: an altitude adjustment optical sensor unit which has one or more first optical sensors formed by being uniformly spaced on the upper side of convex support surfaces to face the sun and one or more second optical sensors formed by being uniformly spaced on the lower side of the convex support surfaces, and which senses the sunlight so as to adjust the altitude of the solar collector panel; a horizontal rotation optical sensor unit which has one or more third optical sensors formed by being uniformly spaced on the left side of the convex support surfaces to face the sun and one or more fourth optical sensors formed by being uniformly spaced on the right side of the convex support surfaces, and which senses sunlight so as to horizontally rotate the solar collector panel; a passive element circuit which has one or more first comparison circuits for comparing the difference in the quantity of output light between the first optical sensors and the second optical sensors and one or more second comparison circuits for comparing the difference in the quantity of output light between the third optical sensors and the fourth optical sensors, and which outputs a driving value for adjusting the altitude of and horizontally rotating the solar collector panel in the direction having a larger light value; an altitude adjustment driving unit for receiving a driving power source from the solar cells of the solar collector panel and for adjusting the altitude of the solar collector panel according to the driving value of the passive element circuit; and a horizontal rotation driving unit for performing the horizontal rotation.

Abstract translation: 提供了一种自供电的太阳能跟踪器，其是用于调节太阳能收集器板的高度并水平旋转的太阳能跟踪器，使得其上设置有多个太阳能电池的太阳能收集器面板可面向太阳，其中， 具有：高度调节光学传感器单元，其具有一个或多个第一光学传感器，所述第一光学传感器通过在凸起的支撑表面的上侧均匀地间隔开以面对太阳镜，以及一个或多个第二光学传感器，所述第二光学传感器通过在 凸起的支撑表面的下侧，并且感测太阳光以调节太阳能收集器板的高度; 水平旋转光学传感器单元，其具有一个或多个第三光学传感器，所述第三光学传感器通过在凸状支撑表面的左侧均匀地隔开以形成以面对太阳，以及一个或多个第四光学传感器，其通过在 凸起的支撑表面，并且其感测太阳光以水平地旋转太阳能收集器面板; 无源元件电路，其具有用于比较第一光学传感器和第二光学传感器之间的输出光量的差异的一个或多个第一比较电路和用于比较第一光学传感器和第二光学传感器之间的输出光量差异的一个或多个第二比较电路， 第三光传感器和第四光传感器，并且输出用于调节具有较大光值的方向的太阳能收集板的高度和水平旋转的驱动值; 高度调节驱动单元，用于从太阳能收集板的太阳能电池接收驱动电源，并根据无源元件电路的驱动值调节太阳能收集板的高度; 以及水平旋转驱动单元，用于执行水平旋转。

公开(公告)号：US08817866B2

公开(公告)日：2014-08-26

申请号：US13407478

申请日：2012-02-28

Applicant: Chun Seok Jeong ,  Jae Jin Lee ,  Chang Sik Yoo ,  Jang Woo Lee ,  Seok Joon Kang

Inventor： Chun Seok Jeong ,  Jae Jin Lee ,  Chang Sik Yoo ,  Jang Woo Lee ,  Seok Joon Kang

IPC: H03H7/30

CPC classification number: H04L25/03878 ,  H04L25/03012

Abstract: A data equalizing circuit includes an equalizer configured to output data according to a control code; and a detection unit configured to divide the data into N number of calculation periods, count data transition frequencies for the N calculation periods, calculate dispersion values of the data transition frequencies for the N calculation periods, and output the control code corresponding to a largest dispersion value, in response to a counting interruption signal and a counting completion signal, wherein n is equal to or greater than 2, N is greater than n, and the data is divided to n number of unit intervals (UI), andwherein a phase shift of each of the calculation periods with respect to its corresponding UI is different from a phase shift of any of the other calculation periods with respect to its corresponding UI.

Abstract translation: 数据均衡电路包括：均衡器，被配置为根据控制码输出数据; 以及检测单元，被配置为将数据划分为N个计算周期，用于N个计算周期的计数数据转换频率，计算N个计算周期的数据转换频率的色散值，并输出与最大色散对应的控制码 响应于计数中断信号和计数完成信号，其中n等于或大于2，N大于n，并且数据被划分为n个单位间隔（UI），并且其中相位 每个计算周期相对于其对应的UI的移位不同于任何其他计算周期相对于其对应的UI的相移。

公开(公告)号：US20130001548A1

公开(公告)日：2013-01-03

申请号：US13339018

申请日：2011-12-28

Applicant: Chun Seok JEONG ,  Jae Jin LEE

Inventor： Chun Seok JEONG ,  Jae Jin LEE

IPC: H01L25/07 ,  H01L23/48

CPC classification number: H01L22/34 ,  G01R31/2884 ,  H01L23/481 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16146 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06596

Abstract: A semiconductor apparatus includes a TSV formed to be electrically connected with another chip and a TSV test unit configured to check a capacitance component of the TSV to generate a TSV abnormality signal.

Abstract translation: 半导体装置包括被形成为与另一个芯片电连接的TSV以及被配置为检查TSV的电容分量以产生TSV异常信号的TSV测试单元。