公开(公告)号：US10276379B2

公开(公告)日：2019-04-30

申请号：US15925976

申请日：2018-03-20

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Abhijit Basu Mallick ,  Yihong Chen

IPC: H01L21/033 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/027 ,  C23C16/24 ,  C23C16/50 ,  C23C16/56 ,  H01L21/311 ,  H01L21/67

Abstract: In one implementation, a method of forming an amorphous silicon layer on a substrate in a processing chamber is provided. The method comprises depositing a predetermined thickness of a sacrificial dielectric layer over a substrate. The method further comprises forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate. The method further comprises performing a plasma treatment to the patterned features. The method further comprises depositing an amorphous silicon layer on the patterned features and the exposed upper surface of the substrate. The method further comprises selectively removing the amorphous silicon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers formed from the amorphous silicon layer.

公开(公告)号：US10192775B2

公开(公告)日：2019-01-29

申请号：US15461847

申请日：2017-03-17

Applicant: Applied Materials, Inc.

Inventor： Pramit Manna ,  Ludovic Godet ,  Rui Cheng ,  Erica Chen ,  Ziqing Duan ,  Abhijit Basu Mallick ,  Srinivas Gandikota

IPC: H01L21/762 ,  H01L21/02 ,  H01L29/06 ,  H01L21/768 ,  H01L23/31

Abstract: Methods for seam-less gapfill comprising sequentially depositing a film with a seam, reducing the height of the film to remove the seam and repeating until a seam-less film is formed. Some embodiments include optional film doping and film treatment (e.g., ion implantation and annealing).

公开(公告)号：US20180350668A1

公开(公告)日：2018-12-06

申请号：US16001258

申请日：2018-06-06

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Abhijit Basu Mallick ,  Pramit Manna

IPC: H01L21/768 ,  C23C16/04 ,  C23C16/40 ,  C23C16/34 ,  H01L21/02

Abstract: Methods for gapfill of high aspect ratio features are described. A first film is deposited on the bottom and upper sidewalls of a feature. The first film is etched from the sidewalls of the feature and the first film in the bottom of the feature is treated to form a second film. The deposition, etch and treat processes are repeated to fill the feature.

公开(公告)号：US09991118B2

公开(公告)日：2018-06-05

申请号：US15398591

申请日：2017-01-04

Applicant: Applied Materials, Inc.

Inventor： Thomas Jongwan Kwon ,  Rui Cheng ,  Abhijit Basu Mallick ,  Er-Xuan Ping ,  Jaesoo Ahn

IPC: H01L21/033 ,  H01L21/3213 ,  H01L21/02 ,  H01L21/308 ,  H01L21/311 ,  H01L27/11582 ,  H01L49/02

CPC classification number: H01L21/0338 ,  H01L21/02109 ,  H01L21/02115 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32139 ,  H01L27/11582 ,  H01L28/00

Abstract: Implementations of the present disclosure relate to improved hardmask materials and methods for patterning and etching of substrates. A plurality of hardmasks may be utilized in combination with patterning and etching processes to enable advanced device architectures. In one implementation, a first hardmask and a second hardmask disposed on a substrate having various material layers disposed thereon. The second hardmask may be utilized to pattern the first hardmask during a first etching process. A third hardmask may be deposited over the first and second hardmasks and a second etching process may be utilized to form channels in the material layers.

公开(公告)号：US09865459B2

公开(公告)日：2018-01-09

申请号：US15094512

申请日：2016-04-08

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Pramit Manna ,  Abhijit Basu Mallick

IPC: H01L21/02 ,  H01L21/033 ,  H01L21/32 ,  H01L21/3105

CPC classification number: H01L21/0234 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/0332 ,  H01L21/3105 ,  H01L21/32

Abstract: The present disclosure relates to methods for improving adhesion between a hardmask layer and a subsequent layer on the hardmask layer. Particularly, embodiment of the present disclosure relates to methods for improving adhesion between a metal-doped amorphous carbon layer and a mask layer, such as a silicon oxide layer, a silicon nitride layer, or an amorphous silicon layer. One embodiment of the present disclosure includes performing a plasma treatment to the metal-doped amorphous carbon layer.

公开(公告)号：US20170084459A1

公开(公告)日：2017-03-23

申请号：US15268797

申请日：2016-09-19

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Wei Tang ,  Pramit Manna ,  Abhijit Basu Mallick ,  Srinivas Gandikota

IPC: H01L21/033 ,  H01L21/02

CPC classification number: H01L21/0332 ,  H01L21/02153 ,  H01L21/02186 ,  H01L21/02227 ,  H01L21/02271 ,  H01L21/02274

Abstract: Methods for forming a titanium-containing hard mask film on a substrate surface by exposing the substrate surface to a titanium-containing precursor. The titanium-containing hard mask comprises one or more of silicon, oxygen or carbon atoms and, optionally, nitrogen atoms.

公开(公告)号：US20250125145A1

公开(公告)日：2025-04-17

申请号：US18485172

申请日：2023-10-11

Applicant: Applied Materials, Inc.

Inventor： Tianyang Li ,  Hang Yu ,  Rui Cheng ,  Deenesh Padhi ,  Woongsik Nam

IPC: H01L21/02 ,  H01J37/32

Abstract: Exemplary methods of forming a silicon-containing material may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region of the semiconductor processing chamber and include one or more features. The methods may include generating plasma effluents of the silicon-containing precursor in the processing region. The methods may include depositing a silicon-containing material on a vertically extending portion and a horizontally extending portion of the feature. Methods include soaking the deposited silicon-containing material with a second silicon-containing material.

公开(公告)号：US12255054B2

公开(公告)日：2025-03-18

申请号：US17127201

申请日：2020-12-18

Applicant: Applied Materials, Inc.

Inventor： Venkata Sharat Chandra Parimi ,  Zubin Huang ,  Manjunath Veerappa Chobari Patil ,  Nitin Pathak ,  Yi Yang ,  Badri N. Ramamurthi ,  Truong Van Nguyen ,  Rui Cheng ,  Diwakar Kedlaya

IPC: H01J37/32 ,  C23C16/44 ,  C23C16/458 ,  C23C16/50

Abstract: Exemplary semiconductor processing chambers include a chamber body defining a processing region. The chambers may include a substrate support disposed within the processing region. The substrate support may have an upper surface that defines a recessed substrate seat. The chambers may include a shadow ring disposed above the substrate seat and the upper surface. The shadow ring may extend about a peripheral edge of the substrate seat. The chambers may include bevel purge openings defined within the substrate support proximate the peripheral edge. A bottom surface of the shadow ring may be spaced apart from a top surface of the upper surface to form a purge gas flow path that extends from the bevel purge openings along the shadow ring. A space formed between the shadow ring and the substrate seat may define a process gas flow path. The gas flow paths may be in fluid communication with one another.

公开(公告)号：US20250037996A1

公开(公告)日：2025-01-30

申请号：US18913024

申请日：2024-10-11

Applicant: Applied Materials, Inc.

Inventor： Qinghua Zhao ,  Rui Cheng ,  Ruiyun Huang ,  Dong Hyung Lee ,  Aykut Aydin ,  Karthik Janakiraman

IPC: H01L21/02 ,  H01L21/3205

Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-containing material on the substrate. The silicon-containing material may extend within the one or more recessed features along the substrate and a seam or void may be defined by the silicon-containing material within at least one of the one or more recessed features along the substrate. The methods may also include treating the silicon-containing material with a hydrogen-containing gas, such as plasma effluents of the hydrogen-containing gas, which may cause a size of the seam or void to be reduced.

公开(公告)号：US12205818B2

公开(公告)日：2025-01-21

申请号：US18606060

申请日：2024-03-15

Applicant: Applied Materials, Inc.

Inventor： Yi Yang ,  Krishna Nittala ,  Rui Cheng ,  Karthik Janakiraman ,  Diwakar Kedlaya ,  Zubin Huang ,  Aykut Aydin

IPC: H01L21/033 ,  C23C16/38

Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.