公开(公告)号：US12191360B2

公开(公告)日：2025-01-07

申请号：US17562938

申请日：2021-12-27

Applicant: Applied Materials, Inc.

Inventor： Yi Zheng ,  Er-Xuan Ping

IPC: H01L29/40 ,  H01L21/04 ,  H01L29/16 ,  H01L29/423

Abstract: A method of forming a gate structure on a substrate with increased charge mobility. In some embodiments, the method may include depositing an amorphous carbon layer on a silicon carbide layer on the substrate to form a capping layer on the silicon carbide layer, annealing the silicon carbide layer at a temperature of greater than approximately 1800 degrees Celsius, forming a hard mask on the silicon carbide layer by patterning the amorphous carbon layer, etching a trench structure of the gate structure into the silicon carbide layer using the hard mask, removing the hard mask to expose the silicon carbide layer, depositing a silicon dioxide layer on the silicon carbide layer using an ALD process, performing at least one interface treatment on the silicon dioxide layer, depositing a gate oxide layer of the gate structure on the silicon dioxide layer, and depositing a gate material on the gate oxide layer.

公开(公告)号：US10714388B2

公开(公告)日：2020-07-14

申请号：US16222630

申请日：2018-12-17

Applicant: APPLIED MATERIALS, INC.

Inventor： Jin Hee Park ,  Tae Hong Ha ,  Sang-Hyeob Lee ,  Thomas Jongwan Kwon ,  Jaesoo Ahn ,  Xianmin Tang ,  Er-Xuan Ping ,  Sree Kesapragada

IPC: H01L21/768 ,  H01L21/285 ,  C23C16/48 ,  C23C16/455 ,  C23C16/04 ,  C23C16/16 ,  C23C16/18 ,  C23C16/56 ,  H01L21/67 ,  H01L23/532 ,  H01L27/11556 ,  H01L27/11582

Abstract: Methods and apparatus for depositing a cobalt layer in a feature, such as, a word line formed in a substrate, are provided herein. In some embodiments, method of processing a substrate includes: exposing a substrate at a first temperature to a cobalt containing precursor to deposit a cobalt layer within a word line feature formed in the substrate, wherein the word line feature is part of a 3D NAND device; and annealing the substrate to remove contaminants from the cobalt layer and to reflow the cobalt layer into the word line feature, wherein the substrate is at a second temperature greater than the first temperature during the annealing.

公开(公告)号：US10410864B2

公开(公告)日：2019-09-10

申请号：US15988830

申请日：2018-05-24

Applicant: Applied Materials, Inc.

Inventor： Thomas Jongwan Kwon ,  Rui Cheng ,  Abhijit Basu Mallick ,  Er-Xuan Ping ,  Jaesoo Ahn

IPC: H01L21/033 ,  H01L21/3213 ,  H01L21/02 ,  H01L21/308 ,  H01L21/311 ,  H01L27/11582 ,  H01L49/02

Abstract: Implementations of the present disclosure relate to improved hardmask materials and methods for patterning and etching of substrates. A plurality of hardmasks may be utilized in combination with patterning and etching processes to enable advanced device architectures. In one implementation, a first hardmask and a second hardmask disposed on a substrate having various material layers disposed thereon. The second hardmask may be utilized to pattern the first hardmask during a first etching process. A third hardmask may be deposited over the first and second hardmasks and a second etching process may be utilized to form channels in the material layers.

公开(公告)号：US20140273504A1

公开(公告)日：2014-09-18

申请号：US13838960

申请日：2013-03-15

Applicant: APPLIED MATERIALS, INC.

Inventor： Aneesh Nainani ,  Joseph Johnson ,  Er-Xuan Ping ,  Adam Brand ,  Mathew Abraham

IPC: H01L21/02 ,  H01L21/285

CPC classification number: H01L21/02277 ,  C23C16/047 ,  C23C16/405 ,  C23C16/45525 ,  C23C16/482 ,  C23C16/505 ,  H01L21/02181 ,  H01L21/02274 ,  H01L21/28194 ,  H01L21/28562 ,  H01L21/76849 ,  H01L21/76879 ,  H01L29/517 ,  H01L29/66545

Abstract: A substrate processing chamber comprising a chamber wall enclosing a process zone having an exhaust port, a substrate support to support a substrate in the process zone, a gas distributor for providing a deposition gas to the process zone, a solid state light source capable of irradiating substantially the entire surface of the substrate with light, and a gas energizer for energizing the deposition gas.

Abstract translation: 一种衬底处理室，包括一个封闭一个具有排气口的工艺区域的腔室壁，一个用于在工艺区域中支撑衬底的衬底支撑件，一个用于向工艺区域提供沉积气体的气体分配器，能够照射 基本上具有光的基板的整个表面，以及用于激发沉积气体的气体激发器。

公开(公告)号：US09991118B2

公开(公告)日：2018-06-05

申请号：US15398591

申请日：2017-01-04

Applicant: Applied Materials, Inc.

Inventor： Thomas Jongwan Kwon ,  Rui Cheng ,  Abhijit Basu Mallick ,  Er-Xuan Ping ,  Jaesoo Ahn

IPC: H01L21/033 ,  H01L21/3213 ,  H01L21/02 ,  H01L21/308 ,  H01L21/311 ,  H01L27/11582 ,  H01L49/02

CPC classification number: H01L21/0338 ,  H01L21/02109 ,  H01L21/02115 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32139 ,  H01L27/11582 ,  H01L28/00

Abstract: Implementations of the present disclosure relate to improved hardmask materials and methods for patterning and etching of substrates. A plurality of hardmasks may be utilized in combination with patterning and etching processes to enable advanced device architectures. In one implementation, a first hardmask and a second hardmask disposed on a substrate having various material layers disposed thereon. The second hardmask may be utilized to pattern the first hardmask during a first etching process. A third hardmask may be deposited over the first and second hardmasks and a second etching process may be utilized to form channels in the material layers.

公开(公告)号：US09879341B2

公开(公告)日：2018-01-30

申请号：US15188103

申请日：2016-06-21

Applicant: Applied Materials, Inc.

Inventor： Kaushal K. Singh ,  Deepak Jadhav ,  Ashutosh Agarwal ,  Ashish Goel ,  Vijay Parihar ,  Er-Xuan Ping ,  Randhir P. S. Thakur

IPC: H01L21/67 ,  H01L21/02 ,  C23C16/54 ,  C23C14/56 ,  C23C16/455

CPC classification number: C23C16/45525 ,  C23C14/56 ,  C23C16/54 ,  H01L21/0217 ,  H01L21/02181 ,  H01L21/02381 ,  H01L21/02568 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/67167 ,  H01L21/6719 ,  H01L21/6723

Abstract: Embodiments described herein provide a remote plasma system utilizing a microwave source. Additionally, generation and deposition techniques for 2D transition metal chalcogenides with large area uniformity utilizing microwave assisted generation of radicals is disclosed. Plasma may be generated remotely utilizing the microwave source. A processing platform configured to deposit 2D transition metal chalcogenides is also disclosed.

公开(公告)号：US09218973B2

公开(公告)日：2015-12-22

申请号：US13917039

申请日：2013-06-13

Applicant: Applied Materials, Inc.

Inventor： Aneesh Nainani ,  Mathew Abraham ,  Er-Xuan Ping

IPC: H01L21/22 ,  H01L21/225 ,  H01L29/66

CPC classification number: H01L21/225 ,  H01L21/02271 ,  H01L21/02362 ,  H01L21/02499 ,  H01L21/0262 ,  H01L21/2254 ,  H01L29/66803

Abstract: Provided are methods of doping substrates and making doped semiconductor features. An exemplary method includes providing a substrate having at least one feature having an aspect ratio; depositing a layer of dopants onto the substrate, the layer of dopants having a shape conforming to the at least one feature. A dielectric layer is deposited onto the layer of dopants, the dielectric layer having a shape conforming to the layer of dopants. The dielectric layer is annealed to diffuse the dopants into the substrate.

Abstract translation: 提供掺杂衬底和制造掺杂半导体特征的方法。 一种示例性方法包括提供具有至少一个具有纵横比的特征的基底; 在衬底上沉积掺杂剂层，掺杂剂层具有符合至少一个特征的形状。 介电层沉积在掺杂剂层上，电介质层具有符合掺杂剂层的形状。 将介电层退火以将掺杂剂扩散到衬底中。

公开(公告)号：US10943779B2

公开(公告)日：2021-03-09

申请号：US15356475

申请日：2016-11-18

Applicant: APPLIED MATERIALS, INC.

Inventor： Ellie Yieh ,  Ludovic Godet ,  Srinivas Nemani ,  Er-Xuan Ping ,  Gary Dickerson

IPC: H01L21/00 ,  H01L21/02 ,  H01L21/67 ,  C23C14/02 ,  C23C14/04 ,  C23C16/02 ,  C23C16/04 ,  C23C16/455 ,  C23C16/50 ,  H01J37/32 ,  H01L21/285 ,  H01L21/311 ,  H01L21/3213

Abstract: Embodiments include methods and systems of 3D structure fill. In one embodiment, a method of filling a trench in a wafer includes performing directional plasma treatment with an ion beam at an angle with respect to a sidewall of the trench to form a treated portion of the sidewall and an untreated bottom of the trench. A material is deposited in the trench. The deposition rate of the material on the treated portion of the sidewall is different than a second deposition rate on the untreated bottom of the trench. In one embodiment, a method includes depositing a material on the wafer, filling a bottom of the trench and forming a layer on a sidewall of the trench and a top surface adjacent to the trench. The method includes etching the layer with an ion beam at an angle with respect to the sidewall.

公开(公告)号：US10700087B2

公开(公告)日：2020-06-30

申请号：US16151467

申请日：2018-10-04

Applicant: Applied Materials, Inc.

Inventor： Xinhai Han ,  Deenesh Padhi ,  Er-Xuan Ping ,  Srinivas Guggilla

IPC: H01L21/76 ,  H01L27/11582 ,  H01L21/311 ,  H01L21/02 ,  H01L27/1157

Abstract: Embodiments described herein relate to methods and materials for fabricating semiconductor devices, such as memory devices and the like. In one embodiment, a memory layer stack includes materials having differing etch rates in which one material is selectively removed to form an airgap in the device structure. In another embodiment, silicon containing materials of a memory layer stack are doped or fabricated as a silicide material. In another embodiment, a silicon nitride material is utilized as an interfacial layer between oxide containing and silicon containing layers of a memory layer stack.

公开(公告)号：US10157787B2

公开(公告)日：2018-12-18

申请号：US15384219

申请日：2016-12-19

Applicant: APPLIED MATERIALS, INC.

Inventor： Jin Hee Park ,  Tae Hong Ha ,  Sang-Hyeob Lee ,  Thomas Jongwan Kwon ,  Jaesoo Ahn ,  Xianmin Tang ,  Er-Xuan Ping ,  Sree Kesapragada

IPC: H01L21/768 ,  H01L21/285 ,  C23C16/48 ,  C23C16/455 ,  C23C16/04 ,  C23C16/16 ,  C23C16/18 ,  C23C16/56 ,  H01L21/67 ,  H01L23/532 ,  H01L27/11556 ,  H01L27/11582

Abstract: Methods and apparatus for depositing a cobalt layer in a feature, such as, a word line formed in a substrate, are provided herein. In some embodiments, method of processing a substrate includes: exposing a substrate at a first temperature to a cobalt containing precursor to deposit a cobalt layer within a word line feature formed in the substrate, wherein the word line feature is part of a 3D NAND device; and annealing the substrate to remove contaminants from the cobalt layer and to reflow the cobalt layer into the word line feature, wherein the substrate is at a second temperature greater than the first temperature during the annealing.