公开(公告)号：US20210083061A1

公开(公告)日：2021-03-18

申请号：US16991935

申请日：2020-08-12

Applicant: MaxPower Semiconductor Inc.

Inventor： Mohamed N. Darwish ,  Jun Zeng ,  Richard A. Blanchard

IPC: H01L29/40 ,  H01L29/423 ,  H01L29/78 ,  H01L29/66 ,  H01L29/739

Abstract: A vertical transistor structure in which a recessed field plate trench surrounds multiple adjacent gate electrodes. Thus the specific on-state conductance is increased, since the ratio of recessed field plate area to channel area is reduced. Various versions use two, three, or more distinct gate electrodes within the interior of a single RFP or RSFP trench's layout.

公开(公告)号：US20200098856A1

公开(公告)日：2020-03-26

申请号：US16439071

申请日：2019-06-12

Applicant: MaxPower Semiconductor Inc.

Inventor： Mohamed N. Darwish ,  Jun Zeng ,  Richard A. Blanchard

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/78 ,  H01L29/861 ,  H01L29/423 ,  H01L29/66

Abstract: Power devices using refilled trenches with permanent charge at or near their sidewalls. These trenches extend vertically into a drift region.

公开(公告)号：US20190122926A1

公开(公告)日：2019-04-25

申请号：US16115312

申请日：2018-08-28

Applicant: MaxPower Semiconductor Inc.

Inventor： Mohamed N. Darwish ,  Jun Zeng ,  Richard A. Blanchard

IPC: H01L21/768 ,  H01L29/78 ,  H01L29/417 ,  H01L29/40 ,  H01L29/49 ,  H01L29/423 ,  H01L29/10 ,  H01L21/28 ,  H01L21/765 ,  H01L21/265 ,  H01L21/324 ,  H01L29/66

Abstract: Structures and fabrication methods for increasing the density of trench transistor devices and the like. During fabrication of a trench transistor device, a vertical protrusion (or “hat”) of oxide is left in place above the gate trench. This vertical protrusion is self-aligned to the gate trench, and is used to define the positions of sidewall spacers (made e.g. of silicon nitride). These sidewall spacers define a space outward from the edge of the gate trench; by performing a recess etch which is delimited by these sidewall spacers, the resistance of the source contact and the body contact is minimized. The spacing between the gate trench and the recessed-contact field-plate trench can therefore be minimized and well controlled, which improves density without degrading on-resistance nor breakdown voltage.

公开(公告)号：US20190067491A1

公开(公告)日：2019-02-28

申请号：US16016510

申请日：2018-06-22

Applicant: MaxPower Semiconductor Inc.

Inventor： Richard A. Blanchard ,  Mohamed N. Darwish ,  Jun Zeng

IPC: H01L29/861 ,  H01L29/06 ,  H01L29/04 ,  H01L29/16 ,  H01L29/417 ,  H01L29/66 ,  H01L21/265 ,  H01L29/40

Abstract: A new semiconductor rectifier structure. In general, a MOS-transistor-like structure is located above a JFET-like deeper structure. The present application teaches ways to combine and optimize these two structures in a merged device so that the resulting combined structure achieves both a low forward voltage and a high reverse breakdown voltage in a relatively small area. In one class of innovative implementations, an insulated (or partially insulated) trench is used to define a vertical channel in a body region along the sidewall of a trench, so that majority carriers from a “source” region (typically n+) can flow through the channel. An added “pocket” diffusion, of the same conductivity type as the body region (p-type in this example), provides an intermediate region around the bottom of the trench. This intermediate diffusion, and an additional deep region of the same conductivity type, define a deep JFET-like device which is in series with the MOS channel portion of the diode. This advantageously permits the MOS channel portion to be reasonably short, and to have a reasonably low threshold voltage, since the high-voltage withstand characteristics are defined by the deep JFET-like device.

公开(公告)号：US20180323285A1

公开(公告)日：2018-11-08

申请号：US15975284

申请日：2018-05-09

Applicant: MaxPower Semiconductor Inc.

Inventor： Mohamed N. Darwish ,  Jun Zeng ,  Richard A. Blanchard

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/265 ,  H01L29/739 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/417 ,  H01L29/40 ,  H01L29/36 ,  H01L29/16 ,  H01L29/10 ,  H01L29/08 ,  H01L27/088 ,  H01L29/06

CPC classification number: H01L29/66734 ,  H01L21/26506 ,  H01L21/823412 ,  H01L21/823437 ,  H01L21/823475 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1033 ,  H01L29/1095 ,  H01L29/16 ,  H01L29/36 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/7395 ,  H01L29/7803 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/7831 ,  H01L29/7835

Abstract: Methods and systems for power semiconductor devices integrating multiple quasi-vertical transistors on a single chip. Multiple power transistors (or active regions) are paralleled, but one transistor has a lower threshold voltage. This reduces the voltage drop when the transistor is forward-biased. In an alternative embodiment, the power device with lower threshold voltage is simply connected as a depletion diode, to thereby shunt the body diodes of the active transistors, without affecting turn-on and ON-state behavior.

公开(公告)号：US09947779B2

公开(公告)日：2018-04-17

申请号：US15663465

申请日：2017-07-28

Applicant: MaxPower Semiconductor Inc.

Inventor： Jun Zeng ,  Mohamed N. Darwish ,  Kui Pu ,  Shih-Tzung Su

IPC: H01L29/739 ,  H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/78 ,  H01L29/10 ,  H01L29/423

CPC classification number: H01L29/7397 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/404 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7811 ,  H01L29/7813

Abstract: In one embodiment, a power MOSFET cell includes an N+ silicon substrate having a drain electrode. An N-type drift layer is grown over the substrate. An N-type layer, having a higher dopant concentration than the drift region, is then formed along with a trench having sidewalls. A P-well is formed in the N-type layer, and an N+ source region is formed in the P-well. A gate is formed over the P-well's lateral channel and has a vertical extension into the trench. A positive gate voltage inverts the lateral channel and increases the vertical conduction along the sidewalls to reduce on-resistance. A vertical shield field plate is also located next to the sidewalls and may be connected to the gate. The field plate laterally depletes the N-type layer when the device is off to increase the breakdown voltage. A buried layer and sinker enable the use of a topside drain electrode.

公开(公告)号：US20160343849A1

公开(公告)日：2016-11-24

申请号：US15230307

申请日：2016-08-05

Applicant: MaxPower Semiconductor Inc.

Inventor： Mohamed N. Darwish ,  Jun Zeng

IPC: H01L29/78 ,  H01L29/08 ,  H03K17/687 ,  H01L29/06 ,  H01L29/423 ,  H01L29/10 ,  H01L29/40

CPC classification number: H01L29/7811 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/0856 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/16 ,  H01L29/404 ,  H01L29/407 ,  H01L29/408 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/7813 ,  H01L29/7823 ,  H01L29/7827 ,  H01L29/7835 ,  H03K17/687

Abstract: N-channel power semiconductor devices in which an insulated field plate is coupled to the drift region, and immobile electrostatic charge is also present at the interface between the drift region and the insulation around the field plate. The electrostatic charge permits OFF-state voltage drop to occur near the source region, in addition to the voltage drop which occurs near the drain region (due to the presence of the field plate).

Abstract translation: 其中绝缘场板耦合到漂移区的N沟道功率半导体器件，并且固定静电电荷也存在于漂移区和场板周围的绝缘体之间的界面处。 除了在漏极区附近发生的电压降（由于场板的存在）外，静电电荷还允许在源极区域附近发生OFF状态电压降。

公开(公告)号：US20160211258A1

公开(公告)日：2016-07-21

申请号：US14988646

申请日：2016-01-05

Applicant: MaxPower Semiconductor Inc.

Inventor： Jun Zeng ,  Mohamed N. Darwish

IPC: H01L27/06 ,  H01L29/16 ,  H01L29/66 ,  H01L29/06 ,  H01L29/739 ,  H01L29/872

CPC classification number: H01L29/16 ,  H01L21/0465 ,  H01L27/0727 ,  H01L29/0661 ,  H01L29/0834 ,  H01L29/36 ,  H01L29/66348 ,  H01L29/7397

Abstract: Reverse-conducting IGBTs where the collector side includes diode terminal regions, and the semiconductor material is much thicker through the diode terminal regions than it is through the collector regions. This exploits the area fraction which is taken up by the diode terminal regions to provide increased rigidity for the wafer, and thus avoid warping.

Abstract translation: 反向导通IGBT，其中集电极侧包括二极管端子区域，并且半导体材料通过二极管端子区域比通过集电极区域厚得多。 这就利用二极管端子区所占据的面积分数来提供晶片增加的刚度，从而避免翘曲。

公开(公告)号：US09263573B2

公开(公告)日：2016-02-16

申请号：US14523492

申请日：2014-10-24

Applicant: MaxPower Semiconductor, Inc.

Inventor： Mohamed N. Darwish ,  Jun Zeng ,  Richard A. Blanchard

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L29/739 ,  H01L21/265 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423

CPC classification number: H01L29/7393 ,  H01L21/26586 ,  H01L29/0634 ,  H01L29/0873 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/167 ,  H01L29/402 ,  H01L29/407 ,  H01L29/408 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7813 ,  H01L29/7816

Abstract: Power semiconductor devices, and related methods, where majority carrier flow is divided into paralleled flows through two drift regions of opposite conductivity types.

公开(公告)号：US20150340360A1

公开(公告)日：2015-11-26

申请号：US14694929

申请日：2015-04-23

Applicant: MaxPower Semiconductor Inc.

Inventor： Mohamed N. Darwish ,  Jun Zeng ,  Richard A. Blanchard

IPC: H01L27/088 ,  H01L29/423 ,  H01L29/08 ,  H01L29/16 ,  H01L29/10 ,  H01L29/78 ,  H01L29/417

CPC classification number: H01L29/66734 ,  H01L21/26506 ,  H01L21/823412 ,  H01L21/823437 ,  H01L21/823475 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1033 ,  H01L29/1095 ,  H01L29/16 ,  H01L29/36 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/7395 ,  H01L29/7803 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/7831 ,  H01L29/7835

Abstract: Methods and systems for power semiconductor devices integrating multiple quasi-vertical transistors on a single chip. Multiple power transistors (or active regions) are paralleled, but one transistor has a lower threshold voltage. This reduces the voltage drop when the transistor is forward-biased. In an alternative embodiment, the power device with lower threshold voltage is simply connected as a depletion diode, to thereby shunt the body diodes of the active transistors, without affecting turn-on and ON-state behavior.

Abstract translation: 用于在单个芯片上集成多个准垂直晶体管的功率半导体器件的方法和系统。 多个功率晶体管（或有源区）并联，但一个晶体管具有较低的阈值电压。 当晶体管正向偏置时，这降低了电压降。 在替代实施例中，具有较低阈值电压的功率器件简单地连接为耗尽二极管，从而分流有源晶体管的体二极管，而不会影响导通和导通状态。