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公开(公告)号:US12087938B2
公开(公告)日:2024-09-10
申请号:US15374048
申请日:2016-12-09
Applicant: Semiconductor Energy Laboratory Co., LTD.
Inventor: Hiroyuki Miyake , Nobuhiro Inoue , Ryo Yamauchi , Mako Motoyoshi , Takahiro Kawakami , Mayumi Mikami , Miku Fujita , Shunpei Yamazaki
IPC: H01M4/36 , H01G11/06 , H01G11/28 , H01G11/30 , H01G11/36 , H01G11/50 , H01M4/134 , H01M4/38 , H01M4/62 , H01M10/0525
CPC classification number: H01M4/366 , H01G11/06 , H01G11/28 , H01G11/30 , H01G11/36 , H01G11/50 , H01M4/134 , H01M4/386 , H01M4/626 , H01M10/0525
Abstract: A power storage device having high capacitance is provided. A power storage device with excellent cycle characteristics is provided. A power storage device with high charge and discharge efficiency is provided. A power storage device including a negative electrode with low resistance is provided. A negative electrode for a power storage device includes a number of composites in particulate forms. The composites include a negative electrode active material, a first functional material, and a compound. The compound includes a constituent element of the negative electrode active material and a constituent element of the first functional material. The negative electrode active material includes a region in contact with at least one of the first functional material or the compound.
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公开(公告)号:US12080720B2
公开(公告)日:2024-09-03
申请号:US18207175
申请日:2023-06-08
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Jun Koyama , Hiroyuki Miyake
IPC: H01L27/12 , G09G3/20 , G11C19/28 , H01L29/04 , H01L29/10 , H01L29/24 , H01L29/417 , H01L29/423 , H01L29/45 , H01L29/786 , H01L29/49 , H10K59/121
CPC classification number: H01L27/1229 , G09G3/20 , G11C19/28 , H01L27/1225 , H01L27/1251 , H01L29/045 , H01L29/1033 , H01L29/24 , H01L29/247 , H01L29/41733 , H01L29/42372 , H01L29/45 , H01L29/78648 , H01L29/7869 , H01L29/78693 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , H01L27/12 , H01L27/1214 , H01L29/4908 , H01L29/78609 , H10K59/1213
Abstract: An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.
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公开(公告)号:US12048230B2
公开(公告)日:2024-07-23
申请号:US18136665
申请日:2023-04-19
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Hiroyuki Miyake , Hisao Ikeda
IPC: H10K59/86 , G06F1/16 , H01K1/00 , H01L23/00 , H10K50/18 , H10K50/814 , H10K50/824 , H10K59/18 , H10K77/10 , H10K59/131 , H10K102/00
CPC classification number: H10K59/86 , G06F1/1652 , H01K1/00 , H01L24/50 , H10K50/814 , H10K50/824 , H10K59/18 , H10K77/111 , H10K59/131 , H10K2102/311 , Y02E10/549
Abstract: To provide a display device that is suitable for increasing in size, a display device in which display unevenness is suppressed, or a display device that can display an image along a curved surface. The display device includes a first display panel and a second display panel each including a pair of substrates. The first display panel and the second display panel each include a first region which can transmit visible light, a second region which can block visible light, and a third region which can perform display. The third region of the first display panel and the first region of the second display panel overlap each other. The third region of the first display panel and the second region of the second display panel do not overlap each other.
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公开(公告)号:US11942170B2
公开(公告)日:2024-03-26
申请号:US17749309
申请日:2022-05-20
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Seiko Amano , Kouhei Toyotaka , Hiroyuki Miyake , Aya Miyazaki , Hideaki Shishido , Koji Kusunoki
CPC classification number: G11C19/28 , G09G3/3677 , G09G3/3696 , G11C19/184 , H01L25/03 , H01L27/1222 , H01L27/1225 , H01L27/124 , H01L27/1251 , H01L27/127 , H01L27/1288 , H03K19/0013 , H05K7/02 , G09G2300/0809 , G09G2310/0286 , H01L2924/0002 , H01L2924/0002 , H01L2924/00
Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.
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公开(公告)号:US11869453B2
公开(公告)日:2024-01-09
申请号:US17702073
申请日:2022-03-23
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake , Kouhei Toyotaka , Shunpei Yamazaki
IPC: G09G3/36 , G02F1/1333 , G02F1/1345 , G02F1/1368 , G02F1/1343 , G11C19/28 , H01L27/12
CPC classification number: G09G3/3677 , G02F1/1333 , G02F1/1368 , G02F1/13439 , G02F1/13454 , G11C19/28 , H01L27/124 , H01L27/1222 , G02F1/13685 , G09G2300/0809 , G09G2310/0286 , G09G2310/0291
Abstract: To provide a semiconductor device including a narrowed bezel obtained by designing a gate driver circuit. A gate driver of a display device includes a shift register unit, a demultiplexer circuit, and n signal lines. By connecting the n signal lines for transmitting clock signals to one stage of the shift register unit, (n−3) output signals can be output. The larger n becomes, the smaller the rate of signal lines for transmitting clock signals which do not contribute to output becomes; accordingly, the area of the shift register unit part is small compared to a conventional structure in which one stage of a shift register unit outputs one output signal. Therefore, the gate driver circuit can have a narrow bezel.
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公开(公告)号:US11796866B2
公开(公告)日:2023-10-24
申请号:US17949396
申请日:2022-09-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake , Makoto Kaneyasu
IPC: H01L29/786 , H01L27/12 , G02F1/1343 , G09F9/30 , G09G3/36 , G02F1/1362 , G02F1/136 , G02F1/13357
CPC classification number: G02F1/1343 , G02F1/136286 , G09F9/30 , G09G3/3648 , H01L27/1225 , H01L29/7869 , H01L29/78648 , H01L29/78696 , G02F1/13606 , G02F1/133602 , G09G2300/0439
Abstract: A display device in which parasitic capacitance between wirings can be reduced is provided. Furthermore, a display device in which display quality is improved is provided. Furthermore, a display device in which power consumption can be reduced is provided.
The display device includes a signal line, a scan line, a first electrode, a second electrode, a third electrode, a first pixel electrode, a second pixel electrode, and a semiconductor film. The signal line intersects with the scan line, the first electrode is electrically connected to the signal line, the first electrode has a region overlapping with the scan line, the second electrode faces the first electrode, the third electrode faces the first electrode, the first pixel electrode is electrically connected to the second electrode, the second pixel electrode is electrically connected to the third electrode, the semiconductor film is in contact with the first electrode, the second electrode, and the third electrode, and the semiconductor film is provided between the scan line and the first electrode to the third electrode.-
公开(公告)号:US11741895B2
公开(公告)日:2023-08-29
申请号:US17388366
申请日:2021-07-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Seiko Inoue , Hiroyuki Miyake
IPC: G09G3/3233 , H01L27/12 , G09G3/3291
CPC classification number: G09G3/3233 , H01L27/1225 , G09G3/3291 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/0262 , G09G2320/0233 , G09G2320/045
Abstract: A light-emitting device in which variation in luminance of pixels is suppressed. A light-emitting device includes at least a transistor, a first wiring, a second wiring, a first switch, a second switch, a third switch, a fourth switch, a capacitor, and a light-emitting element. The first wiring and a first electrode of the capacitor are electrically connected to each other through the first switch. A second electrode of the capacitor is connected to a first terminal of the transistor. The second wiring and a gate of the transistor are electrically connected to each other through the second switch. The first electrode of the capacitor and the gate of the transistor are electrically connected to each other through the third switch. The first terminal of the transistor and an anode of the light-emitting element are electrically connected to each other through the fourth switch.
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公开(公告)号:US11710745B2
公开(公告)日:2023-07-25
申请号:US17666938
申请日:2022-02-08
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Jun Koyama , Hiroyuki Miyake
IPC: H01L27/12 , H01L27/088 , H01L29/04 , H01L29/24 , H01L29/786 , H01L29/49 , H01L21/02
CPC classification number: H01L27/1225 , H01L27/0883 , H01L27/127 , H01L27/1251 , H01L27/1288 , H01L29/045 , H01L29/24 , H01L29/7869 , H01L29/78669 , H01L29/78678 , H01L29/78693 , H01L29/78696 , H01L21/02603 , H01L29/04 , H01L29/4908 , H01L2924/13069
Abstract: An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.
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公开(公告)号:US11664391B2
公开(公告)日:2023-05-30
申请号:US16657243
申请日:2019-10-18
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake
IPC: H01L27/12 , H01L29/786 , G09G3/3233 , H01L27/32
CPC classification number: H01L27/1255 , G09G3/3233 , H01L27/1225 , H01L29/7869 , H01L27/3248 , H01L29/78648
Abstract: To provide a light-emitting device in which variation in luminance among pixels caused by variation in threshold voltage of transistors can be suppressed. The light-emitting device includes a transistor including a first gate and a second gate overlapping with each other with a semiconductor film therebetween, a first capacitor maintaining a potential difference between one of a source and a drain of the transistor and the first gate, a second capacitor maintaining a potential difference between one of the source and the drain of the transistor and the second gate, a switch controlling conduction between the second gate of the transistor and a wiring, and a light-emitting element to which drain current of the transistor is supplied.
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公开(公告)号:US11637129B2
公开(公告)日:2023-04-25
申请号:US17172213
申请日:2021-02-10
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake
IPC: G09G3/3233 , G09G3/3275 , H01L27/06 , H01L33/62 , H01L27/12 , H01L27/32
Abstract: An object is to prevent an operation defect and to reduce an influence of fluctuation in threshold voltage of a field-effect transistor. A field-effect transistor, a switch, and a capacitor are provided. The field-effect transistor includes a first gate and a second gate which overlap with each other with a channel formation region therebetween, and the threshold voltage of the field-effect transistor varies depending on the potential of the second gate. The switch has a function of determining whether electrical connection between one of a source and a drain of the field-effect transistor and the second gate of the field-effect transistor is established. The capacitor has a function of holding a voltage between the second gate of the field-effect transistor and the other of the source and the drain of the field-effect transistor.
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