Abstract:
A method of forming and controlling air gaps between adjacent raised features on a substrate includes forming a silicon-containing film in a bottom region between the adjacent raised features using a flowable deposition process. The method also includes forming carbon-containing material on top of the silicon-containing film and forming a second film over the carbon-containing material using a flowable deposition process. The second film fills an upper region between the adjacent raised features. The method also includes curing the materials at an elevated temperature for a period of time to form the air gaps between the adjacent raised features. The thickness and number layers of films can be used to control the thickness, vertical position and number of air gaps.
Abstract:
Methods of etching exposed titanium nitride with respect to other materials on patterned heterogeneous structures are described, and may include a remote plasma etch formed from a fluorine-containing precursor. Precursor combinations including plasma effluents from the remote plasma are flowed into a substrate processing region to etch the patterned structures with high titanium nitride selectivity under a variety of operating conditions. The methods may be used to remove titanium nitride at faster rates than a variety of metal, nitride, and oxide compounds.
Abstract:
Methods of depositing initially flowable dielectric films on substrates are described. The methods include introducing silicon-containing precursor to a deposition chamber that contains the substrate. The methods further include generating at least one excited precursor, such as radical nitrogen or oxygen precursor, with a remote plasma system located outside the deposition chamber. The excited precursor is also introduced to the deposition chamber, where it reacts with the silicon-containing precursor in a reaction zone deposits the initially flowable film on the substrate. The flowable film may be treated in, for example, a steam environment to form a silicon oxide film.
Abstract:
Methods forming a low-κ dielectric material on a substrate are described. The methods may include the steps of producing a radical precursor by flowing an unexcited precursor into a remote plasma region, and reacting the radical precursor with a gas-phase silicon precursor to deposit a flowable film on the substrate. The gas-phase silicon precursor may include at least one silicon-and-oxygen containing compound and at least one silicon-and-carbon linker. The flowable film may be cured to form the low-κ dielectric material.
Abstract:
A method for conformal dry etch of a liner material in a high aspect ratio trench is achieved by depositing or forming an inhomogeneous passivation layer which is thicker near the opening of a trench bat thinner deep within the trench. The methods described herein use a selective etch following formation of the inhomogeneous passivation layer. The selective etch etches liner material faster than the passivation material. The inhomogeneous passivation layer suppresses the etch rate of the selective etch near the top of the trench (where it would otherwise be fastest) and gives the etch a head start deeper in the trench (where it would otherwise be slowest). This method may also find utility in removing bulk material uniformly from within a trench.
Abstract:
Systems and methods are described relating to semiconductor processing chambers. An exemplary chamber may include a first remote plasma system fluidly coupled with a first access of the chamber, and a second remote plasma system fluidly coupled with a second access of the chamber. The system may also include a gas distribution assembly in the chamber that may be configured to deliver both the first and second precursors into a processing region of the chamber, while maintaining the first and second precursors fluidly isolated from one another until they are delivered into the processing region of the chamber.
Abstract:
A method of etching exposed silicon-and-nitrogen-containing material on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor and an oxygen-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the exposed regions of silicon-and-nitrogen-containing material. The plasmas effluents react with the patterned heterogeneous structures to selectively remove silicon-and-nitrogen-containing material from the exposed silicon-and-nitrogen-containing material regions while very slowly removing other exposed materials. The silicon-and-nitrogen-containing material selectivity results partly from the presence of an ion suppression element positioned between the remote plasma and the substrate processing region. The ion suppression element reduces or substantially eliminates the number of ionically-charged species that reach the substrate. The methods may be used to selectively remove silicon-and-nitrogen-containing material at more than twenty times the rate of silicon oxide.
Abstract:
Embodiments of the present disclosure generally relate to a batch processing chamber that is adapted to simultaneously cure multiple substrates at one time. The batch processing chamber includes multiple processing sub-regions that are each independently temperature controlled. The batch processing chamber may include a first and a second sub-processing region that are each serviced by a substrate transport device external to the batch processing chamber. In addition, a slotted cover mounted on the loading opening of the batch curing chamber reduces the effect of ambient air entering the chamber during loading and unloading.
Abstract:
Memory devices and methods of manufacturing memory devices are provided. Described are devices and methods where 3D pitch multiplication decouples high aspect ratio etch width from cell width, creating small cell active area pitch to allow for small DRAM die size.
Abstract:
Semiconductor devices and methods of manufacturing the same are described. Transistors are fabricated using a standard process flow. A via opening extending from the top surface of the substrate to a bottom surface of the wafer device is formed, thus allowing nano TSV for high density packaging, as well as connecting the device to the backside power rail. A metal is deposited in the via opening, and the bottom surface of the wafer device is bound to a bonding wafer. The substrate is optionally thinned, and a contact electrically connected to the metal is formed.