公开(公告)号：US06999895B2

公开(公告)日：2006-02-14

申请号：US10392984

申请日：2003-03-21

申请人： Xin Guo ,  Bonnie K. Ray

发明人： Xin Guo ,  Bonnie K. Ray

IPC分类号： G06F17/18

CPC分类号： G05B21/02 ,  G06F17/18

摘要： A method (and structure) of optimizing a sampling period for a system having at least one measurable system parameter z, includes calculating a probability distribution function f(Tz,x). The time Tz,x is a first time that the measurable system parameter z will reach a predetermined system threshold x, given level z.

摘要翻译： 优化具有至少一个可测量系统参数z的系统的采样周期的方法（和结构）包括计算概率分布函数f（T z，x N）。 时间T z，x z是第一次可测量的系统参数z将达到给定等级z的预定系统阈值x。

公开(公告)号：US06991987B1

公开(公告)日：2006-01-31

申请号：US10306382

申请日：2002-11-27

申请人： Xin Guo ,  Nian Yang ,  Zhigang Wang

发明人： Xin Guo ,  Nian Yang ,  Zhigang Wang

IPC分类号： H01L21/8247

CPC分类号： H01L21/28273 ,  C23C16/0218 ,  C23C16/0227 ,  C23C16/308 ,  H01L21/3144

摘要： A process technology effectuates production of low defect homogeneous oxynitride, which can be applied in tunneling dielectrics with high dielectric constants and low barrier heights for flash memory devices, and as gate oxide for ultra-thin logic devices. The process technology involves varying the oxygen content in a the homogeneous oxynitride film comprising a part of the flash memory device, which effectively increases the dielectric constant of the oxynitride film and lowers its barrier height. In one such process, a controlled co-flow of N2O is introduced into a CVD deposition process. This process effectuates production of a oxynitride film with uniform distributions of nitrogen and oxygen throughout.

摘要翻译： 一种工艺技术可以实现低缺陷均匀氮氧化物的生产，其可以应用于具有高介电常数的隧道电介质和用于闪存器件的低屏障高度，以及用作超薄逻辑器件的栅极氧化物。 该工艺技术涉及改变包括闪存器件的一部分的均匀氮氧化物膜中的氧含量，其有效地增加氧氮化物膜的介电常数并降低其势垒高度。 在一种这样的方法中，将N 2 O 2的受控共流引入到CVD沉积工艺中。 该方法实现了氮气和氧气的均匀分布的氮氧化物膜的生产。

公开(公告)号：US06888763B1

公开(公告)日：2005-05-03

申请号：US10358498

申请日：2003-02-04

申请人： Xin Guo

发明人： Xin Guo

IPC分类号： G11C5/14 ,  G11C7/00

CPC分类号： G11C5/145

摘要： A charge pump oscillator circuit with compensation for variations in process and operating environment. The charge pump oscillator is designed with a rolloff characteristic that enables operation at both weak and strong process corners without excessive power consumption. Composite resistors in the oscillator circuit are composed of component resistors that are fabricated with different processes, e.g., implant and deposition. The resistance of the composite resistor is thus in order to provide compensation for variations in processing and operating environment. The composite resistor may be used as a feedback loop resistor, or may be used as a source degenerate resistor to control the supply current to the oscillator.

摘要翻译： 电荷泵振荡器电路，具有对工艺和操作环境变化的补偿。 电荷泵振荡器设计具有滚降特性，可在弱过程角和强加工拐角处进行操作，而无需过多的功耗。 振荡器电路中的复合电阻器由通过不同工艺（例如，植入和沉积）制造的元件电阻组成。 因此，复合电阻器的电阻是为了对处理和操作环境的变化提供补偿。 复合电阻器可以用作反馈回路电阻器，或者可以用作源极简并电阻器来控制到振荡器的电源电流。

公开(公告)号：US06825083B1

公开(公告)日：2004-11-30

申请号：US10126814

申请日：2002-04-19

申请人： Nian Yang ,  John Jianshi Wang ,  Xin Guo ,  Tien-Chun Yang

发明人： Nian Yang ,  John Jianshi Wang ,  Xin Guo ,  Tien-Chun Yang

IPC分类号： H01L21336

CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/11546

摘要： A method of semiconductor integrated circuit fabrication. Specifically, one embodiment of the present invention discloses a method for reducing shallow trench isolation (STI) corner recess of silicon in order to reduce STI edge thinning for peripheral thin gate transistor devices 480 in an integrated circuit 400 comprising flash memory devices 380, and both thick 390 and thin 480 gate transistor devices. The method begins by forming a tunnel oxide layer 310 over a semiconductor substrate 430 for the formation of the flash memory devices 380 (step 220). A mask 350 is formed over the thin gate transistor devices 480 to inhibit formation of a thick gate oxide layer 360 for the formation of the thick gate transistor devices 390 (step 230). The mask 350 reduces shallow trench isolation (STI) recess by eliminating removal of the thick gate oxide layer 360 before forming a thin oxide layer 410 for the thin gate transistor devices 480.

摘要翻译： 一种半导体集成电路制造方法。 具体地，本发明的一个实施例公开了一种用于减少硅的浅沟槽隔离（STI）角凹槽的方法，以便在包括闪存器件380的集成电路400中减少外围薄栅晶体管器件480的STI边缘变薄，以及两者 厚390和薄型480栅极晶体管器件。 该方法开始于在半导体衬底430上形成隧道氧化物层310以形成闪存器件380（步骤220）。 掩模350形成在薄栅极晶体管器件480上，以阻止形成厚栅极氧化物层360以形成厚栅极晶体管器件390（步骤230）。 掩模350通过在形成用于薄栅极晶体管器件480的薄氧化物层410之前消除厚栅极氧化层360的去除来减少浅沟槽隔离（STI）凹陷。

公开(公告)号：US06778437B1

公开(公告)日：2004-08-17

申请号：US10635974

申请日：2003-08-07

申请人： Michael Achter ,  Xin Guo

发明人： Michael Achter ,  Xin Guo

IPC分类号： G11C1604

CPC分类号： G11C29/82 ,  G11C16/08 ,  G11C16/3477

摘要： According to one embodiment, the memory circuit comprises a memory sector having a plurality of memory cells. Each of the plurality of memory cells has a gate connected to a corresponding word line, where each corresponding word line is further connected to an output of a corresponding decoding circuit. Each corresponding decoding circuit receives a corresponding vertical word line signal, a corresponding global word line signal, and a corresponding sector supply voltage. The corresponding sector supply voltage is capable of supplying an erase voltage, such as −9 V for a negative gate erase memory device, for example. With this arrangement, the corresponding decoding circuit is capable of selectively excluding the corresponding word line from receiving the erase voltage during the erase operation.

摘要翻译： 根据一个实施例，存储器电路包括具有多个存储单元的存储器扇区。 多个存储单元中的每一个具有连接到相应字线的栅极，其中每个对应的字线进一步连接到对应的解码电路的输出。 每个对应的解码电路接收对应的垂直字线信号，对应的全局字线信号和对应的扇区电源电压。 例如，相应的扇区电源电压能够提供擦除电压，例如用于负栅极擦除存储器件的-9V。 利用这种布置，相应的解码电路能够在擦除操作期间选择性地排除相应的字线接收擦除电压。

公开(公告)号：US5607776A

公开(公告)日：1997-03-04

申请号：US403169

申请日：1995-03-13

申请人： Mark A. Mueller ,  Xin Guo ,  John C. Egermeier

发明人： Mark A. Mueller ,  Xin Guo ,  John C. Egermeier

IPC分类号： C23C14/00 ,  C23C14/06 ,  C23C14/18 ,  C23C14/56 ,  B32B15/04

CPC分类号： C23C14/0036 ,  C23C14/0641 ,  C23C14/185 ,  C23C14/564 ,  Y10T428/24975 ,  Y10T428/265

摘要： A novel method of in-situ cleaning a Ti target in a Ti+TiN anti-reflective coating process when such Ti and TiN deposition process are conducted in the same process chamber by the addition of a simple process step and without the use of a shutter.

摘要翻译： 当在相同的处理室中进行这种Ti和TiN沉积工艺时，通过添加简单的工艺步骤并且不使用快门，在Ti + TiN抗反射涂覆工艺中原位清洁Ti靶的新方法 。

公开(公告)号：US11284269B2

公开(公告)日：2022-03-22

申请号：US16652681

申请日：2019-01-08

申请人： Sony Corporation ,  Xin Guo

发明人： Xin Guo ,  Chen Sun

IPC分类号： H04W72/00 ,  H04W16/14 ,  H04W52/30

摘要： The present disclosure provides an electronic device and a method for wireless communication and a computer readable storage medium. The electronic device comprises: a processing circuit, configured to: allocate a spectrum resource for a spectrum allocation object of a first set managed by a first level spectrum management device; and to generate spectrum coordination information for a spectrum allocation object of a second set managed by a second level spectrum management device located on a lower level of the first level spectrum management device, so as to provide the same to the second level spectrum management device, wherein the spectrum coordinate information is used for coordination of spectrum allocation executed by the second level spectrum management device and spectrum allocation executed by the first level spectrum management device.

公开(公告)号：US09667752B2

公开(公告)日：2017-05-30

申请号：US14131841

申请日：2012-07-03

申请人： Xin Guo

发明人： Xin Guo

IPC分类号： H04L29/06 ,  H04W76/02

CPC分类号： H04L69/08 ,  H04L67/141 ,  H04L67/42 ,  H04W76/14

摘要： A method for wireless data transmission, a transmission system, client controllers, and server controllers are described. The method for wireless data transmission includes: establishing management connection, the server controller establishes task management connection among the client controllers respectively; task arrangement, the server controller arranges the wireless data transmission task among the client equipment based on the information of client equipment, which is acquired from the task management connection, each client equipment is coupled with corresponding client controller; task executing, based on the arranged information of wireless data transmission task; establishing data transmission connection among the client controllers; and executing the wireless data transmission task through the data transmission connection. By using the server controllers, the wireless data transmission among client equipment can be accomplished conveniently, without an operating interface.

公开(公告)号：US09529668B2

公开(公告)日：2016-12-27

申请号：US14499010

申请日：2014-09-26

申请人： Yogesh B. Wakchaure ,  David J. Pelster ,  Eric L. Hoffman ,  Xin Guo ,  Aliasgar S. Madraswala

发明人： Yogesh B. Wakchaure ,  David J. Pelster ,  Eric L. Hoffman ,  Xin Guo ,  Aliasgar S. Madraswala

IPC分类号： G06F11/10 ,  G11C11/56 ,  G11C29/52 ,  G11C16/04 ,  G06F12/02 ,  G06F3/06 ,  G11C29/42 ,  G06F12/08 ,  G11C29/04

CPC分类号： G06F11/1068 ,  G06F3/0619 ,  G06F3/0656 ,  G06F3/0679 ,  G06F3/0688 ,  G06F11/1048 ,  G06F11/106 ,  G06F11/1072 ,  G06F12/0246 ,  G06F12/0868 ,  G06F2003/0691 ,  G06F2212/1016 ,  G06F2212/202 ,  G06F2212/2022 ,  G06F2212/214 ,  G06F2212/222 ,  G06F2212/403 ,  G06F2212/7201 ,  G06F2212/7203 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C29/42 ,  G11C29/52 ,  G11C2029/0411 ,  G11C2211/5641 ,  G11C2211/5642 ,  G11C2211/5643 ,  G11C2211/5648

摘要： A page data (e.g., upper page data) received from a host is stored in a transfer buffer of a controller of a solid state drive. Another page data (e.g., lower page data) is read from a non-volatile memory (e.g., a NAND memory) to store in the transfer buffer as an error corrected page data. The error corrected page data and the page data are written to the non-volatile memory. In additional embodiments, a controller loads a page data (e.g., upper page data) received from the host in one or more NAND page buffers. The controller reads another page data (e.g., lower page data) from a NAND memory to store in a transfer buffer as an error corrected page data. The error corrected page data stored in the transfer buffer is loaded to the one or more NAND page buffers.

摘要翻译： 从主机接收的页数据（例如，上页数据）被存储在固态驱动器的控制器的传送缓冲器中。 从非易失性存储器（例如，NAND存储器）中读取另一页数据（例如，较低页数据），以作为纠错页数据存储在传送缓冲器中。 错误校正的页面数据和页面数据被写入非易失性存储器。 在另外的实施例中，控制器在一个或多个NAND页缓冲器中加载从主机接收的页数据（例如，上页数据）。 控制器从NAND存储器读取另一个页数据（例如，下页数据），以存储在转移缓冲器中作为纠错页数据。 存储在传送缓冲器中的纠错页数据被加载到一个或多个NAND页缓冲器。

公开(公告)号：US09483397B2

公开(公告)日：2016-11-01

申请号：US13943762

申请日：2013-07-16

申请人： Yogesh B. Wakchaure ,  David J. Pelster ,  Xin Guo

发明人： Yogesh B. Wakchaure ,  David J. Pelster ,  Xin Guo

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7204 ,  G06F2212/7205 ,  G06F2212/7207 ,  G06F2212/7208 ,  G06F2212/7209 ,  G06F2212/7211 ,  G11C11/5635 ,  G11C16/10 ,  G11C16/102 ,  G11C16/16 ,  G11C16/32 ,  G11C16/349 ,  G11C16/3495

摘要： Computer processor hardware receives notification that data stored in a region of storage cells in a non-volatile memory system stores invalid data. In response to the notification, the computer processor hardware marks the region as storing invalid data. The computer processor hardware controls the magnitude of erase dwell time (i.e., the amount of time that one or more cells are set to an erased state) associated with overwriting of the invalid data in the storage cells with replacement data. For example, to re-program respective storage cells, the data manager must erase the storage cells and then program the storage cells with replacement data. The data management logic can control the erase dwell time to be less than a threshold time value to enhance a life of the non-volatile memory system.

摘要翻译： 计算机处理器硬件接收存储在非易失性存储器系统中的存储单元区域中的数据存储无效数据的通知。 响应于该通知，计算机处理器硬件将该区域标记为存储无效数据。 计算机处理器硬件控制与用替换数据重写存储单元中的无效数据相关联的擦除驻留时间的大小（即，一个或多个单元被设置为擦除状态的时间量）。 例如，为了重新编程各个存储单元，数据管理器必须擦除存储单元，然后用替换数据对存储单元进行编程。 数据管理逻辑可以将擦除停留时间控制为小于阈值时间值以增强非易失性存储器系统的寿命。