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公开(公告)号：US5756382A
公开(公告)日：1998-05-26
申请号：US784354
申请日：1997-01-23
Applicant: Mizuki Segawa , Yoshiaki Kato , Hiroaki Nakaoka , Takashi Nakabayashi , Atsushi Hori , Hiroshi Masuda , Ichiro Matsuo , Akihira Shinohara , Takashi Uehara , Mitsuo Yasuhira
Inventor： Mizuki Segawa , Yoshiaki Kato , Hiroaki Nakaoka , Takashi Nakabayashi , Atsushi Hori , Hiroshi Masuda , Ichiro Matsuo , Akihira Shinohara , Takashi Uehara , Mitsuo Yasuhira
IPC: H01L21/8238 , H01L21/265
CPC classification number: H01L21/823814 , Y10S148/147
Abstract: Gate electrodes of an N-channel transistor and a P-channel transistor are formed on a semiconductor substrate with a gate insulator therebetween. After conducting a first thermal treatment to the gate electrodes, N-type heavily doped diffusion layers to be a source or a drain of the N-channel transistor are formed using the gate electrode of the N-channel transistor as a mask. After conducting a second thermal treatment to the N-type heavily doped diffusion layers at a lower temperature than that of the first thermal treatment, P-type heavily doped diffusion layers to be a source or a drain of the P-channel transistor are formed using the gate electrode of the P-channel transistor as a mask. Then, a third thermal treatment is conducted to the P-type heavily doped diffusion layers at a lower temperature than that of the second thermal treatment.
Abstract translation: N沟道晶体管和P沟道晶体管的栅电极形成在半导体衬底上，栅极绝缘体在其间。 在对栅电极进行第一热处理之后，使用N沟道晶体管的栅电极作为掩模来形成作为N沟道晶体管的源极或漏极的N型重掺杂扩散层。 在比第一热处理的温度低的情况下对N型重掺杂扩散层进行第二次热处理之后，使用P型重掺杂扩散层作为P沟道晶体管的源极或漏极，形成为使用 P沟道晶体管的栅电极作为掩模。 然后，在比第二热处理的温度低的温度下对P型重掺杂扩散层进行第三次热处理。
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公开(公告)号：US5749048A
公开(公告)日：1998-05-05
申请号：US886665
申请日：1997-07-02
Applicant: Hiroshi Masuda
Inventor： Hiroshi Masuda
CPC classification number: H03J1/0091 , H03J1/0066 , H04H60/44 , H03J3/08 , H04H2201/13 , H04H60/27
Abstract: A receiver for receiving a broadcast in which data indicating a broadcast station name has been multiplexed to a main signal includes: a receiving circuit constructed in a frequency synthesizer mode; a memory in which a group of frequency data for selecting the broadcast in the receiving circuit, and data on the broadcast station name is registered; a circuit for taking out the data from a signal received by the receiving circuit; a scanner for allowing the receiving circuit to scan the broadcasting zone for the broadcast; and a detector for detecting the received broadcast at the time of the scanning, when the detector has detected the received broadcast during the scanning, the group of the frequency data which has been registered before the start of the scanning, and the data on the broadcast station name is shifted to the data area in the memory, and one group of the frequency data indicating the frequency thus detected, and the data on the broadcast station name for the received broadcast is registered in the data area in the memory which has become empty by the shift.
Abstract translation: 一种用于接收广播的接收机，其中指示广播台名称的数据已被复用到主信号中，包括：以频率合成器模式构成的接收电路; 记录在接收电路中选择广播的一组频率数据和广播电台名称的数据的存储器; 用于从接收电路接收的信号中取出数据的电路; 用于允许接收电路扫描广播区域以用于广播的扫描仪; 以及检测器，用于在扫描时检测接收到的广播，当检测器在扫描期间检测到接收到的广播时，已经在扫描开始之前登记的频率数据组和广播上的数据 站名被移位到存储器中的数据区域，并且一组频率数据指示如此检测的频率，并且用于所接收的广播的广播站名称上的数据被登记在已经变为空的存储器中的数据区域中 通过转移。
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公开(公告)号：US5726071A
公开(公告)日：1998-03-10
申请号：US789315
申请日：1997-01-23
Applicant: Mizuki Segawa , Yoshiaki Kato , Hiroaki Nakaoka , Takashi Nakabayashi , Atsushi Hori , Hiroshi Masuda , Ichiro Matsuo , Akihira Shinohara , Takashi Uehara , Mitsuo Yasuhira
Inventor： Mizuki Segawa , Yoshiaki Kato , Hiroaki Nakaoka , Takashi Nakabayashi , Atsushi Hori , Hiroshi Masuda , Ichiro Matsuo , Akihira Shinohara , Takashi Uehara , Mitsuo Yasuhira
IPC: H01L21/8238 , H01L21/70
CPC classification number: H01L21/823814 , Y10S148/147
Abstract: Gate electrodes of an N-channel transistor and a P-channel transistor are formed on a semiconductor substrate with a gate insulator therebetween. After conducting a first thermal treatment to the gate electrodes, N-type heavily doped diffusion layers to be a source or a drain of the N-channel transistor are formed using the gate electrode of the N-channel transistor as a mask. After conducting a second thermal treatment to the N-type heavily doped diffusion layers at a lower temperature than that of the first thermal treatment. P-type heavily doped diffusion layers to be a source or a drain of the P-channel transistor are formed using the gate electrode of the P-channel transistor as a mask. Then, a third thermal treatment is conducted to the P-type heavily doped diffusion layers at a lower temperature than that of the second thermal treatment.
Abstract translation: N沟道晶体管和P沟道晶体管的栅电极形成在半导体衬底上，栅极绝缘体在其间。 在对栅电极进行第一热处理之后，使用N沟道晶体管的栅电极作为掩模来形成作为N沟道晶体管的源极或漏极的N型重掺杂扩散层。 在比第一热处理的温度低的温度下对N型重掺杂扩散层进行第二次热处理。 使用P沟道晶体管的栅电极作为掩模来形成作为P沟道晶体管的源极或漏极的P型重掺杂扩散层。 然后，在比第二热处理的温度低的温度下对P型重掺杂扩散层进行第三次热处理。
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公开(公告)号：US5686340A
公开(公告)日：1997-11-11
申请号：US723710
申请日：1996-09-30
Applicant: Mizuki Segawa , Yoshiaki Kato , Hiroaki Nakaoka , Takashi Nakabayashi , Atsushi Hori , Hiroshi Masuda , Ichiro Matsuo , Akihira Shinohara , Takashi Uehara , Mitsuo Yasuhira
Inventor： Mizuki Segawa , Yoshiaki Kato , Hiroaki Nakaoka , Takashi Nakabayashi , Atsushi Hori , Hiroshi Masuda , Ichiro Matsuo , Akihira Shinohara , Takashi Uehara , Mitsuo Yasuhira
IPC: H01L21/8238 , H01L21/265
CPC classification number: H01L21/823814 , Y10S148/147
Abstract: Gate electrodes of an N-channel transistor and a P-channel transistor are formed on a semiconductor substrate with a gate insulator therebetween. After conducting a first thermal treatment to the gate electrodes, N-type heavily doped diffusion layers to be a source or a drain of the N-channel transistor are formed using the gate electrode of the N-channel transistor as a mask. After conducting a second thermal treatment to the N-type heavily doped diffusion layers at a lower temperature than that of the first thermal treatment. P-type heavily doped diffusion layers to be a source or a drain of the P-channel transistor are formed using the gate electrode of the P-channel transistor as a mask. Then, a third thermal treatment is conducted to the P-type heavily doped diffusion layers at a lower temperature than that of the second thermal treatment.
Abstract translation: N沟道晶体管和P沟道晶体管的栅电极形成在半导体衬底上，栅极绝缘体在其间。 在对栅电极进行第一热处理之后，使用N沟道晶体管的栅电极作为掩模来形成作为N沟道晶体管的源极或漏极的N型重掺杂扩散层。 在比第一热处理的温度低的温度下对N型重掺杂扩散层进行第二次热处理。 使用P沟道晶体管的栅电极作为掩模来形成作为P沟道晶体管的源极或漏极的P型重掺杂扩散层。 然后，在比第二热处理的温度低的温度下对P型重掺杂扩散层进行第三次热处理。
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公开(公告)号：US5481120A
公开(公告)日：1996-01-02
申请号：US164801
申请日：1993-12-10
Applicant: Kazuhiro Mochizuki , Tomoyoshi Mishima , Tohru Nakamura , Hiroshi Masuda , Tomonori Tanoue , Tooru Haga , Yoshihisa Fujisaki
Inventor： Kazuhiro Mochizuki , Tomoyoshi Mishima , Tohru Nakamura , Hiroshi Masuda , Tomonori Tanoue , Tooru Haga , Yoshihisa Fujisaki
IPC: H01L21/331 , H01L29/08 , H01L29/20 , H01L29/45 , H01L29/737 , H01L29/80 , H01S5/042 , H01S5/183 , H01S5/22 , H01S5/323 , H01L27/02
CPC classification number: H01S5/18347 , H01L29/0891 , H01L29/20 , H01L29/452 , H01L29/66318 , H01L29/7371 , H01S5/0424 , H01L29/802 , H01S2304/02 , H01S5/18341 , H01S5/18369 , H01S5/32316
Abstract: Disclosed is a semiconductor device using a polycrystalline compound semiconductor with a low resistance as a low resistance layer, and its fabrication method. The above polycrystalline compound semiconductor layer is doped with C or Be as impurities in a large amount, and is extremely low in resistance. The polycrystalline compound semiconductor layer is formed by either of a molecular beam epitaxy method, an organometallic vapor phase epitaxy method and an organometallic molecular beam epitaxy method under the condition that a substrate temperature is 450.degree. C. or less and the ratio of partial pressure of a V-group element to a III-group element is 50 or more. In the case that the above polycrystaline compound semiconductor layer with a low resistance is used as an extrinsic base region of an heterojunction bipolar transistor, since the extrinsic base region can be formed on a dielectric film formed on a collector, it is possible to reduce the base-collector capacitance, and hence to enhance the operational speed of the heterojunction bipolar transistor.
Abstract translation: 公开了使用具有低电阻的多晶化合物半导体作为低电阻层的半导体器件及其制造方法。 上述多晶化合物半导体层以C或Be作为杂质被大量掺杂，并且电阻极低。 多晶化合物半导体层通过分子束外延法，有机金属气相外延法和有机金属分子束外延法中的任一种形成，在基板温度为450℃以下的条件下， 对于III族元素的V族元素为50以上。 在上述具有低电阻的多晶化合物半导体层用作异质结双极晶体管的外在基极区域的情况下，由于可以在形成在集电体上的电介质膜上形成非本征基区，因此可以减少 基极集电极电容，从而提高异质结双极晶体管的工作速度。
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Patent Agency Ranking
公开(公告)号：US5114549A
公开(公告)日：1992-05-19
申请号：US784738
申请日：1991-10-29
Applicant: Takayuki Shimamune , Shuji Nakamatsu , Isao Sawamoto , Hiroshi Masuda , Yoshinori Nishiki
Inventor： Takayuki Shimamune , Shuji Nakamatsu , Isao Sawamoto , Hiroshi Masuda , Yoshinori Nishiki
Abstract: A method and apparatus for water treatment is described, using electrolytic zone, which comprises electrolyzing water to generate an ozone-containing gas in the anode compartment of an electrolytic cell, separating the ozone-containing gas from the anolyte, and contacting the separated ozone-containing gas with the water to be treated said water to be treated being different than the water for electrolysis.
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公开(公告)号：US4306898A
公开(公告)日：1981-12-22
申请号：US154052
申请日：1980-05-28
Applicant: Hiroshi Masuda , Hirohiko Sakai , Syoji Saito
Inventor： Hiroshi Masuda , Hirohiko Sakai , Syoji Saito
Abstract: In a float process of flat glass production, the width of glass ribbon is controlled by regulating a tweel to manipulate the rate of supplying a molten glass through the tweel onto a molten metal bath. To minimize a fluctuation of the glass ribbon width, either of two different control modes, an integral control mode and a proportional-plus-integral control mode, is employed depending on whether or not an error between a measured width and a desired value is within a predetermined range of the error. Preferably the method of the present invention is achieved according to a sampled-data control system.
Abstract translation: 在平板玻璃生产的浮法中，玻璃带的宽度通过调节薄膜来控制，以控制通过薄板将熔融玻璃供应到熔融金属浴上的速率。 为了最小化玻璃带宽度的波动，根据是否在测量宽度和期望值之间的误差在内，采用两种不同控制模式中的任一种，积分控制模式和比例积分控制模式 一个预定范围的误差。 优选地，根据采样数据控制系统实现本发明的方法。
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公开(公告)号：US08845542B2
公开(公告)日：2014-09-30
申请号：US13394496
申请日：2009-09-09
Applicant: Hiroshi Masuda , Chikao Harada , Hidenori Suzuki
Inventor： Hiroshi Masuda , Chikao Harada , Hidenori Suzuki
CPC classification number: A61B8/485 , A61B5/02035 , A61B5/02225 , A61B5/0225 , A61B8/06 , A61B8/0858 , A61B8/0891 , A61B8/4218 , A61B8/488 , A61B8/5223 , G01S15/899
Abstract: It is provided a blood vessel function inspecting apparatus including: a blood vessel diameter measuring portion configured to measure a diameter of a blood vessel; a blood vessel wall thickness measuring portion configured to measure a wall thickness of the blood vessel; and a blood vessel function index value calculating portion configured to calculate a function index value for diagnosing the blood vessel of its function, after releasing of the blood vessel from blood flow obstruction, by dividing an amount of dilatation of said diameter of the blood vessel continuously measured by said blood vessel diameter measuring portion, by the wall thickness measured by said blood vessel wall thickness measuring portion.
Abstract translation: 本发明提供一种血管功能检查装置，包括：血管直径测量部，被配置为测量血管的直径; 构造成测量血管壁厚的血管壁厚测量部; 以及血管功能指标值计算部，其被配置为通过将所述血管直径的扩张量连续地除以从血流阻塞释放血液之后，计算用于诊断其功能的血管的功能指标值 由所述血管直径测量部分测量由所述血管壁厚度测量部分测量的壁厚。
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公开(公告)号：US08657748B2
公开(公告)日：2014-02-25
申请号：US13377329
申请日：2009-06-09
Applicant: Naotaka Nitta , Hiroshi Masuda
Inventor： Naotaka Nitta , Hiroshi Masuda
CPC classification number: A61B5/145 , A61B5/02007 , A61B5/02035 , A61B5/14535 , A61B8/06 , A61B8/4218 , A61B8/5223 , G01N11/00
Abstract: A blood vessel function inspecting apparatus including a first blood state index value calculating portion that obtains estimated hematocrit values at a plurality of points predetermined within a blood vessel, on the basis of values of a blood viscosity and values of a shear rate at said plurality of points, which are respectively extracted from a viscosity distribution and a shear rate distribution, and according to reference relationships between a hematocrit value and the blood viscosity, which reference relationships respectively correspond predetermined different values of the shear rate; and a second blood state index value calculating portion that calculates, as said blood state index value, a value relating to an amount of difference of the estimated hematocrit values at said plurality of points with respect to each other, which amount is minimized by transforming said reference relationships at the same ratio for all of the values of the shear rate.
Abstract translation: 一种血管功能检查装置，其包括：第一血液指标值计算部，其根据血液粘度的值和所述多个血压指数值的剪切速度值，求出在血管内预定的多个点处的估计的血细胞比容值 分别从粘度分布和剪切速度分布提取，并且根据血细胞比容值和血液粘度之间的参考关系，该参考关系分别对应于剪切速率的预定不同值; 以及第二血液指标值计算部，其计算与所述血液状态指标值相关的与所述多个点相对于彼此的所估计的血细胞比容值的差值相关的值，所述量通过变换所述 对于剪切速率的所有值，参考关系以相同的比例。
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公开(公告)号：US08327629B2
公开(公告)日：2012-12-11
申请号：US12532273
申请日：2008-04-02
Applicant: Hiroki Masuda , Hiroshi Masuda , Hiroshi Omote
Inventor： Hiroki Masuda , Hiroshi Masuda , Hiroshi Omote
CPC classification number: F01N3/035 , B01D46/24 , B01D46/4263 , B01D2258/012 , B01D2279/30 , F01N3/0335 , F01N3/106 , F01N3/2026 , F01N3/2885 , F01N13/0097 , F01N13/1894 , F01N2260/14 , F01N2450/24 , F01N2450/30 , F01N2470/02 , F01N2470/18 , F01N2470/22 , F01N2490/06 , Y02T10/26
Abstract: It is an object of the present invention to provide a black smoke exhaust purification apparatus capable of equalizing temperature of a particulate filter and facilitating maintenance thereof. The black smoke exhaust purification apparatus is arranged in series therein with an oxidation catalyst and a particulate filter wherein an inlet for exhaust gas is disposed between the oxidation catalyst and the particulate filter, and wherein an exhaust gas passage is extended from the inlet portion through the oxidation catalyst so as to be connected to an upstream space of the oxidation catalyst.
Abstract translation: 本发明的目的是提供一种黑烟排气净化装置，其能够使微粒过滤器的温度相等并且便于维护。 黑烟排气净化装置与氧化催化剂和颗粒过滤器串联布置，其中废气入口设置在氧化催化剂和颗粒过滤器之间，并且其中废气通道从入口部分延伸通过 氧化催化剂，以连接到氧化催化剂的上游空间。
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