公开(公告)号：US08933550B2

公开(公告)日：2015-01-13

申请号：US13442757

申请日：2012-04-09

Applicant: Yan Xun Xue ,  Anup Bhalla ,  Jun Lu

Inventor： Yan Xun Xue ,  Anup Bhalla ,  Jun Lu

IPC: H01L23/22 ,  H01L29/40 ,  H01L23/495 ,  H01L23/00

CPC classification number: H01L23/49575 ,  H01L23/49562 ,  H01L23/49589 ,  H01L24/37 ,  H01L24/39 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/371 ,  H01L2224/40245 ,  H01L2224/45014 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49177 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/84

Abstract: A semiconductor package for power converter application comprises a low-side MOSFET chip and a high-side MOSFET chip stacking one over the other. The semiconductor package may further enclose a capacitor whereas the capacitor may be a discrete component or an integrated component on chip level with the low-side MOSFET. The semiconductor package may further comprise a PIC chip to provide a complete power converter on semiconductor chip assembly package level.

Abstract translation: 用于功率转换器应用的半导体封装包括低边MOSFET芯片和高边MOSFET芯片。 半导体封装可以进一步包围电容器，而电容器可以是分立元件或芯片级与低边MOSFET的集成元件。 半导体封装还可以包括PIC芯片，以在半导体芯片组件封装级别上提供完整的功率转换器。

公开(公告)号：US20140284384A1

公开(公告)日：2014-09-25

申请号：US14355613

申请日：2011-11-07

Applicant: Jun Lu ,  Yong Liu ,  Yujiun Paul Wang

Inventor： Jun Lu ,  Yong Liu ,  Yujiun Paul Wang

IPC: G06K7/10

CPC classification number: G06K7/10722

Abstract: An optical indicia reading terminal can comprise a microprocessor, a memory, an image sensor integrated circuit including a two-dimensional image sensor, and a hand held housing encapsulating the two-dimensional image sensor. The image sensor integrated circuit can be configured to output a plurality of digital signals, each digital signal being representative of light incident on at least one pixel of the two-dimensional image sensor. The optical indicia reading terminal can be configured to store in the memory a frame of monochrome image data by selectively acquiring a plurality of luminance signals from the plurality of digital signals. Each luminance signal of the plurality of luminance signals can be representative of luminance of light incident on at least one pixel of the two-dimensional image sensor. The optical indicia reading terminal can be configured to process the frame of image data for decoding decodable indicia.

Abstract translation: 光标记读取终端可以包括微处理器，存储器，包括二维图像传感器的图像传感器集成电路和封装二维图像传感器的手持外壳。 图像传感器集成电路可以被配置为输出多个数字信号，每个数字信号代表入射到二维图像传感器的至少一个像素的光。 光标记读取终端可以被配置为通过从多个数字信号中选择性地获取多个亮度信号来将存储器中的单色图像数据的帧存储在存储器中。 多个亮度信号的每个亮度信号可以代表入射到二维图像传感器的至少一个像素上的光的亮度。 光标记读取终端可以被配置为处理用于解码可解码标记的图像数据帧。

公开(公告)号：US08782064B2

公开(公告)日：2014-07-15

申请号：US13538290

申请日：2012-06-29

Applicant: Rajiv Kottomtharayil ,  Parag Gokhale ,  Jun Lu

Inventor： Rajiv Kottomtharayil ,  Parag Gokhale ,  Jun Lu

IPC: G06F17/30

CPC classification number: G06F17/30094 ,  G06F11/1448 ,  G06F11/1453 ,  Y10S707/99934 ,  Y10S707/99955

Abstract: A method in a computer system for retrieving data from one of multiple copies of the data is provided, referred to as the data management system. The data management system receives a request identifying a data object to be accessed. Then, the data management system queries a metabase to locate data copies that contain the identified data object, wherein the data copies are created from similar source data, and wherein for each data copy the metabase contains an indication of the availability of the copy relative to other copies. Next, the data management system determines one of the located data copies to use to access the identified data object, wherein the determination is made based on the indicated availability contained in the metabase for each of the located data copies. Then, the data management system accesses the identified data object using the determined one of the located data copies.

Abstract translation: 提供了一种用于从数据的多个副本之一检索数据的计算机系统中的方法，称为数据管理系统。 数据管理系统接收标识要访问的数据对象的请求。 然后，数据管理系统查询元数据库以定位包含所识别的数据对象的数据副本，其中从相似的源数据创建数据副本，并且其中对于每个数据拷贝，元数据库包含相对于 其他副本。 接下来，数据管理系统确定用于访问所识别的数据对象的所定位的数据副本之一，其中基于针对每个所定位的数据副本的元数据库中包含的指示的可用性进行确定。 然后，数据管理系统使用所确定的一个定位的数据副本来访问所识别的数据对象。

公开(公告)号：US20140191334A1

公开(公告)日：2014-07-10

申请号：US13734201

申请日：2013-01-04

Applicant: Yan Xun Xue ,  Yueh-Se Ho ,  Lei Shi ,  Jun Lu ,  Liang Zhao

Inventor： Yan Xun Xue ,  Yueh-Se Ho ,  Lei Shi ,  Jun Lu ,  Liang Zhao

IPC: H01L23/495 ,  H01L27/088

CPC classification number: H01L23/49575 ,  H01L23/49524 ,  H01L23/49537 ,  H01L23/49562 ,  H01L24/34 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L27/088 ,  H01L2224/37011 ,  H01L2224/371 ,  H01L2224/4007 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/01322 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A stacked power semiconductor device includes vertical metal oxide semiconductor field-effect transistors and dual lead frames packaged with flip-chip technology. In the method of manufacturing the stacked power semiconductor device, a first semiconductor chip is flip chip mounted on the first lead frame. A mounting clips is connected to the electrode at back side of the first semiconductor chip. A second semiconductor chip is mounted on the second lead frame, which is then flipped and stacked on the mounting clip.

Abstract translation: 叠层功率半导体器件包括垂直金属氧化物半导体场效应晶体管和采用倒装芯片技术封装的双引线框架。 在制造堆叠式功率半导体器件的方法中，第一半导体芯片是安装在第一引线框上的倒装芯片。 安装夹在第一半导体芯片的背面连接到电极。 第二半导体芯片安装在第二引线框架上，然后翻转并堆叠在安装夹上。

公开(公告)号：US08722466B2

公开(公告)日：2014-05-13

申请号：US12722528

申请日：2010-03-12

Applicant: Jun Lu ,  Kai Liu ,  Yan Xun Xue

Inventor： Jun Lu ,  Kai Liu ,  Yan Xun Xue

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H01L21/565 ,  H01L23/3107 ,  H01L23/49517 ,  H01L23/49524 ,  H01L23/49551 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/34 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L25/07 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/37147 ,  H01L2224/4007 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package with connecting plate for internal connection comprise: a plurality of chips each having a plurality of contact areas on a top surface; one or more connecting plates having a plurality of electrically isolated connecting plate portions each connecting a contact area of the semiconductor chips. The method of making the semiconductor package includes the steps of connecting one or more connecting plates to a plurality of semiconductor chips, applying a molding material to encapsulate the chips and the connecting plates, separating a plurality of connecting plate portions of the connecting plates by shallow cutting through or by grinding.

Abstract translation: 具有用于内部连接的连接板的半导体封装包括：多个芯片，每个芯片在顶表面上具有多个接触区域; 一个或多个连接板具有多个电隔离的连接板部分，每个连接板部分连接半导体芯片的接触区域。 制造半导体封装的方法包括将一个或多个连接板连接到多个半导体芯片的步骤，施加模制材料以封装芯片和连接板，将连接板的多个连接板部分分开浅 切割或磨削。

公开(公告)号：US20140114089A1

公开(公告)日：2014-04-24

申请号：US14055054

申请日：2013-10-16

Applicant: Weitong DONG ,  Christian Wolfgang Hemp ,  Xiangle Jin ,  Jun Lu ,  Ulrich Scholz ,  Shengmin Su ,  Wei Xu ,  Jinsong Yang

Inventor： Weitong DONG ,  Christian Wolfgang Hemp ,  Xiangle Jin ,  Jun Lu ,  Ulrich Scholz ,  Shengmin Su ,  Wei Xu ,  Jinsong Yang

IPC: C07C249/02

CPC classification number: C07C213/00 ,  C07C217/76 ,  C07C249/02 ,  C07C257/08 ,  C07C257/18

Abstract: The present invention relates to a process for the preparation of 4-aminobenzoamidine (4-AMBA) salts of general formula (I) preferably the salts thereof with hydrochloric or hydrobromic acid, particularly preferred the dichloride salt.

Abstract translation: 本发明涉及制备通式（I）的4-氨基苯甲脒（4-AMBA）盐的方法，优选其盐与盐酸或氢溴酸，特别优选二氯化物盐。

公开(公告)号：US08581376B2

公开(公告)日：2013-11-12

申请号：US12819111

申请日：2010-06-18

Applicant: Hamza Yilmaz ,  Xiaotian Zhang ,  Yan Xun Xue ,  Anup Bhalla ,  Jun Lu ,  Kai Liu ,  Yueh-Se Ho ,  John Amato

Inventor： Hamza Yilmaz ,  Xiaotian Zhang ,  Yan Xun Xue ,  Anup Bhalla ,  Jun Lu ,  Kai Liu ,  Yueh-Se Ho ,  John Amato

IPC: H01L21/44 ,  H01L21/31

CPC classification number: H01L23/49541 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49537 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/81 ,  H01L24/84 ,  H01L2224/27013 ,  H01L2224/29101 ,  H01L2224/2929 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/4103 ,  H01L2224/45014 ,  H01L2224/48247 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/92 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01067 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2224/84 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099

Abstract: The present invention is directed to a lead-frame having a stack of semiconductor dies with interposed metalized clip structure. Level projections extend from the clip structure to ensure that the clip structure remains level during fabrication.

Abstract translation: 本发明涉及具有插入金属夹结构的半导体管芯堆叠的引线框架。 水平投影从夹子结构延伸，以确保夹子结构在制造过程中保持水平。

公开(公告)号：US20130221507A1

公开(公告)日：2013-08-29

申请号：US13408185

申请日：2012-02-29

Applicant: Zhiqiang Niu ,  Ming-Chen Lu ,  Yan Xun Xue ,  Yan Huo ,  Hua Pan ,  Guo Feng Lian ,  Jun Lu

Inventor： Zhiqiang Niu ,  Ming-Chen Lu ,  Yan Xun Xue ,  Yan Huo ,  Hua Pan ,  Guo Feng Lian ,  Jun Lu

IPC: H01L23/495 ,  H01L21/56

CPC classification number: H01L23/3107 ,  H01L21/565 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/73 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L2924/13091 ,  H01L2924/15724 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A semiconductor package is provided with an Aluminum alloy lead-frame without noble metal plated on the Aluminum base lead-frame. Aluminum alloy material with proper alloy composition and ratio for making an aluminum alloy lead-frame is provided. The aluminum alloy lead-frame is electroplated with a first metal electroplating layer, a second electroplating layer and a third electroplating layer in a sequence. The lead-frame electroplated with the first, second and third metal electroplating layers is then used in the fabrication process of a power semiconductor package including chip connecting, wire bonding, and plastic molding. After the molding process, the area of the lead-frame not covered by the molding compound is electroplated with a fourth metal electroplating layer that is not easy to be oxidized when exposing to air.

Abstract translation: 半导体封装设置有没有贵金属的铝合金引线框架，镀在铝基底引线框架上。 提供具有适当的合金组成和制造铝合金引线框架的比例的铝合金材料。 铝合金引线框架依次电镀有第一金属电镀层，第二电镀层和第三电镀层。 然后，利用第一，第二和第三金属电镀层电镀的引线框架用于包括芯片连接，引线接合和塑性模制的功率半导体封装的制造过程中。 在模制过程之后，未被模塑料覆盖的引线框架的区域用暴露于空气中不容易氧化的第四金属电镀层电镀。

公开(公告)号：US08481368B2

公开(公告)日：2013-07-09

申请号：US13092059

申请日：2011-04-21

Applicant: Yan Xun Xue ,  Yueh-Se Ho ,  Hamza Yilmaz ,  Jun Lu

Inventor： Yan Xun Xue ,  Yueh-Se Ho ,  Hamza Yilmaz ,  Jun Lu

IPC: H01L21/44

CPC classification number: H01L24/49 ,  H01L23/3107 ,  H01L23/492 ,  H01L23/49503 ,  H01L23/49548 ,  H01L23/49562 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L2224/13099 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29294 ,  H01L2224/29339 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/32506 ,  H01L2224/371 ,  H01L2224/40245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/73153 ,  H01L2224/73255 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2224/838 ,  H01L2224/83801 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/84 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: The invention relates to a semiconductor package of a flip chip and a method for making the semiconductor package. The semiconductor chip comprises a metal-oxide-semiconductor field effect transistor. On a die paddle including a first base, a second base and a third base, half-etching or punching is performed on the top surfaces of the first base and the second base to obtain plurality of grooves that divide the top surface of the first base into a plurality of areas comprising multiple first connecting areas, and divide the top surface of the second base into a plurality of areas comprising at least a second connecting area. The semiconductor chip is connected to the die paddle at the first connecting areas and the second connecting area.

Abstract translation: 本发明涉及倒装芯片的半导体封装以及制造半导体封装的方法。 半导体芯片包括金属氧化物半导体场效应晶体管。 在包括第一基底，第二基底和第三基底的裸片上，在第一基底和第二基底的顶表面上进行半蚀刻或冲孔，以获得多个凹槽，该凹槽将第一基底 进入包括多个第一连接区域的多个区域，并且将第二基座的顶表面分成包括至少第二连接区域的多个区域。 半导体芯片在第一连接区域和第二连接区域处连接到管芯焊盘。

公开(公告)号：US20130006927A1

公开(公告)日：2013-01-03

申请号：US13615138

申请日：2012-09-13

Applicant: Brian Brockway ,  Parag Gokhale ,  Jun Lu

Inventor： Brian Brockway ,  Parag Gokhale ,  Jun Lu

IPC: G06F17/30

CPC classification number: G06F17/30309 ,  G06F7/00 ,  G06F11/14 ,  G06F11/1448 ,  G11C2029/0409 ,  Y10S707/99955

Abstract: A system and method are provided for verifying data copies and reverifying the copies over the life span of media according to a verification policy. Characteristics of media and use of media are tracked to provide metrics which may be used to dynamically reevaluate and reassign verification policies to optimize media usage. Copies that fail verification operations may be repaired by repeating a storage operation for recent copies or by substituting a close temporal copy of the failed copy.

Abstract translation: 提供了一种系统和方法，用于根据验证策略验证数据副本并在媒体的使用寿命内重新验证副本。 跟踪媒体的特点和媒体的使用情况，提供可用于动态重新评估和重新分配验证策略以优化媒体使用情况的指标。 可以通过对最近的副本重复存储操作或通过替换失败副本的紧密暂时副本来修复失败验证操作的副本。