CMOS STORAGE DEVICES CONFIGURABLE IN HIGH PERFORMANCE MODE OR RADIATION TOLERANT MODE
    83.
    发明申请
    CMOS STORAGE DEVICES CONFIGURABLE IN HIGH PERFORMANCE MODE OR RADIATION TOLERANT MODE 有权
    CMOS存储设备可配置在高性能模式或辐射容限模式

    公开(公告)号:US20090059657A1

    公开(公告)日:2009-03-05

    申请号:US11845170

    申请日:2007-08-27

    IPC分类号: G11C11/00 H01L47/00

    CPC分类号: G11C11/4125 G11C13/0004

    摘要: A radiation tolerant circuit, structure of the circuit and method of autonomic radiation event device protection. The circuit includes a charge storage node connected to a resistor, the resistor comprising a material having an amorphous state and a crystalline state, the amorphous state having a higher resistance than the crystalline state, the material reversibly convertible between the amorphous state and the crystalline state by application of heat; an optional resistive heating element proximate to the resistor; and means for writing data to the charge storage node and means for reading data from the charge storage node.

    摘要翻译: 辐射耐受电路,电路结构及自主辐射事件装置保护方法。 电路包括连接到电阻器的电荷存储节点,该电阻器包括具有非晶状态和结晶状态的材料,非晶状态具有比结晶状态更高的电阻,该材料可在非晶状态和结晶态之间可逆地转换 通过应用热量; 靠近电阻器的可选电阻加热元件; 以及用于向电荷存储节点写入数据的装置和用于从电荷存储节点读取数据的装置。

    COMPUTER PROGRAM PRODUCTS FOR DETERMINING STOPPING POWERS OF DESIGN STRUCTURES WITH RESPECT TO A TRAVELING PARTICLE
    84.
    发明申请
    COMPUTER PROGRAM PRODUCTS FOR DETERMINING STOPPING POWERS OF DESIGN STRUCTURES WITH RESPECT TO A TRAVELING PARTICLE 有权
    计算机程序产品用于确定相对于旅行颗粒的设计结构的停止功能

    公开(公告)号:US20080201681A1

    公开(公告)日:2008-08-21

    申请号:US12111529

    申请日:2008-04-29

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5009 G06F2217/16

    摘要: A computer program product, comprising a computer usable medium having a computer readable program code embodied therein, said computer readable program code including an algorithm adapted to implement a method including the following steps. First, design information of the design structure is provided including a back-end-of-line layer of the integrated circuit which includes N interconnect layers, N being a positive integer. Next, each interconnect layer of the N interconnect layers is divided into multiple pixels. Next, a first path of a traveling particle in a first interconnect layer of the N interconnect layers is determined. Next, M path pixels of the multiple pixels of the first interconnect layer on the first path of the traveling particle are identified, M being a positive integer. Next, a first loss energy lost by the traveling particle due to its completely passing through a first pixel of the M path pixels is determined.

    摘要翻译: 一种计算机程序产品,包括具有包含在其中的计算机可读程序代码的计算机可用介质,所述计算机可读程序代码包括适于实现包括以下步骤的方法的算法。 首先,提供设计结构的设计信息,其包括包括N个互连层的集成电路的后端行层,N是正整数。 接下来,N个互连层的每个互连层被分成多个像素。 接下来,确定N个互连层的第一互连层中的行进粒子的第一路径。 接下来,识别行进粒子的第一路径上的第一互连层的多个像素的M个路径像素,M是正整数。 接下来,确定由于行进粒子完全通过M路径像素的第一像素而损失的第一损失能量。

    Homogeneous Copper Interconnects for BEOL
    86.
    发明申请
    Homogeneous Copper Interconnects for BEOL 审中-公开
    BEOL的均匀铜互连

    公开(公告)号:US20080156636A1

    公开(公告)日:2008-07-03

    申请号:US11971488

    申请日:2008-01-09

    IPC分类号: C23C14/16

    摘要: Defects on the edge of copper interconnects for back end of the line semiconductor devices are alleviated by an interconnect that comprises an impure copper seed layer. The impure copper seed layer covers a barrier layer, which covers an insulating layer that has an opening. Electroplated copper fills the opening in the insulating layer. Through a chemical mechanical polish, the barrier layer, the impure an impure copper seed layer derived from an electroplated copper bath copper seed layer, and the electroplated copper are planarized to the insulating layer.

    摘要翻译: 通过包括不纯铜种子层的互连可以减轻线半导体器件后端的铜互连边缘的缺陷。 不纯铜种子层覆盖阻挡层,其覆盖具有开口的绝缘层。 电镀铜填充绝缘层中的开口。 通过化学机械抛光,阻挡层,不纯的由电镀铜浴铜籽晶层衍生的铜籽晶层和电镀铜平坦化到绝缘层。