公开(公告)号：US20100093512A1

公开(公告)日：2010-04-15

申请号：US12520374

申请日：2007-12-20

申请人： Kazuhiro Nishikawa ,  Koji Tominaga

发明人： Kazuhiro Nishikawa ,  Koji Tominaga

IPC分类号： C03C3/066 ,  C03C3/064

CPC分类号： H01J11/34 ,  C03C8/22 ,  C03C8/24 ,  H01J5/04

摘要： There is provided a glass ceramic material for plasma display, in which glass fine grains (A) having a softening point of 570-640° C. are in 40-70 wt %, and glass fine grains (B) having a softening point of 480-540° C. are in 30-60 wt %, the glass ceramic material for plasma display being characterized in that the glass fine grains (A) comprise 2-12 wt % of SiO2, 50-58 wt % of B2O3, 10-20 wt % of Al2O3, 0-6 wt % of ZnO, 0-2.8 wt % of Li2O, and 10-22 wt % of at least one selected from MgO, CaO, SrO and BaO and that refractive index of the glass fine grains (A) is 1.53-1.56.

摘要翻译： 提供了一种用于等离子显示器的玻璃陶瓷材料，其中软化点为570-640℃的玻璃细晶粒（A）为40-70重量％，玻璃细晶粒（B）的软化点为 480-540℃为30-60重量％，用于等离子体显示的玻璃陶瓷材料的特征在于，玻璃细晶粒（A）包含2-12重量％的SiO 2，50-58重量％的B 2 O 3，10 -20重量％的Al 2 O 3，0-6重量％的ZnO，0-2.8重量％的Li 2 O和10-22重量％的选自MgO，CaO，SrO和BaO中的至少一种，并且玻璃的折射率精细 颗粒（A）为1.53-1.56。

公开(公告)号：US20090233785A1

公开(公告)日：2009-09-17

申请号：US12063494

申请日：2005-08-11

申请人： Takeshi Shimada ,  Kei Matsumoto ,  Koichi Terao ,  Kazuya Toji ,  Kazuhiro Nishikawa

发明人： Takeshi Shimada ,  Kei Matsumoto ,  Koichi Terao ,  Kazuya Toji ,  Kazuhiro Nishikawa

IPC分类号： C04B35/468

CPC分类号： C04B35/4682 ,  C04B35/6262 ,  C04B35/62685 ,  C04B2235/3201 ,  C04B2235/3203 ,  C04B2235/3208 ,  C04B2235/3215 ,  C04B2235/3224 ,  C04B2235/3227 ,  C04B2235/3232 ,  C04B2235/3234 ,  C04B2235/3251 ,  C04B2235/3293 ,  C04B2235/3294 ,  C04B2235/3298 ,  C04B2235/3418 ,  C04B2235/5436 ,  C04B2235/5445 ,  C04B2235/652 ,  C04B2235/6585 ,  H01G4/1227

摘要： The invention intends to provide, in BaTiO3 semiconductor porcelain composition, a semiconductor porcelain composition that, without using Pb, can shift the Curie temperature to a positive direction and can significantly reduce the resistivity at room temperature. According to the invention, when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ba is further substituted by a specific amount of a Q element, or when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ti is partially substituted by a specific amount of an M element, the optimal valence control can be applied and whereby the resistivity at room temperature can be significantly reduced. Accordingly, it is optimal for applications in a PTC thermistor, a PTC heater, a PTC switch, a temperature detector and the like, and particularly preferably in an automobile heater.

摘要翻译： 本发明意图在BaTiO3半导体陶瓷组合物中提供一种半导体瓷组合物，其不使用Pb可以将居里温度转移到正方向并且可以显着降低室温下的电阻率。 根据本发明，当Ba被Al元素（至少一种Na，K和Li）和A2元素（Bi）部分取代时，Ba进一步被特定量的Q元素取代，或者当Ba 部分被A1元素（Na，K和Li中的至少一种）和A2元素（Bi）部分取代，Ti被特定量的M元素部分取代，可以应用最佳价态控制， 室温下的电阻率可以显着降低。 因此，对于PTC热敏电阻，PTC加热器，PTC开关，温度检测器等中的应用，特别优选在汽车加热器中是最佳的。

公开(公告)号：US20090148019A1

公开(公告)日：2009-06-11

申请号：US12064430

申请日：2006-02-21

申请人： Kazuo Hamada ,  Kazuhiro Nishikawa

发明人： Kazuo Hamada ,  Kazuhiro Nishikawa

IPC分类号： G06K9/00

CPC分类号： G06T3/4053 ,  A61B6/037 ,  G06T7/35 ,  G06T2207/10072 ,  G06T2207/30016 ,  G06T2207/30061

摘要： An image processing method is provided as one for creating a fused image automatically and with high overlapping accuracy.An image processing method according to an embodiment of the present invention includes (a) a voxel normalization step of equalizing voxel sizes and numbers of voxels in respective effective fields of view of a first 3D image based on a plurality of first tomographic images obtained from an arbitrary part of a subject and a second 3D image based on a plurality of second tomographic images obtained from the same part, thereby creating a first normalized 3D image corresponding to the first 3D image and a second normalized 3D image corresponding to the second 3D image; and (b) a fused image creation step of creating a fused image, using the first normalized 3D image and the second normalized 3D image.

摘要翻译： 提供了一种图像处理方法，用于自动和高重叠精度地创建融合图像。 根据本发明的实施例的图像处理方法包括：（a）体素归一化步骤，用于基于从第一3D图像获得的多个第一断层图像来均衡第一3D图像的各有效视场中的体素大小和体素数， 基于从相同部分获得的多个第二断层图像，从而创建与第一3D图像相对应的第一归一化3D图像和对应于第二3D图像的第二归一化3D图像的主体的任意部分和第二3D图像; 和（b）使用第一标准化3D图像和第二标准化3D图像来创建融合图像的融合图像创建步骤。

公开(公告)号：US07353600B2

公开(公告)日：2008-04-08

申请号：US10940933

申请日：2004-09-15

申请人： Norihito Tsukahara ,  Kazuhiro Nishikawa ,  Daisuke Sakurai

发明人： Norihito Tsukahara ,  Kazuhiro Nishikawa ,  Daisuke Sakurai

IPC分类号： H05K3/00 ,  H05K3/12

CPC分类号： H05K3/005 ,  H05K3/0011 ,  H05K3/4015 ,  H05K3/4644 ,  H05K2201/0108 ,  H05K2201/083 ,  H05K2201/10242 ,  H05K2203/0108 ,  H05K2203/104 ,  H05K2203/1189 ,  H05K2203/308 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49162 ,  Y10T29/49165

摘要： A circuit board fabrication method including: forming first conductive interconnection 2 onto insulator substrate 1; applying resin film 41, which is to be interlevel insulator layer 42 for electrically insulating first conductive interconnection 2 and second conductive interconnection 6, onto insulator substrate 1; either making pillar-like member 3 stand on a prescribed position on first conductive interconnection 2 before applying resin film 41, or press fitting pillar-like member 3 into resin film 41 so as to reach either a surface vicinity of first conductive interconnection 2 or a portion of first conductive interconnection 2 after applying resin film 41; hardening resin film 41 to form interlevel insulator layer 42; pulling out pillar-like member 3 to form opening 5 in interlevel insulator layer 42; and forming second conductive interconnection 6 onto interlevel insulator layer 42 to include opening 5.

摘要翻译： 一种电路板制造方法，包括：在绝缘体基板1上形成第一导电布线2; 将用于将第一导电互连2和第二导电互连6电绝缘的层间绝缘体层42的树脂膜41施加到绝缘体基板1上; 在施加树脂膜41之前，使柱状构件3立在第一导电布线2的规定位置上，或者将柱状构件3压入树脂膜41中，以到达第一导电布线2的附近或第 在施加树脂膜41之后的第一导电互连2的部分; 硬化树脂膜41以形成层间绝缘体层42; 拉出柱状构件3以在层间绝缘体层42中形成开口5; 以及在层间绝缘体层42上形成第二导电布线6以包括开口5。

公开(公告)号：US20070127224A1

公开(公告)日：2007-06-07

申请号：US11699433

申请日：2007-01-30

申请人： Norihito Tsukahara ,  Kazuhiro Nishikawa

发明人： Norihito Tsukahara ,  Kazuhiro Nishikawa

IPC分类号： H01L21/8242

CPC分类号： H01L24/83 ,  H01L21/563 ,  H01L24/11 ,  H01L24/29 ,  H01L24/31 ,  H01L24/81 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/1148 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3011 ,  H05K3/305 ,  H05K3/321 ,  H05K2201/10378 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/4921 ,  H01L2924/00 ,  H01L2924/00014

摘要： An electronic component having connection terminals on one side thereof is bonded to a circuit board via an adhesive sheet having through-holes. The connection terminals on the electronic component are connected to electrode pads provided on the circuit board via a conductive adhesive in the through-holes. Thus, an electronic circuit device is formed. Using a polymeric resin film sheet for the circuit board and mounting an electronic component, e.g. an LSI, onto the circuit board can provide a small, light, thin, and inexpensive electronic circuit device.

摘要翻译： 在其一侧具有连接端子的电子部件通过具有通孔的粘合片与电路板接合。 电子部件上的连接端子通过通孔中的导电粘合剂连接到设置在电路板上的电极焊盘。 因此，形成电子电路装置。 使用用于电路板的聚合物树脂膜片和安装电子部件，例如， 电路板上的LSI可以提供小型，轻便，薄型和廉价的电子电路装置。

公开(公告)号：US20050275088A1

公开(公告)日：2005-12-15

申请号：US11147864

申请日：2005-06-08

申请人： Daisuke Sakurai ,  Kazuhiro Nishikawa ,  Norihito Tsukahara

发明人： Daisuke Sakurai ,  Kazuhiro Nishikawa ,  Norihito Tsukahara

IPC分类号： H01L21/98 ,  H01L23/48 ,  H01L23/538 ,  H01L25/065 ,  H01R4/58 ,  H05K1/18

CPC分类号： H01L25/50 ,  H01L23/5384 ,  H01L23/5387 ,  H01L23/5389 ,  H01L24/97 ,  H01L25/0652 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/06593 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3011 ,  H05K1/185 ,  H05K1/189 ,  H05K2201/055 ,  H01L2924/00014 ,  H01L2924/00

摘要： Thinning and stacking are essential for circuit modules used for mobile devices of various kinds, smart cards, memory cards and the like. These demands make the manufacture of the circuit modules more complicated or less reliable due to delamination. A circuit module of a multilayer structure is provided which is formed by embedding semiconductor chips and passive components in a sheet made from a thermoplastic resin; folding a module sheet, which is formed of circuit blocks provided with wiring patterns thereon, at the boundaries of the circuit blocks so as to be stacked into layers; and thermal-bonding and integrating the module sheet by applying heat and pressure. As a result, a highly reliable circuit module can be manufactured in a simple manner.

摘要翻译： 变薄和堆叠对于用于各种移动设备，智能卡，存储卡等的电路模块是必不可少的。 这些要求使得电路模块的制造由于分层而更复杂或更不可靠。 提供了一种多层结构的电路模块，其通过将半导体芯片和无源部件嵌入由热塑性树脂制成的片材中而形成; 在电路块的边界处折叠由在其上设置有布线图案的电路块形成的模块片，以堆叠成层; 并通过施加热和压力进行热粘合和集成模块片。 结果，可以以简单的方式制造高可靠性的电路模块。

公开(公告)号：US20050168961A1

公开(公告)日：2005-08-04

申请号：US10985325

申请日：2004-11-10

申请人： Masahiro Ono ,  Shigeru Kondo ,  Kazuhiro Nishikawa ,  Yoshihiko Yagi ,  Kazuto Nishida

发明人： Masahiro Ono ,  Shigeru Kondo ,  Kazuhiro Nishikawa ,  Yoshihiko Yagi ,  Kazuto Nishida

IPC分类号： H01L23/538 ,  H01L25/065 ,  H05K1/00 ,  H05K1/14 ,  H05K1/18 ,  H05K3/34 ,  H05K3/36 ,  H05K3/40 ,  H05K1/11

CPC分类号： H05K1/183 ,  H01L23/5385 ,  H01L25/0652 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06572 ,  H01L2924/09701 ,  H01L2924/15156 ,  H01L2924/15192 ,  H01L2924/1627 ,  H01L2924/181 ,  H01L2924/3025 ,  H05K1/0284 ,  H05K1/141 ,  H05K1/144 ,  H05K1/145 ,  H05K3/3442 ,  H05K3/368 ,  H05K3/403 ,  H05K2201/09036 ,  H05K2201/10446 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2203/1572 ,  Y02P70/611 ,  H01L2924/00012

摘要： A stereoscopically connected structure is made up of a first circuit board and a second circuit board which are mounted with other electronic components, and a relay board having a recess which is mounted with an electronic component and is provided with a lead-out wiring extending from the electronic component, and also having a land part to be connected with the lead-out wiring on one of the surfaces of the relay board that face the first circuit board and second circuit board. Thus the relay board can mount the electronic component thereon as well as connect the first circuit board and the second circuit board, thereby achieving high density mounting.

摘要翻译： 立体连接的结构由安装有其他电子部件的第一电路板和第二电路板构成，以及具有安装有电子部件的凹部的中继板，并且设置有从 电子部件，并且还具有与继电器板的面对第一电路板和第二电路板的一个表面上的引出布线连接的焊盘部分。 因此，继电器板可以在其上安装电子部件，并且连接第一电路板和第二电路板，从而实现高密度安装。

公开(公告)号：US20050079707A1

公开(公告)日：2005-04-14

申请号：US10947177

申请日：2004-09-23

申请人： Norihito Tsukahara ,  Kazuhiro Nishikawa ,  Daisuke Sakurai

发明人： Norihito Tsukahara ,  Kazuhiro Nishikawa ,  Daisuke Sakurai

IPC分类号： H05K1/09 ,  H01B5/14 ,  H05K3/12 ,  H05K3/24 ,  H01L21/00 ,  H01L21/4763 ,  H01L21/84

CPC分类号： H05K3/247 ,  H01L2924/0002 ,  H05K1/095 ,  H05K2201/0266 ,  H05K2201/035 ,  H01L2924/00

摘要： An interconnection substrate include: interconnection layer 12 region where at least first conductor layer 16 and second conductor layer 18 are vertically stacked in that order on substrate 10, first conductor layer 16 and second conductor layer 18 containing conductive particles and a binder, wherein first conductor layer 16 and second conductor layer 18 stacked in the interconnection layer 12 region have conductive particles different in average particle size from each other. As a result, only intended region can have low resistance.

摘要翻译： 互连基板包括：互连层12，其中至少第一导体层16和第二导体层18在基板10上依次垂直堆叠，第一导体层16和包含导电颗粒和粘合剂的第二导体层18，其中第一导体 堆叠在互连层12区域中的层16和第二导体层18具有彼此平均粒径不同的导电粒子。 结果，只有预期的区域可以具有低电阻。

公开(公告)号：US20050060886A1

公开(公告)日：2005-03-24

申请号：US10940933

申请日：2004-09-15

申请人： Norihito Tsukahara ,  Kazuhiro Nishikawa ,  Daisuke Sakurai

发明人： Norihito Tsukahara ,  Kazuhiro Nishikawa ,  Daisuke Sakurai

IPC分类号： H05K3/46 ,  H05K3/00 ,  G03C5/00

CPC分类号： H05K3/005 ,  H05K3/0011 ,  H05K3/4015 ,  H05K3/4644 ,  H05K2201/0108 ,  H05K2201/083 ,  H05K2201/10242 ,  H05K2203/0108 ,  H05K2203/104 ,  H05K2203/1189 ,  H05K2203/308 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49162 ,  Y10T29/49165

摘要： A circuit board fabrication method comprising the steps of: forming first conductive interconnection 2 onto insulator substrate 1; applying resin film 41, which is to be interlevel insulator layer 42 for electrically insulating first conductive interconnection 2 and second conductive interconnection 6, onto insulator substrate 1; either making pillar-like member 3 stand on a prescribed position on first conductive interconnection 2 before applying resin film 41, or press fitting pillar-like member 3 into resin film 41 in such a manner as to reach either a surface vicinity of first conductive interconnection 2 or a portion of first conductive interconnection 2 after applying resin film 41; hardening resin film 41 to form interlevel insulator layer 42; pulling out pillar-like member 3 to form opening 5 in interlevel insulator layer 42; and (f) forming second conductive interconnection 6 onto interlevel insulator layer 42 in such a manner as to include opening 5.

摘要翻译： 一种电路板制造方法，包括以下步骤：在绝缘体基板1上形成第一导电布线2; 将用于将第一导电互连2和第二导电互连6电绝缘的层间绝缘体层42的树脂膜41施加到绝缘体基板1上; 在施加树脂膜41之前，使柱状构件3在第一导电布线2上的规定位置上立起，或者将柱状构件3按压到树脂膜41中，使其到达第一导电互连 2或第一导电互连2的一部分; 硬化树脂膜41以形成层间绝缘体层42; 拉出柱状构件3以在层间绝缘体层42中形成开口5; 和（f）以包括开口5的方式在层间绝缘体层42上形成第二导电布线6。

公开(公告)号：US5668576A

公开(公告)日：1997-09-16

申请号：US537816

申请日：1995-10-24

申请人： Kenichirou Ikura ,  Kazuhiro Nishikawa

发明人： Kenichirou Ikura ,  Kazuhiro Nishikawa

IPC分类号： G06F3/033 ,  G06F3/041 ,  G06F3/045 ,  G09G5/00

CPC分类号： G06F3/045 ,  G06F3/0414

摘要： A transparent touch panel includes a movable electrode film which is transparent and flexible, a hard coating layer which is transparent and formed on an upper surface of the movable electrode film, a movable electrode which is transparent and formed over a lower surface of the movable electrode film, a contractible resin layer which is transparent and formed between the movable electrode film and the movable electrode in correspondence to the hard coating layer, a fixed electrode-supporting member disposed in opposition to the lower surface of the movable electrode film, a fixed electrode formed on an upper surface of the fixed electrode-supporting member opposed to the lower surface of the movable electrode film, and spacers formed between the lower surface of the movable electrode film where the movable electrode is formed and the upper surface of the fixed electrode-supporting member where the fixed electrode is formed.

摘要翻译： PCT No.PCT / JP94 / 00719 Sec。 371日期1995年10月24日第 102（e）1995年10月24日PCT PCT 1994年4月28日PCT公布。 公开号WO94 / 25916 PCT 日期：1994年11月10日透明触摸面板包括透明柔性的可动电极膜，透明并形成在可动电极膜的上表面上的硬涂层，透明并形成在下面的可动电极 可动电极膜的表面，对应于硬涂层而透明并形成在可动电极膜和可动电极之间的可收缩树脂层，与可动电极的下表面相对设置的固定电极支撑件 膜，形成在与可动电极膜的下表面相对的固定电极支撑构件的上表面上的固定电极，以及形成在可动电极膜的形成有可动电极的下表面之间的间隔物， 的固定电极支撑部件。