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公开(公告)号:US09508715B1
公开(公告)日:2016-11-29
申请号:US14817217
申请日:2015-08-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Chien-Ting Lin , Shih-Hung Tsai , Ssu-I Fu , Hon-Huei Liu , Jyh-Shyang Jenq
IPC: H01L27/088 , H01L21/8234
CPC classification number: H01L27/0886 , H01L21/823425 , H01L21/823431
Abstract: The present invention provides a semiconductor structure including a substrate, having a recess disposed thereon. Two first protruding portions are disposed on two sides of the recess respectively, an epitaxial layer is disposed in the recess, and an insulating layer is disposed on the substrate. A top portion of the first protruding portion is higher than a top surface of the insulating layer.
Abstract translation: 本发明提供一种包括基板的半导体结构,其上设置有凹部。 两个第一突出部分分别设置在凹槽的两侧,外延层设置在凹槽中,绝缘层设置在基板上。 第一突出部的顶部高于绝缘层的顶面。
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公开(公告)号:US09502252B2
公开(公告)日:2016-11-22
申请号:US14637400
申请日:2015-03-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Chao-Hung Lin , Hon-Huei Liu , Shih-Fang Hong , Jyh-Shyang Jenq
IPC: H01L21/225 , H01L21/8238 , H01L21/324 , H01L27/092
CPC classification number: H01L21/823821 , H01L21/2255 , H01L21/2256 , H01L21/324 , H01L21/823807 , H01L21/823814 , H01L21/823892 , H01L27/0924 , H01L29/66803 , H01L29/7851
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least one fin-shaped structure thereon, in which the fin-shaped structure comprises a top portion and a bottom portion; and forming a doped layer and a first liner around the bottom portion of the fin-shaped structure.
Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤:提供其上具有至少一个鳍状结构的基底,其中鳍状结构包括顶部和底部; 以及围绕所述鳍状结构的底部部分形成掺杂层和第一衬垫。
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公开(公告)号:US20160322366A1
公开(公告)日:2016-11-03
申请号:US14724775
申请日:2015-05-28
Applicant: United Microelectronics Corp.
Inventor: Chih-Kai Hsu , Chao-Hung Lin , Yu-Hsiang Hung , Ssu-I Fu , Jyh-Shyang Jenq
CPC classification number: H01L27/1104 , H01L27/0207
Abstract: A static random access memory (SRAM) is disclosed. The SRAM includes a plurality of SRAM cells on a substrate, in which each of the SRAM cells comprises: a gate structure on the substrate; a first interlayer dielectric (ILD) layer around the gate structure; a first contact plug in the first ILD layer; a second ILD layer on the first ILD layer; and a second contact plug in the second ILD layer and electrically connected to the first contact plug.
Abstract translation: 公开了一种静态随机存取存储器(SRAM)。 SRAM包括在衬底上的多个SRAM单元,其中每个SRAM单元包括:衬底上的栅极结构; 围绕栅极结构的第一层间电介质(ILD)层; 第一ILD层中的第一接触插塞; 第一ILD层上的第二ILD层; 以及在所述第二ILD层中的第二接触插塞,并且电连接到所述第一接触插塞。
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公开(公告)号:US09455194B1
公开(公告)日:2016-09-27
申请号:US14864852
申请日:2015-09-24
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Chien-Ting Lin , Shih-Hung Tsai , Ssu-I Fu , Hon-Huei Liu , Shih-Fang Hong , Chao-Hung Lin , Jyh-Shyang Jenq
IPC: H01L21/461 , H01L21/8234 , H01L21/3065 , H01L21/308
CPC classification number: H01L21/823412 , H01L21/3086 , H01L21/823431
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region and a second region defined thereon; forming a material layer on the substrate; forming a plurality of first mandrels on the material layer of the first region and the second region; forming first spacers adjacent to the first mandrels; forming a hard mask on the first region; trimming the first spacers on the second region; removing the first mandrels; using the first spacers to remove part of the material layer for forming a plurality of second mandrels; forming second spacers adjacent to the second mandrels; removing the second mandrels; and using the second spacers to remove part of the substrate for forming a plurality of fin-shaped structures.
Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤:提供具有限定在其上的第一区域和第二区域的衬底; 在所述基板上形成材料层; 在所述第一区域和所述第二区域的材料层上形成多个第一心轴; 形成与所述第一心轴相邻的第一间隔件; 在第一区域上形成硬掩模; 修剪第二区域上的第一间隔物; 去除第一个心轴; 使用所述第一间隔件去除用于形成多个第二心轴的所述材料层的一部分; 形成与所述第二心轴相邻的第二间隔件; 移除第二个心轴; 并且使用第二间隔件去除用于形成多个鳍状结构的基板的一部分。
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公开(公告)号:US20160247678A1
公开(公告)日:2016-08-25
申请号:US14629491
申请日:2015-02-24
Applicant: United Microelectronics Corp.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Chao-Hung Lin , Hon-Huei Liu , An-Chi Liu , Chih-Wei Wu , Jyh-Shyang Jenq , Shih-Fang Hong , En-Chiuan Liou , Ssu-I Fu , Yu-Hsiang Hung , Chih-Kai Hsu , Mei-Chen Chen , Chia-Hsun Tseng
IPC: H01L21/033 , H01L21/66
CPC classification number: H01L21/0337 , H01L21/0338 , H01L21/3083 , H01L21/3086 , H01L21/3088 , H01L21/823431 , H01L22/12
Abstract: A method of forming a semiconductor structure includes following steps. First of all, a patterned hard mask layer having a plurality of mandrel patterns is provided. Next, a plurality of first mandrels is formed on a substrate through the patterned hard mask. Following these, at least one sidewall image transferring (SIT) process is performed. Finally, a plurality of fins is formed in the substrate, wherein each of the fins has a predetermined critical dimension (CD), and each of the mandrel patterns has a CD being 5-8 times greater than the predetermined CD.
Abstract translation: 形成半导体结构的方法包括以下步骤。 首先,提供具有多个心轴图案的图案化的硬掩模层。 接下来,通过图案化的硬掩模在基板上形成多个第一心轴。 接下来,执行至少一个侧壁图像传送(SIT)处理。 最后,在基板上形成多个散热片,其中每个翅片具有预定的临界尺寸(CD),并且每个心轴图案具有比预定CD大5-8倍的CD。
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公开(公告)号:US20160203982A1
公开(公告)日:2016-07-14
申请号:US14636200
申请日:2015-03-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chao-Hung Lin , Shih-Fang Hong , Li-Wei Feng , Shih-Hung Tsai , Ssu-I Fu , Jyh-Shyang Jenq
IPC: H01L21/033 , H01L21/311
CPC classification number: H01L21/3086 , H01L21/3081
Abstract: The present invention provides a method for forming trenches. First, a mandrel layer is formed on a substrate, wherein the mandrel layer comprises a stop layer and a sacrificial layer. A spacer is formed on at least a sidewall of the mandrel layer, following by forming a material layer on the substrate for covering the spacer and the mandrel layer. After performing a removing process to remove apart of the material layer, apart of the spacer and the sacrificial layer; the spacer is removed to form at least one first trench in the remaining material layer and the mandrel.
Abstract translation: 本发明提供一种形成沟槽的方法。 首先,在基板上形成心轴层,其中心轴层包括停止层和牺牲层。 在心轴层的至少一个侧壁上形成间隔物,然后在衬底上形成用于覆盖间隔物和心轴层的材料层。 在执行去除处理以除去材料层之外的间隔物和牺牲层的间隔; 去除间隔物以在剩余材料层和心轴中形成至少一个第一沟槽。
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公开(公告)号:US09384978B1
公开(公告)日:2016-07-05
申请号:US14636200
申请日:2015-03-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chao-Hung Lin , Shih-Fang Hong , Li-Wei Feng , Shih-Hung Tsai , Ssu-I Fu , Jyh-Shyang Jenq
IPC: H01L21/76 , H01L21/033 , H01L21/311
CPC classification number: H01L21/3086 , H01L21/3081
Abstract: The present invention provides a method for forming trenches. First, a mandrel layer is formed on a substrate, wherein the mandrel layer comprises a stop layer and a sacrificial layer. A spacer is formed on at least a sidewall of the mandrel layer, following by forming a material layer on the substrate for covering the spacer and the mandrel layer. After performing a removing process to remove apart of the material layer, apart of the spacer and the sacrificial layer; the spacer is removed to form at least one first trench in the remaining material layer and the mandrel.
Abstract translation: 本发明提供一种形成沟槽的方法。 首先,在基板上形成心轴层,其中心轴层包括停止层和牺牲层。 在心轴层的至少一个侧壁上形成间隔物,然后在衬底上形成用于覆盖间隔物和心轴层的材料层。 在执行去除处理以除去材料层之外的间隔物和牺牲层的间隔; 去除间隔物以在剩余材料层和心轴中形成至少一个第一沟槽。
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公开(公告)号:US09379119B1
公开(公告)日:2016-06-28
申请号:US14749623
申请日:2015-06-24
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chun-Hsien Huang , Yu-Tse Kuo , Shu-Ru Wang , Yu-Hsiang Hung , Ssu-I Fu , Chih-Kai Hsu , Jyh-Shyang Jenq
IPC: H01L23/48 , H01L27/11 , H01L23/522 , H01L23/528 , H01L27/088 , H01L27/02 , H01L27/092
CPC classification number: H01L27/1104 , H01L27/0207 , H01L27/0886 , H01L27/0924
Abstract: A static random access memory (SRAM) is disclosed. The SRAM includes a plurality of SRAM cells on a substrate, in which each of the SRAM cells further includes: a gate structure on the substrate, a plurality of fin structures disposed on the substrate, where each fin structure is arranged perpendicular to the arrangement direction of the gate structure, a first interlayer dielectric (ILD) layer around the gate structure, a first contact plug in the first ILD layer, where the first contact plug is strip-shaped and contacts two different fin structures; and a second ILD layer on the first ILD layer.
Abstract translation: 公开了一种静态随机存取存储器(SRAM)。 SRAM包括在衬底上的多个SRAM单元,其中每个SRAM单元还包括:衬底上的栅极结构,设置在衬底上的多个鳍结构,其中每个鳍结构垂直于排列方向排列 栅极结构周围的第一层间电介质(ILD)层,第一ILD层中的第一接触插塞,其中第一接触插塞为带状并接触两个不同的翅片结构; 和第一ILD层上的第二ILD层。
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公开(公告)号:US09318334B2
公开(公告)日:2016-04-19
申请号:US14469606
申请日:2014-08-27
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yu-Hsiang Hung , Ssu-I Fu , Shih-Hung Tsai , Jyh-Shyang Jenq , Chih-Kai Hsu
IPC: H01L21/336 , H01L21/28 , H01L29/66 , H01L21/8234 , H01L21/8238 , H01L27/088 , H01L29/78 , H01L27/092 , H01L21/308
CPC classification number: H01L21/28132 , H01L21/0337 , H01L21/28035 , H01L21/28158 , H01L21/3086 , H01L21/32139 , H01L21/823431 , H01L21/823821 , H01L27/0886 , H01L27/0924 , H01L29/6656 , H01L29/66795 , H01L29/785
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region and a second region defined thereon; forming a plurality of fin-shaped structures on the substrate; forming a gate layer on the fin-shaped structures; forming a material layer on the gate layer; patterning the material layer for forming sacrificial mandrels on the gate layer in the first region; forming sidewall spacers adjacent to the sacrificial mandrels; removing the sacrificial mandrels; forming a patterned mask on the second region; and utilizing the patterned mask and the sidewall spacers to remove part of the gate layer.
Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤:提供具有限定在其上的第一区域和第二区域的衬底; 在所述基板上形成多个鳍状结构; 在鳍状结构上形成栅极层; 在栅极层上形成材料层; 图案化用于在第一区域中的栅极层上形成牺牲心轴的材料层; 形成与牺牲心轴相邻的侧壁间隔物; 去除牺牲心轴; 在所述第二区域上形成图案化掩模; 并且利用图案化掩模和侧壁间隔物去除栅极层的一部分。
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公开(公告)号:US10546922B2
公开(公告)日:2020-01-28
申请号:US15890320
申请日:2018-02-06
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Ssu-I Fu , Yu-Hsiang Hung , Wei-Chi Cheng , Jyh-Shyang Jenq , Tsung-Mu Yang
IPC: H01L29/06 , H01L29/78 , H01L29/66 , H01L23/535 , H01L21/768 , H01L23/485 , H01L29/08 , H01L29/417 , H01L21/285
Abstract: A method for fabricating semiconductor device is disclosed. First, a substrate is provided, and a gate structure is formed on the substrate. Next, a recess is formed adjacent to two sides of the gate structure, and an epitaxial layer is formed in the recess, in which a top surface of the epitaxial layer is lower than a top surface of the substrate. Next, a cap layer is formed on the epitaxial layer, in which a top surface of the cap layer is higher than a top surface of the substrate.
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