Skew-tolerant reader configurations using cross-track profiles for array-reader based magnetic recording
    82.
    发明授权
    Skew-tolerant reader configurations using cross-track profiles for array-reader based magnetic recording 有权
    使用基于阵列读取器的磁记录的交叉轨道配置的容错读取器配置

    公开(公告)号:US08902536B1

    公开(公告)日:2014-12-02

    申请号:US14252652

    申请日:2014-04-14

    申请人: LSI Corporation

    IPC分类号: G11B21/02

    摘要: A method for enhancing read performance in an ARMR system includes: obtaining a first reader offset profile corresponding to a first reader of a multi-reader array head in the ARMR system; obtaining at least a second reader offset profile corresponding to at least a second reader of the multi-reader array head in the ARMR system; combining the first and second reader offset profiles to generate a combined reader offset profile; and controlling a location of the multi-reader array head in the ARMR system relative to at least one target track associated with a magnetic storage medium to be read as a function of a peak amplitude of the combined reader offset profile.

    摘要翻译: 一种用于增强ARMR系统中的读取性能的方法包括:获得与ARMR系统中的多读取器阵列头的第一读取器相对应的第一读取器偏移曲线; 获得与ARMR系统中的多读取器阵列头的至少第二读取器对应的至少第二读取器偏移轮廓; 组合第一和第二读取器偏移曲线以生成组合的读取器偏移轮廓; 以及控制所述多读取器阵列头在所述ARMR系统中相对于与要被读取的磁存储介质相关联的至少一个目标轨道的位置,作为所述组合的读取器偏移轮廓的峰值幅度的函数。

    SEMICONDUCTOR OPTICAL EMITTING DEVICE WITH LENS STRUCTURE FORMED IN A CAVITY OF A SUBSTRATE OF THE DEVICE
    84.
    发明申请
    SEMICONDUCTOR OPTICAL EMITTING DEVICE WITH LENS STRUCTURE FORMED IN A CAVITY OF A SUBSTRATE OF THE DEVICE 审中-公开
    具有在设备的基底中形成的透镜结构的半导体光学发射器件

    公开(公告)号:US20140348197A1

    公开(公告)日:2014-11-27

    申请号:US13898964

    申请日:2013-05-21

    申请人: LSI Corporation

    发明人: Joseph M. Freund

    IPC分类号: H01L33/58 H01S5/183

    摘要: A semiconductor optical emitting device comprises an at least partially transparent substrate, an active semiconductor structure arranged on a first side of the substrate, and a lens structure formed at least partially within a cavity on a second side of the substrate. Light generated by the active semiconductor structure is emitted through the substrate and the lens structure. The cavity may comprise a bottom surface and a plurality of sidewalls, with the plurality of sidewalls extending upward from the bottom surface to an upper surface of the second side of the substrate, although numerous other cavity shapes are possible. The bottom surface may be convex or concave. The bottom surface and the plurality of sidewalls may form a portion of a sphere with a plane parallel to the upper surface of the second side of the substrate.

    摘要翻译: 半导体发光器件包括至少部分透明的衬底,布置在衬底的第一侧上的有源半导体结构和至少部分地形成在衬底的第二侧上的空腔内的透镜结构。 由有源半导体结构产生的光通过基板和透镜结构发射。 空腔可以包括底表面和多个侧壁,其中多个侧壁从衬底的第二侧的底表面向上延伸到上表面,尽管其它多个腔形也是可能的。 底面可以是凸的或凹的。 底表面和多个侧壁可以形成具有平行于衬底的第二侧的上表面的平面的球体的一部分。

    System and method for key wrapping to allow secure access to media by multiple authorities with modifiable permissions
    85.
    发明授权
    System and method for key wrapping to allow secure access to media by multiple authorities with modifiable permissions 有权
    用于密钥包装的系统和方法,以允许具有可修改权限的多个权限的安全访问媒体

    公开(公告)号:US08891773B2

    公开(公告)日:2014-11-18

    申请号:US13763890

    申请日:2013-02-11

    申请人: LSI Corporation

    IPC分类号: H04L29/06 H04L9/08 G06F21/62

    摘要: Aspects of the disclosure pertain to a system and method for key wrapping via a storage system to allow secure access to media of the system by multiple authorities with modifiable permissions. The keys used to encrypt ranges of the drive are not stored in plaintext and are recoverable using the credentials of an administrator or user with access to that particular range. An outside attacker cannot recover these keys and a malicious user can only recover the keys to the ranges that user is allowed to access. This is maintained while allowing administrators to modify permissions at any time and, while allowing both administrators and users to change their credentials at any time.

    摘要翻译: 本公开的方面涉及通过存储系统进行密钥包装的系统和方法,以允许具有可修改许可的多个权限的系统的媒体的安全访问。 用于加密驱动器范围的密钥不以明文形式存储,并且可以使用访问该特定范围的管理员或用户的凭据进行恢复。 外部攻击者无法恢复这些密钥,恶意用户只能将密钥恢复到允许用户访问的范围。 这是维护的,同时允许管理员随时修改权限,同时允许管理员和用户随时更改其凭据。

    Methods and apparatus for reusing snoop responses and data phase results in a bus controller
    87.
    发明授权
    Methods and apparatus for reusing snoop responses and data phase results in a bus controller 有权
    用于重复使用侦听响应和数据相位的方法和设备导致总线控制器

    公开(公告)号:US08886889B2

    公开(公告)日:2014-11-11

    申请号:US13401022

    申请日:2012-02-21

    IPC分类号: G06F12/08

    摘要: Methods and apparatus are provided for reusing snoop responses and data phase results in a bus controller. A bus controller receives an incoming bus transaction BTR1 corresponding to an incoming cache transaction CTR1 for an entry in at least one cache; issues a snoop request with a cache line address of the incoming bus transaction BTR1 for the entry to a plurality of cache controllers; collects at least one snoop response from the plurality of cache controllers; broadcasts a combined snoop response to the plurality of cache controllers, wherein the combined snoop response is a combination of the snoop responses from the plurality of cache controllers; and broadcasts cache line data from a source cache for the entry during a data phase to the plurality of cache controllers, wherein a subsequent cache transaction CTR2 for the entry is processed based on the broadcast combined snoop response and the broadcast cache line data.

    摘要翻译: 提供了方法和装置,用于在总线控制器中重新使用窥探响应和数据相位结果。 总线控制器接收对应于至少一个高速缓存中的条目的输入高速缓存事务CTR1的输​​入总线事务BTR1; 发出窥探请求,具有用于输入到多个高速缓存控制器的输入总线事务BTR1的高速缓存行地址; 从所述多个高速缓存控制器收集至少一个窥探响应; 向多个高速缓存控制器广播组合侦听响应,其中组合侦听响应是来自多个高速缓存控制器的侦听响应的组合; 并且在数据阶段期间从用于该条目的源高速缓存的多个高速缓存控制器广播高速缓存行数据,其中,基于广播组合侦听响应和广播高速缓存线数据来处理该条目的后续高速缓存事务CTR2。

    Pre-charge tracking of global read lines in high speed SRAM
    89.
    发明授权
    Pre-charge tracking of global read lines in high speed SRAM 有权
    高速SRAM中全局读取线的预充电跟踪

    公开(公告)号:US08879303B2

    公开(公告)日:2014-11-04

    申请号:US13733578

    申请日:2013-01-03

    申请人: LSI Corporation

    摘要: In embodiments of the invention, a memory circuit includes a static random access memory (SRAM), rows of M sense amplifiers, a global read precharge tracking control circuit controlling a precharge of global read lines, a sense amplifier output tracking circuit generating a reset sense amplifier signal for the sense amplifier control circuits, and a read delay circuit generating a trigger signal for the global read precharge tracking control circuit and the sense amplifier output tracking circuit and performing a fixed delay tracking of a read operation in a read cycle. A dummy global read line is coupled to the global read precharge tracking control circuit and returns from a half way to the top of the SRAM forming a tracking dummy global read line that determines a completion of the precharge of the global read lines before the sense amplifiers start discharging the global read lines in the read cycle.

    摘要翻译: 在本发明的实施例中,存储器电路包括静态随机存取存储器(SRAM),M个读出放大器行,控制全局读取线的预充电的全局读取预充电跟踪控制电路,产生复位感测的读出放大器输出跟踪电路 用于读出放大器控制电路的放大器信号,以及产生用于全局读取预充电跟踪控制电路和读出放大器输出跟踪电路的触发信号的读延迟电路,并且在读周期中执行读操作的固定延迟跟踪。 虚拟全局读取线耦合到全局读取预充电跟踪控制电路,并从半路返回到SRAM的顶部,形成跟踪虚拟全局读取线,其确定读出放大器之前的全局读取线的预充电完成 开始读取读取周期中的全局读取行。