摘要:
A network switch suitable for receiving packets of information from and the packets of information to a communications network includes a plurality of physical ports, packet processing functionality and memory. The packet processing functionality operates on information stored in memory to determine the LAG, from among two or more LAGs, over which a packet received by the switch should be correctly forwarded. The switch memory stores a plurality of LAG tables, each one of which can include one or more entries comprising a physical port number and a packet parameter that are used by the packet processing functionality to determinately identify the correct LAG over which to forward a packet.
摘要:
A stacked switch includes two or more individual network switches connected to each other in a ring or daisy chain topology over stacking links, and at least one port on two or more of the individual switches comprising the stacked switch is a member of a LAG configured on the stacked switch. Each of the individual switches comprising the stacked switch include control plane and data plane functionality that operates to maintain switching tables and to process network data ingressing to the switch to determine how to forward the network data through the switch to an egress point. The control functionality included in each of the switches comprising the stacked switch also includes an enhanced ECMP functionality that operates to optimize the use of stacking link bandwidth on the stacking links connecting the two or more individual switches to each other.
摘要:
A circuit board comprises a center segment distributing power and low-speed signaling, and outer segments for high-speed signaling. The segments use dielectric materials with different dielectric constants, with the outer segments supporting higher-speed signal transmission.
摘要:
A packet network device such as a network switch includes a number of functional cards or chassis modules at least some of which are connected to both an electrical backplane and a wireless backplane. The electrical backplane provides data plane signal paths and the wireless backplane provides control plane signal paths.
摘要:
Plated through holes pass through clearances in a ground plane of a circuit board. A conductive collar/spoke arrangement is constructed on the ground plane adjacent the clearance, to provide an inductive component to the coupling between a plated through hole and the ground plane. The inductive component impedes the transfer of high-frequency noise between the through hole and the ground plane. Other embodiments are also described and claimed.
摘要:
A high-speed router backplane is disclosed. The router backplane uses differential signal pairs on multiple signal layers, each sandwiched between a pair of digital ground layers. Thru-holes are used to connect the differential signal pairs to external components. To reduce routing complexity, at least some of the differential signal pairs route through a via pair, somewhere along their path, to a different signal layer. At least some of the thru-holes and vias are drilled to reduce an electrically conductive stub length portion of the hole. The drilled portion of a hole includes a transition from a first profile to a second profile to reduce radio frequency reflections from the end of the drilled hole.
摘要:
An autonomous system includes at least some packet network devices that are capable of operating in a virtual route aggregation environment and some packet network devices that are not capable of operating in a virtual route aggregation environment. The autonomous system includes at least one egress border router, at least one aggregation router and at least one intermediate router. The egress border router uses an interior border gateway protocol to distribute a label message to the other routers in the autonomous system, the label message including a next hop MAC address associated with either an external router or the egress border router. The egress border router and the intermediate router using information included in the label message to contrast layer 2 table entries and the aggregation router using information included in the label message to construct a layer 3 table entry. The aggregation router receives a packet with a virtual prefix that corresponds to a virtual prefix in a list of virtual prefixes stored by the aggregation router, and routes the packet over a virtual path corresponding to one of the virtual prefixes.
摘要:
A method is disclosed for preventing an unstable BGP Peer from repeatedly initializing unstable BGP connections. In one embodiment, BGP speakers are penalized for causing errors that result in BGP restarts. When a speaker accumulates enough penalty points, its peer notifies it that it has been dampened (prevented from establishing a BGP connection). A memory decay function allows the speaker to automatically attempt a new connection once a given amount of time has passed. The method allows at least two, and possibly more, BGP speakers to avoid network and processor costs from servicing unstable BGP peerings.
摘要:
A dynamic multiple spanning tree protocol is described. In at least one embodiment, this protocol allows for the dynamic creation and destruction of mappings between traffic attributes and spanning tree instances with the spanning tree region. These mappings are determined based on the observation of events in the spanning tree, such as the appearance of a significant traffic stream, not mapped to any spanning tree instance, at an edge port of the region. Other embodiments are also described and claimed.
摘要:
A distributed spanning tree protocol is implemented on a modular packet switch. At least some port-specific spanning tree functionality, for instance a port receive state machine and/or a port transmit state machine, operates on a processor on a line port module. At least some bridge-specific spanning tree functionality operates on a processor on a management or control module. When the spanning tree is stable, the line port module processor handles routine spanning tree “hello” messages without having to involve the control module processor. This arrangement allows the switch to handle large and/or multiple spanning trees and large numbers of bridged ports without overloading the control module processor with routine spanning tree module communications.