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32 条记录 (耗时 0.019 秒)

    Smartly navigating hierarchical structure strings
    1.
    发明授权
    Smartly navigating hierarchical structure strings 有权
    智能导航层次结构字符串

    公开(公告)号：US09207829B2

    公开(公告)日：2015-12-08

    申请号：US13340567

    申请日：2011-12-29

    申请人： Albert Hsieh ,  Chao Yuan Huang ,  Kee Hooi Yeow ,  Yao Kim Suan ,  Ng Geok Eng ,  Li-chuan Yen

    发明人： Albert Hsieh ,  Chao Yuan Huang ,  Kee Hooi Yeow ,  Li-chuan Yen

    IPC分类号： G06F3/0481 ,  G06F17/30 ,  G06F3/048

    CPC分类号： G06F3/0481

    摘要： A method, device, and computer program product for smartly navigating hierarchical structure strings are provided. The method may include tokenizing a hierarchical structure string by a delimiter, reading a hierarchical path to a string pointed by a pointer device between two adjacent delimiters, and fetching and displaying all available sibling hierarchical paths at the level next to the current level.

    摘要翻译： 提供了用于智能导航分层结构字符串的方法，设备和计算机程序产品。 该方法可以包括通过分隔符标记分层结构字符串，读取到两个相邻分隔符之间由指针设备指向的字符串的分层路径，以及在当前级别旁边的级别获取和显示所有可用的兄弟分级路径。

    Stacked Chip System
    2.
    发明申请
    Stacked Chip System 有权
    堆叠芯片系统

    公开(公告)号：US20140266418A1

    公开(公告)日：2014-09-18

    申请号：US13835055

    申请日：2013-03-15

    申请人： Chao-Yuan Huang ,  Yueh-Feng Ho ,  Ming-Sheng Yang ,  Hwi-Huang Chen

    发明人： Chao-Yuan Huang ,  Yueh-Feng Ho ,  Ming-Sheng Yang ,  Hwi-Huang Chen

    IPC分类号： H01L23/50

    CPC分类号： H01L23/50 ,  H01L23/481 ,  H01L2225/06544 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A stacked chip system is provided to comprise a first chip, a second chip, a first group of through silicon vias (TSVs) connecting the first chip and second chip and comprising at least one first VSS TSV, at least one first VDD TSV, a plurality of first signal TSVs and at least one first redundant TSV and a second group of through silicon vias (TSVs) connecting the first chip and second chip and comprising at least one second VSS TSV, at least one second VDD TSV, a plurality of second signal TSVs and at least one second redundant TSV, wherein all the first group of TSVs are coupled by a first selection circuitry configured to select the at least one first redundant TSV and bypass at least one of the rest of the first group of TSVs, and wherein the at least one first redundant TSV and the at least second redundant TSV are coupled by a second selection circuitry configured to allow one of them to replace the other.

    摘要翻译： 提供堆叠式芯片系统以包括第一芯片，第二芯片，连接第一芯片和第二芯片的第一组直通硅通孔（TSV），并且包括至少一个第一VSS TSV，至少一个第一VDD TSV， 多个第一信号TSV和连接第一芯片和第二芯片的至少一个第一冗余TSV和第二组穿通硅通孔（TSV），并且包括至少一个第二VSS TSV，至少一个第二VDD TSV，多个第二 信号TSV和至少一个第二冗余TSV，其中所有所述第一组TSV由被配置为选择所述至少一个第一冗余TSV并绕过所述第一组TSV的其余部分中的至少一个的第一选择电路耦合，以及 其中所述至少一个第一冗余TSV和所述至少第二冗余TSV由被配置为允许它们中的一个替换另一个的第二选择电路耦合。

    Smartly Navigating Hierarchical Structure Strings
    4.
    发明申请
    Smartly Navigating Hierarchical Structure Strings 有权
    智能浏览分层结构字符串

    公开(公告)号：US20120254775A1

    公开(公告)日：2012-10-04

    申请号：US13340567

    申请日：2011-12-29

    申请人： Albert Hsieh ,  Chao Yuan Huang ,  Kee Hooi Yeow ,  Li-chuan Yen

    发明人： Albert Hsieh ,  Chao Yuan Huang ,  Kee Hooi Yeow ,  Li-chuan Yen

    IPC分类号： G06F3/048

    CPC分类号： G06F3/0481

    摘要： A method, device, and computer program product for smartly navigating hierarchical structure strings are provided. The method may include tokenizing a hierarchical structure string by a delimiter, reading a hierarchical path to a string pointed by a pointer device between two adjacent delimiters, and fetching and displaying all available sibling hierarchical paths at the level next to the current level.

    摘要翻译： 提供了用于智能导航分层结构字符串的方法，设备和计算机程序产品。 该方法可以包括通过分隔符标记分层结构字符串，读取到两个相邻分隔符之间由指针设备指向的字符串的分层路径，以及在当前级别旁边的级别获取和显示所有可用的兄弟分级路径。

    LED CHIP PACKAGE STRUCTURE USING SEDIMENTATION AND METHOD FOR MAKING THE SAME
    5.
    发明申请
    LED CHIP PACKAGE STRUCTURE USING SEDIMENTATION AND METHOD FOR MAKING THE SAME 有权
    LED芯片包装结构及其制作方法

    公开(公告)号：US20120003765A1

    公开(公告)日：2012-01-05

    申请号：US13232391

    申请日：2011-09-14

    申请人： BILY WANG ,  SHIH-YU WU ,  CHAO-YUAN HUANG ,  PING-CHOU YANG ,  CHENG-YEN CHIANG

    发明人： BILY WANG ,  SHIH-YU WU ,  CHAO-YUAN HUANG ,  PING-CHOU YANG ,  CHENG-YEN CHIANG

    IPC分类号： H01L33/52

    CPC分类号： H01L33/52 ,  H01L33/508 ,  H01L2224/48091 ,  H01L2924/181 ,  H01L2933/0041 ,  H01L2924/00014 ,  H01L2924/00012

    摘要： An LED chip package structure using sedimentation includes a package body, at least two conductive substrates, at least one light-emitting element, and a package unit. The package body has a receiving space. The two conductive substrates are received in the receiving space. The light-emitting element is received in the receiving space and electrically connected to the two conductive substrates. The package unit has a package colloid layer and a powder mixed into the package colloid layer, and the package unit is filled into the receiving space. The powder is uniformly deposited in the receiving space by maintaining the package unit at room temperature firstly and the powder is solidified in the receiving space by heating to a predetermined temperature.

    摘要翻译： 使用沉淀的LED芯片封装结构包括封装体，至少两个导电基板，至少一个发光元件和封装单元。 包装体具有接收空间。 两个导电基板被接收在接收空间中。 发光元件被容纳在接收空间中并与两个导电基板电连接。 包装单元具有包装胶体层和混合到包装胶体层中的粉末，并且包装单元填充到容纳空间中。 首先将包装单元保持在室温下，将粉末均匀地沉积在接收空间中，并通过加热到预定温度使粉末在接收空间中固化。

    NANO-OPTOELECTRONIC DEVICES
    6.
    发明申请
    NANO-OPTOELECTRONIC DEVICES 审中-公开
    纳米光电器件

    公开(公告)号：US20090145481A1

    公开(公告)日：2009-06-11

    申请号：US12144542

    申请日：2008-06-23

    申请人： Shu-Fen Hu ,  Ting-Wei Liao ,  Chao-Yuan Huang

    发明人： Shu-Fen Hu ,  Ting-Wei Liao ,  Chao-Yuan Huang

    IPC分类号： H01L31/00

    CPC分类号： H01L31/0352 ,  B82Y30/00 ,  H01L31/101

    摘要： Optoelectronic devices with multiple nano-scale quantum dots detecting photons are presented. A nano-optoelectronic device includes a semiconductor substrate, an insulation layer on the semiconductor substrate, and a nano-optoelectronic structure on the insulation layer. The nano-optoelectronic structure includes a positive semiconductor, a negative semiconductor, and a plurality of quantum dots disposed therebetween. A first electrode connects the negative semiconductor, and a second electrode connects the positive semiconductor.

    摘要翻译： 提出了具有多个纳米量子点检测光子的光电器件。 纳米光电子器件包括半导体衬底，半导体衬底上的绝缘层和绝缘层上的纳米光电结构。 纳米光电子结构包括正半导体，负半导体和设置在其间的多个量子点。 第一电极连接负极半导体，第二电极连接正半导体。

    Method of prevention of particle pollution in a pre-clean chamber
    8.
    发明授权
    Method of prevention of particle pollution in a pre-clean chamber 失效

    公开(公告)号：US06537622B2

    公开(公告)日：2003-03-25

    申请号：US09848375

    申请日：2001-05-04

    申请人： Chia-ming Kuo ,  Chao-yuan Huang

    发明人： Chia-ming Kuo ,  Chao-yuan Huang

    IPC分类号： C23C1640

    CPC分类号： C23C14/564 ,  H01J2237/022

    摘要： This method of prevention of particle pollution in a pre-clean chamber includes an oxygen gas supplying step for injecting oxygen gas into the pre-clean chamber; and a plasma generating step for ionizing the oxygen gas into plasma so as to interact with silicon-rich oxide to form a silicon oxide layer in the pre-clean chamber. The method according to the invention could prevent particle pollution due to peeling-off of silicon-rich oxide in a pre-clean chamber so as to prolong the life of a bell-jar therein.

    Method of fabricating dual damascene structure
    9.
    发明授权
    Method of fabricating dual damascene structure 有权
    双镶嵌结构的制作方法

    公开(公告)号：US06313028B2

    公开(公告)日：2001-11-06

    申请号：US09280892

    申请日：1999-03-29

    申请人： Chao-Yuan Huang ,  Juan-Yuan Wu ,  Water Lur

    发明人： Chao-Yuan Huang ,  Juan-Yuan Wu ,  Water Lur

    IPC分类号： H01L2144

    CPC分类号： H01L21/76879 ,  H01L21/76807 ,  H01L21/7684

    摘要： A method of fabricating a dual damascene is provided. A dielectric layer is formed on a substrate. A diffusion barrier layer is formed on the dielectric layer. A portion of the diffusion barrier layer and the dielectric layer is removed to form a trench and a via hole. A barrier layer is formed on the diffusion barrier layer and in the trench and the via hole. The barrier layer on the diffusion barrier layer is removed by chemical-mechanical polishing. A conductive layer is formed in the trench and the via hole by selective deposition. A planarization step is performed with the diffusion barrier layer serving as a stop layer.

    摘要翻译： 提供了一种制造双镶嵌的方法。 在基板上形成电介质层。 在电介质层上形成扩散阻挡层。 去除扩散阻挡层和电介质层的一部分以形成沟槽和通孔。 阻挡层形成在扩散阻挡层上，沟槽和通孔中。 通过化学机械抛光去除扩散阻挡层上的阻挡层。 通过选择性沉积在沟槽和通孔中形成导电层。 在扩散阻挡层用作停止层的情况下进行平坦化步骤。

    Photo-mask and method of fabricating the same
    10.
    发明授权
    Photo-mask and method of fabricating the same 失效
    光掩模及其制造方法

    公开(公告)号：US6156460A

    公开(公告)日：2000-12-05

    申请号：US10136

    申请日：1998-01-21

    申请人： Chao-Yuan Huang

    发明人： Chao-Yuan Huang

    IPC分类号： G03F1/00 ,  H01L21/768 ,  G03F9/00

    CPC分类号： G03F1/50 ,  H01L21/76807 ,  H01L2221/1021

    摘要： A photo-mask and a method of fabricating the same. A photo-mask comprises a quartz glass substrate, on which a clear area, a grey area, and a dark area formed over the quartz glass substrate. Incident light penetrates through the clear area completely, but only part of the incident light will go through the grey area since the other part of the incident light is absorbed by the grey area, On the other hand, incident light is blocked by the dark area completely.

    摘要翻译： 光掩模及其制造方法。 光掩模包括石英玻璃基板，石英玻璃基板上形成有透明区域，灰色区域和暗区域。 入射光完全透过透明区域，但入射光的另一部分被灰色区域吸收，只有部分入射光将穿过灰色区域。另一方面，入射光被黑暗区域遮挡 完全