公开(公告)号：US08765603B2

公开(公告)日：2014-07-01

申请号：US13195554

申请日：2011-08-01

Applicant: Cheng-Hao Hou ,  Wei-Yang Lee ,  Xiong-Fei Yu ,  Kuang-Yuan Hsu

Inventor： Cheng-Hao Hou ,  Wei-Yang Lee ,  Xiong-Fei Yu ,  Kuang-Yuan Hsu

IPC: H01L21/44 ,  H01L21/441 ,  H01L21/40

CPC classification number: H01L29/517 ,  H01L21/28088 ,  H01L29/4966 ,  H01L29/7833

Abstract: Buffer layer and method of forming the buffer layer, the method including forming a high-k dielectric layer, forming a titanium nitride layer over the high-k dielectric layer, forming a silicon layer on the titanium nitride layer, annealing the silicon layer into the titanium nitride layer to form an annealed silicon layer and forming an n-metal over the high-k dielectric layer.

Abstract translation: 缓冲层和形成缓冲层的方法，所述方法包括形成高k电介质层，在高k电介质层上形成氮化钛层，在氮化钛层上形成硅层，将硅层退火成 氮化钛层以形成退火的硅层，并在高k电介质层上形成n金属。

公开(公告)号：US20130026637A1

公开(公告)日：2013-01-31

申请号：US13189732

申请日：2011-07-25

Applicant: Cheng-Hao HOU ,  Peng-Soon LIM ,  Da-Yuan LEE ,  Xiong-Fei YU ,  Chun-Yuan CHOU ,  Fan-Yi HSU ,  Jian-Hao CHEN ,  Kuang-Yuan HSU

Inventor： Cheng-Hao HOU ,  Peng-Soon LIM ,  Da-Yuan LEE ,  Xiong-Fei YU ,  Chun-Yuan CHOU ,  Fan-Yi HSU ,  Jian-Hao CHEN ,  Kuang-Yuan HSU

IPC: H01L23/48 ,  H01L21/28

CPC classification number: H01L21/28026 ,  H01L21/28088 ,  H01L29/401 ,  H01L29/4966 ,  H01L29/51 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit fabrication is disclosed, and more particularly a field effect transistor with a low resistance metal gate electrode is disclosed. An exemplary structure for a metal gate electrode of a field effect transistor comprises a lower portion formed of a first metal material, wherein the lower portion has a recess, a bottom portion and sidewall portions, wherein each of the sidewall portions has a first width; and an upper portion formed of a second metal material, wherein the upper portion has a protrusion and a bulk portion, wherein the bulk portion has a second width, wherein the protrusion extends into the recess, wherein a ratio of the second width to the first width is from about 5 to 10.

Abstract translation: 公开了集成电路制造，更具体地说，公开了具有低电阻金属栅电极的场效应晶体管。 场效应晶体管的金属栅电极的示例性结构包括由第一金属材料形成的下部，其中下部具有凹部，底部和侧壁部分，其中每个侧壁部分具有第一宽度; 以及由第二金属材料形成的上部，其中所述上部具有突起和主体部分，其中所述主体部分具有第二宽度，其中所述突起延伸到所述凹部中，其中所述第二宽度与所述第一宽度的比率 宽度为约5至10。

公开(公告)号：US20100075507A1

公开(公告)日：2010-03-25

申请号：US12550767

申请日：2009-08-31

Applicant: Che-Hao Chang ,  Cheng-Hao Hou ,  Chen-Hua Yu ,  Tai-Bor Wu

Inventor： Che-Hao Chang ,  Cheng-Hao Hou ,  Chen-Hua Yu ,  Tai-Bor Wu

IPC: H01L21/314

CPC classification number: H01L21/306 ,  C23C16/0272 ,  C23C16/308 ,  C23C16/40 ,  C23C16/45525 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/30604 ,  H01L21/3141 ,  H01L21/3145 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/3185 ,  H01L29/513 ,  H01L29/517

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a substrate, forming an interfacial layer on the substrate by treating the substrate with radicals, and forming a high-k dielectric layer on the interfacial layer. The radicals are selected from the group consisting of hydrous radicals, nitrogen/hydrogen radicals, and sulfur/hydrogen radicals.

Abstract translation: 本公开提供了制造半导体器件的方法。 该方法包括提供基底，通过用自由基处理基底并在界面层上形成高k电介质层，在基底上形成界面层。 基团选自含水基团，氮/氢基团和硫/氢基团。

公开(公告)号：US08580698B2

公开(公告)日：2013-11-12

申请号：US12760297

申请日：2010-04-14

Applicant: Wei-Yang Lee ,  Xiong-Fei Yu ,  Jian-Hao Chen ,  Cheng-Hao Hou ,  Da-Yuan Lee ,  Kuang-Yuan Hsu

Inventor： Wei-Yang Lee ,  Xiong-Fei Yu ,  Jian-Hao Chen ,  Cheng-Hao Hou ,  Da-Yuan Lee ,  Kuang-Yuan Hsu

IPC: H01L21/31

CPC classification number: H01L29/517 ,  H01L21/02181 ,  H01L21/0228 ,  H01L21/02323 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28194 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/66545 ,  H01L29/6659

Abstract: A method for fabricating the gate dielectric layer comprises forming a high-k dielectric layer over a substrate; forming an oxygen-containing layer on the high-k dielectric layer by an atomic layer deposition process; and performing an inert plasma treatment on the oxygen-containing layer.

Abstract translation: 一种用于制造栅极电介质层的方法包括在衬底上形成高k电介质层; 通过原子层沉积工艺在高k电介质层上形成含氧层; 对含氧层进行惰性等离子体处理。

公开(公告)号：US08546885B2

公开(公告)日：2013-10-01

申请号：US13189732

申请日：2011-07-25

Applicant: Cheng-Hao Hou ,  Peng-Soon Lim ,  Da-Yuan Lee ,  Xiong-Fei Yu ,  Chun-Yuan Chou ,  Fan-Yi Hsu ,  Jian-Hao Chen ,  Kuang-Yuan Hsu

Inventor： Cheng-Hao Hou ,  Peng-Soon Lim ,  Da-Yuan Lee ,  Xiong-Fei Yu ,  Chun-Yuan Chou ,  Fan-Yi Hsu ,  Jian-Hao Chen ,  Kuang-Yuan Hsu

IPC: H01L23/48 ,  H01L21/28

CPC classification number: H01L21/28026 ,  H01L21/28088 ,  H01L29/401 ,  H01L29/4966 ,  H01L29/51 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit fabrication is disclosed, and more particularly a field effect transistor with a low resistance metal gate electrode is disclosed. An exemplary structure for a metal gate electrode of a field effect transistor comprises a lower portion formed of a first metal material, wherein the lower portion has a recess, a bottom portion and sidewall portions, wherein each of the sidewall portions has a first width; and an upper portion formed of a second metal material, wherein the upper portion has a protrusion and a bulk portion, wherein the bulk portion has a second width, wherein the protrusion extends into the recess, wherein a ratio of the second width to the first width is from about 5 to 10.

Abstract translation: 公开了集成电路制造，更具体地说，公开了具有低电阻金属栅电极的场效应晶体管。 场效应晶体管的金属栅电极的示例性结构包括由第一金属材料形成的下部，其中下部具有凹部，底部和侧壁部分，其中每个侧壁部分具有第一宽度; 以及由第二金属材料形成的上部，其中所述上部具有突起和主体部分，其中所述主体部分具有第二宽度，其中所述突起延伸到所述凹部中，其中所述第二宽度与所述第一宽度的比率 宽度为约5至10。

公开(公告)号：US09711373B2

公开(公告)日：2017-07-18

申请号：US12550767

申请日：2009-08-31

Applicant: Che-Hao Chang ,  Cheng-Hao Hou ,  Chen-Hua Yu ,  Tai-Bor Wu

Inventor： Che-Hao Chang ,  Cheng-Hao Hou ,  Chen-Hua Yu ,  Tai-Bor Wu

IPC: H01L21/469 ,  H01L21/316 ,  C23C16/02 ,  C23C16/30 ,  C23C16/40 ,  C23C16/455 ,  H01L21/28 ,  H01L21/314 ,  H01L21/318 ,  H01L29/51

CPC classification number: H01L21/306 ,  C23C16/0272 ,  C23C16/308 ,  C23C16/40 ,  C23C16/45525 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/30604 ,  H01L21/3141 ,  H01L21/3145 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/3185 ,  H01L29/513 ,  H01L29/517

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a substrate, forming an interfacial layer on the substrate by treating the substrate with radicals, and forming a high-k dielectric layer on the interfacial layer. The radicals are selected from the group consisting of hydrous radicals, nitrogen/hydrogen radicals, and sulfur/hydrogen radicals.

公开(公告)号：US20130032900A1

公开(公告)日：2013-02-07

申请号：US13195554

申请日：2011-08-01

Applicant: Cheng-Hao HOU ,  Wei-Yang LEE ,  Xiong-Fei YU ,  Kuang-Yuan HSU

Inventor： Cheng-Hao HOU ,  Wei-Yang LEE ,  Xiong-Fei YU ,  Kuang-Yuan HSU

IPC: H01L21/288 ,  H01L29/78

CPC classification number: H01L29/517 ,  H01L21/28088 ,  H01L29/4966 ,  H01L29/7833

Abstract: Buffer layer and method of forming the buffer layer, the method including forming a high-k dielectric layer, forming a titanium nitride layer over the high-k dielectric layer, forming a silicon layer on the titanium nitride layer, annealing the silicon layer into the titanium nitride layer to form an annealed silicon layer and forming an n-metal over the high-k dielectric layer.

Abstract translation: 缓冲层和形成缓冲层的方法，所述方法包括形成高k电介质层，在高k电介质层上形成氮化钛层，在氮化钛层上形成硅层，将硅层退火成 氮化钛层以形成退火的硅层，并在高k电介质层上形成n金属。

公开(公告)号：US20110256731A1

公开(公告)日：2011-10-20

申请号：US12760297

申请日：2010-04-14

Applicant: Wei-Yang LEE ,  Xiong-Fei YU ,  Jian-Hao CHEN ,  Cheng-Hao HOU ,  Da-Yuan LEE ,  Kuang-Yuan HSU

Inventor： Wei-Yang LEE ,  Xiong-Fei YU ,  Jian-Hao CHEN ,  Cheng-Hao HOU ,  Da-Yuan LEE ,  Kuang-Yuan HSU

IPC: H01L21/3105 ,  H01L21/316

CPC classification number: H01L29/517 ,  H01L21/02181 ,  H01L21/0228 ,  H01L21/02323 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28194 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/66545 ,  H01L29/6659

Abstract: A method for fabricating the gate dielectric layer comprises forming a high-k dielectric layer over a substrate; forming an oxygen-containing layer on the high-k dielectric layer by an atomic layer deposition process; and performing an inert plasma treatment on the oxygen-containing layer.

Abstract translation: 一种用于制造栅极电介质层的方法包括在衬底上形成高k电介质层; 通过原子层沉积工艺在高k电介质层上形成含氧层; 对含氧层进行惰性等离子体处理。

公开(公告)号：US20100093184A1

公开(公告)日：2010-04-15

申请号：US12588367

申请日：2009-10-14

Applicant: Tai-Bor Wu ,  Cheng-Hao Hou

Inventor： Tai-Bor Wu ,  Cheng-Hao Hou

IPC: H01L21/316

CPC classification number: H01L21/0228 ,  C23C16/405 ,  C23C16/45534 ,  C23C16/45536 ,  H01L21/02181 ,  H01L21/02205 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/28194 ,  H01L21/3141 ,  H01L21/31645 ,  H01L29/517

Abstract: A method for making a metal oxide layer includes: (a) exposing a substrate having oxygen-containing reaction sites to an environment of a first precursor of an organometallic compound, which contains a metal atom and ligand groups, so as to form a chemisorption layer of the first precursor on the substrate; (b) exposing the chemisorption layer on the substrate to a non-free radical environment of a second precursor after step (a) so as to remove the ligand groups of the chemisorption layer that are unreacted in step (a) and so as to convert the chemisorption layer into a metal oxide layer; and (c) after step (b), exposing the metal oxide layer on the substrate to a free radical-containing gas containing free radicals so as to remove the ligand groups of the chemisorption layer that are left unreacted in step (b).

Abstract translation: 制造金属氧化物层的方法包括：（a）将具有含氧反应位点的底物暴露于含有金属原子和配体基团的有机金属化合物的第一前体的环境中，以形成化学吸附层 的基质上的第一种前体; （b）在步骤（a）之后将底物上的化学吸附层暴露于第二前体的非自由基环境，以除去步骤（a）中未反应的化学吸附层的配体基团，以便转化 化学吸附层转化为金属氧化物层; 和（c）在步骤（b）之后，将衬底上的金属氧化物层暴露于含有自由基的含自由基的气体中，以去除在步骤（b）中未反应的化学吸附层的配体基团。