公开(公告)号：US09786761B2

公开(公告)日：2017-10-10

申请号：US14955205

申请日：2015-12-01

Applicant: Dong-soo Lee ,  Hu-yong Lee ,  Won-keun Chung ,  Hoon-joo Na ,  Taek-soo Jeon ,  Sang-jin Hyun

Inventor： Dong-soo Lee ,  Hu-yong Lee ,  Won-keun Chung ,  Hoon-joo Na ,  Taek-soo Jeon ,  Sang-jin Hyun

IPC: B82Y10/00 ,  H01L29/51 ,  H01L27/092 ,  H01L29/78 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/06

CPC classification number: H01L29/512 ,  B82Y10/00 ,  H01L21/28185 ,  H01L21/823456 ,  H01L21/823842 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/785

Abstract: An integrated circuit device includes a substrate including an active region, an interfacial layer including a lower insulating layer on the active region, the lower insulating layer doped with a chalcogen element having an atomic weight equal to or greater than 16, a gate insulation layer on the interfacial layer, and a gate electrode on the gate insulation layer.

公开(公告)号：US20150061088A1

公开(公告)日：2015-03-05

申请号：US14207880

申请日：2014-03-13

Applicant: Dong-soo LEE ,  Myoung-Jae LEE ,  Seong-ho CHO ,  Mohammad Rakib Uddin ,  David SEO ,  Moon-seung YANG ,  Sang-moon LEE ,  Sung-hun LEE ,  Ji-hyun HUR ,  Eui-chul HWANG

Inventor： Dong-soo LEE ,  Myoung-Jae LEE ,  Seong-ho CHO ,  Mohammad Rakib Uddin ,  David SEO ,  Moon-seung YANG ,  Sang-moon LEE ,  Sung-hun LEE ,  Ji-hyun HUR ,  Eui-chul HWANG

IPC: H01L29/20 ,  H01L21/322

CPC classification number: H01L29/34 ,  H01L21/02175 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/022 ,  H01L21/02304 ,  H01L21/28158 ,  H01L21/28264 ,  H01L21/322 ,  H01L21/3228 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/24 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66522 ,  H01L29/7851

Abstract: The present disclosure relates to a semiconductor device including an oxygen gettering layer between a group III-V compound semiconductor layer and a dielectric layer, and a method of fabricating the semiconductor device. The semiconductor device may include a compound semiconductor layer; a dielectric layer disposed on the compound semiconductor layer; and an oxygen gettering layer interposed between the compound semiconductor layer and the dielectric layer. The oxygen gettering layer includes a material having a higher oxygen affinity than a material of the compound semiconductor layer.

Abstract translation: 本公开内容涉及包括III-V族化合物半导体层和电介质层之间的吸氧层的半导体器件以及制造该半导体器件的方法。 半导体器件可以包括化合物半导体层; 设置在所述化合物半导体层上的电介质层; 以及置于化合物半导体层和电介质层之间的吸氧层。 吸氧层包括具有比化合物半导体层的材料更高的氧亲合力的材料。

公开(公告)号：US08947905B2

公开(公告)日：2015-02-03

申请号：US13523429

申请日：2012-06-14

Applicant: Man Chang ,  Young-bae Kim ,  Dong-soo Lee ,  Chang-bum Lee ,  Seung-ryul Lee ,  Chang-jung Kim ,  Myoung-jae Lee ,  Kyung-min Kim

Inventor： Man Chang ,  Young-bae Kim ,  Dong-soo Lee ,  Chang-bum Lee ,  Seung-ryul Lee ,  Chang-jung Kim ,  Myoung-jae Lee ,  Kyung-min Kim

IPC: G11C11/00 ,  G11C11/56 ,  G11C13/00

CPC classification number: G11C11/5685 ,  G11C13/0007 ,  G11C13/0064 ,  G11C13/0069

Abstract: A method of driving a nonvolatile memory device including applying a reset voltage to a unit memory cell, reading a reset current of the unit memory cell, confirming whether the reset current is within a first current range, if the reset current is not within the first current range, changing the reset voltage and applying a changed reset voltage or applying again the reset voltage to the unit memory cell after applying a set voltage to the unit memory cell, if the reset current is within the first current range, confirming whether a difference between the present reset current and an immediately previous set current is within a second current range, and, if the difference is not within the second current range, applying the reset voltage or applying again the reset voltage to the unit memory cell after applying a set voltage to the unit memory cell.

Abstract translation: 一种驱动非易失性存储器件的方法，包括：将复位电压施加到单元存储单元，读取单元存储单元的复位电流，确认复位电流是否在第一电流范围内，如果复位电流不在第一电流范围内 电流范围，如果复位电流在第一电流范围内，则改变复位电压并施加改变的复位电压或再次将施加设定电压的复位电压施加到单元存储单元， 在当前复位电流和紧接在前的设定电流之间的电流在第二电流范围内，并且如果该差值不在第二电流范围内，则在应用组合之后施加复位电压或再次施加复位电压到单元存储单元 电压到单元存储单元。

公开(公告)号：US08772750B2

公开(公告)日：2014-07-08

申请号：US13115549

申请日：2011-05-25

Applicant: Chang-bum Lee ,  Chang-jung Kim ,  Young-bae Kim ,  Myoung-jae Lee ,  Ji-hyun Hur ,  Dong-soo Lee ,  Man Chang ,  Seung-ryul Lee

Inventor： Chang-bum Lee ,  Chang-jung Kim ,  Young-bae Kim ,  Myoung-jae Lee ,  Ji-hyun Hur ,  Dong-soo Lee ,  Man Chang ,  Seung-ryul Lee

IPC: H01L47/00 ,  H01L29/06

CPC classification number: H01L27/2409 ,  G11C13/0007 ,  G11C2213/51 ,  G11C2213/55 ,  G11C2213/56 ,  G11C2213/72 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146

Abstract: A non-volatile memory element includes: a memory layer disposed between a first electrode and a second electrode; and a buffer layer disposed between the memory layer and the first electrode. The memory layer includes a first material layer and a second material layer. The first material layer and the second material layer are configured to exchange ionic species to change a resistance state of the memory layer.

Abstract translation: 非易失性存储元件包括：设置在第一电极和第二电极之间的存储层; 以及设置在所述存储层和所述第一电极之间的缓冲层。 存储层包括第一材料层和第二材料层。 第一材料层和第二材料层被配置为交换离子物质以改变存储层的电阻状态。

公开(公告)号：US20130317196A1

公开(公告)日：2013-11-28

申请号：US13983053

申请日：2012-02-01

Applicant: Jae Min Jeong ,  Dinesh Shetty ,  Dong Soo Lee ,  June-Key Chung ,  Myung Chul Lee

Inventor： Jae Min Jeong ,  Dinesh Shetty ,  Dong Soo Lee ,  June-Key Chung ,  Myung Chul Lee

IPC: C07D255/02 ,  A61K51/04 ,  C07K7/64

CPC classification number: C07D255/02 ,  A61K51/044 ,  C07K7/64

Abstract: The present invention relates to a triazanonane derivative indicated by the chemical formula 1 below, or a pharmaceutically acceptable salt thereof, and a method for preparing same, and the triazanonane derivative according to the present invention forms a complex with a metal-fluoride and displays an effect of increasing the labeling efficiency up to 78-90% when labeling F-18, thus enabling use in various radioactive medicine labeling (In the chemical formula 1, R1, R2, A. E. X, n and m are as defined in the present description.)

Abstract translation: 本发明涉及由下述化学式1表示的三氮代壬烷衍生物或其药学上可接受的盐及其制备方法，本发明的三氮代烷衍生物与金属氟化物形成络合物，并显示出 当标记F-18时，将标记效率提高至78-90％，从而可用于各种放射性药物标记（化学式1，R1，R2，AE X，n和m如本说明书中所定义） 。）

公开(公告)号：US08456900B2

公开(公告)日：2013-06-04

申请号：US12926443

申请日：2010-11-18

Applicant: Myoung-jae Lee ,  Dong-soo Lee ,  Chang-bum Lee ,  Seung-ryul Lee

Inventor： Myoung-jae Lee ,  Dong-soo Lee ,  Chang-bum Lee ,  Seung-ryul Lee

IPC: G11C11/00

CPC classification number: G11C13/0007 ,  G11C13/003 ,  G11C2013/0073 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/72 ,  G11C2213/73 ,  G11C2213/74 ,  G11C2213/76 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147

Abstract: A memory device includes a memory cell. The memory cell includes: a bipolar memory element and a bidirectional switching element. The bidirectional switching element is connected to ends of the bipolar memory element, and has a bidirectional switching characteristic. The bidirectional switching element includes: a first switching element and a second switching element. The first switching element is connected to a first end of the bipolar memory element and has a first switching direction. The second switching element is connected to a second end of the bipolar memory element and has a second switching direction. The second switching direction is opposite to the first switching direction.

Abstract translation: 存储器件包括存储器单元。 存储单元包括：双极存储元件和双向开关元件。 双向开关元件连接到双极存储元件的端部，并且具有双向开关特性。 双向开关元件包括：第一开关元件和第二开关元件。 第一开关元件连接到双极存储元件的第一端并且具有第一开关方向。 第二开关元件连接到双极存储元件的第二端并具有第二开关方向。 第二切换方向与第一切换方向相反。

公开(公告)号：US20130058153A1

公开(公告)日：2013-03-07

申请号：US13488869

申请日：2012-06-05

Applicant: Man Chang ,  Young-bae Kim ,  Dong-soo Lee ,  Chang-bum Lee ,  Seung-ryul Lee ,  Chang-jung Kim ,  Myoung-jae Lee ,  Kyung-min Kim

Inventor： Man Chang ,  Young-bae Kim ,  Dong-soo Lee ,  Chang-bum Lee ,  Seung-ryul Lee ,  Chang-jung Kim ,  Myoung-jae Lee ,  Kyung-min Kim

IPC: G11C11/00

CPC classification number: G11C13/0069 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/0033 ,  G11C2013/0076 ,  G11C2013/009 ,  G11C2013/0092 ,  G11C2211/5625 ,  G11C2213/31 ,  G11C2213/32

Abstract: In a method of operating a semiconductor device, a resistance value of a variable resistance element is changed from a first resistance value to a second resistance value by applying a first voltage to the variable resistance element; and a first current that flows through the variable resistance element is sensed. A second voltage for changing the resistance value of the variable resistance element from the second resistance value to the first resistance value is modulated based on a dispersion of the first current, and the first voltage is re-applied to the variable resistance element based on a dispersion of the first current.

Abstract translation: 在操作半导体器件的方法中，通过向可变电阻元件施加第一电压，可变电阻元件的电阻值从第一电阻值改变为第二电阻值; 并且感测流过可变电阻元件的第一电流。 基于第一电流的偏差来调制用于将可变电阻元件的电阻值从第二电阻值改变为第一电阻值的第二电压，并且基于第一电压将第一电压重新施加到可变电阻元件 第一电流的分散。

公开(公告)号：US20120161821A1

公开(公告)日：2012-06-28

申请号：US13313720

申请日：2011-12-07

Applicant: Man CHANG ,  Young-bae KIM ,  Chang-jung KIM ,  Myoung-jae LEE ,  Ji-hyun HUR ,  Dong-soo LEE ,  Chang-bum LEE ,  Seung-ryul LEE

Inventor： Man CHANG ,  Young-bae KIM ,  Chang-jung KIM ,  Myoung-jae LEE ,  Ji-hyun HUR ,  Dong-soo LEE ,  Chang-bum LEE ,  Seung-ryul LEE

IPC: H03B1/00 ,  H01C7/10

CPC classification number: G11C13/0069 ,  G11C11/5685 ,  G11C13/0064 ,  G11C2013/0073

Abstract: A method of operating a semiconductor device that includes a variable resistance device, the method including applying a first voltage to the variable resistance device so as to change a resistance value of the variable resistance device from a first resistance value to a second resistance value that is different from the first resistance value; sensing first current flowing through the variable resistance device to which the first voltage is applied; determining whether the first current falls within a predetermined range of current; and if the first current does not fall within the first range of current, applying an additional first voltage that is equal to the first voltage to the variable resistance device.

Abstract translation: 一种操作包括可变电阻器件的半导体器件的方法，所述方法包括向可变电阻器件施加第一电压以便将可变电阻器件的电阻值从第一电阻值改变为第二电阻值，该第二电阻值是 不同于第一个电阻值; 感测流过施加有第一电压的可变电阻装置的第一电流; 确定第一电流是否落在预定的电流范围内; 并且如果所述第一电流不在所述第一电流范围内，则向所述可变电阻装置施加等于所述第一电压的附加第一电压。

公开(公告)号：US20120049145A1

公开(公告)日：2012-03-01

申请号：US13115549

申请日：2011-05-25

Applicant: Chang-bum Lee ,  Chang-jung Kim ,  Young-bae Kim ,  Myoung-jae Lee ,  Ji-hyun Hur ,  Dong-soo Lee ,  Man Chang ,  Seung-ryul Lee

Inventor： Chang-bum Lee ,  Chang-jung Kim ,  Young-bae Kim ,  Myoung-jae Lee ,  Ji-hyun Hur ,  Dong-soo Lee ,  Man Chang ,  Seung-ryul Lee

IPC: H01L45/00

CPC classification number: H01L27/2409 ,  G11C13/0007 ,  G11C2213/51 ,  G11C2213/55 ,  G11C2213/56 ,  G11C2213/72 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146

Abstract: A non-volatile memory element includes: a memory layer disposed between a first electrode and a second electrode; and a buffer layer disposed between the memory layer and the first electrode. The memory layer includes a first material layer and a second material layer. The first material layer and the second material layer are configured to exchange ionic species to change a resistance state of the memory layer.

Abstract translation: 非易失性存储元件包括：设置在第一电极和第二电极之间的存储层; 以及设置在所述存储层和所述第一电极之间的缓冲层。 存储层包括第一材料层和第二材料层。 第一材料层和第二材料层被配置为交换离子物质以改变存储层的电阻状态。

公开(公告)号：US20120045214A1

公开(公告)日：2012-02-23

申请号：US13213813

申请日：2011-08-19

Applicant: Mun Seob LEE ,  Dong Soo LEE ,  Geun Yong KIM ,  Hark YOO ,  Young Suk LEE ,  Sung Chang KIM ,  Jai Sang KOH ,  Jong Deog KIM

Inventor： Mun Seob LEE ,  Dong Soo LEE ,  Geun Yong KIM ,  Hark YOO ,  Young Suk LEE ,  Sung Chang KIM ,  Jai Sang KOH ,  Jong Deog KIM

IPC: H04J3/06 ,  H04J14/08

CPC classification number: H04Q11/0067 ,  H04Q2011/0064

Abstract: Provided is an optical line terminator (OLT) to recover packet data and a clock from an optical signal including a silent interval. The OLT may receive packet data and a clock from at least one optical network unit (ONU). Even in a silent interval in which the at least one ONU does not transmit packet data, the OLT may successfully recover the clock.

Abstract translation: 提供了一种用于从包括静默间隔的光信号恢复分组数据和时钟的光线路终端器（OLT）。 OLT可以从至少一个光网络单元（ONU）接收分组数据和时钟。 即使在至少一个ONU不发送分组数据的静音间隔中，OLT也可以成功地恢复时钟。