Reactive ion etching method for producing deep dielectric isolation in
silicon
    1.
    发明授权
    Reactive ion etching method for producing deep dielectric isolation in silicon 失效
    用于在硅中生产深介电隔离的反应离子蚀刻方法

    公开(公告)号:US4139442A

    公开(公告)日:1979-02-13

    申请号:US832856

    申请日:1977-09-13

    摘要: A method for producing deeply recessed oxidized regions in silicon. A series of deep trenches are formed in a silicon wafer by a reactive ion etching (RIE) method. In a first species, the trenches are of equal width. A block-off mask is selectively employed during part of the RIE process to produce trenches of unequal depth. The trench walls are thermally oxidized to completely fill in all of the trenches with oxide at the same time. In a second species, the trenches are of equal depth and width and of uniform spacing. In one aspect of the second species, the width of the trenches is equal to the distance between the trenches whereby the thermal oxidation completely fills in the trenches with oxide at the same time that the silicon between the trenches is fully converted to silicon oxide. In another aspect of the second species, the trenches are wider than the distance between the trenches whereby the thermal oxidation only partially fills in the trenches with oxide when the intervening silicon is fully converted to silicon oxide. In the latter aspect, the filling of the trenches is completed by the deposition of suitable material such as pyrolytically deposited silicon oxide.

    摘要翻译: 一种在硅中产生深凹陷氧化区的方法。 通过反应离子蚀刻(RIE)法在硅晶片中形成一系列深沟槽。 在第一种物种中,沟槽的宽度相等。 在RIE过程的一部分期间选择性地采用截止掩模以产生不等深度的沟槽。 沟槽壁被氧化,同时完全用氧化物填充到所有的沟槽中。 在第二种物种中,沟槽具有相同的深度和宽度并且具有均匀的间距。 在第二种类的一个方面,沟槽的宽度等于沟槽之间的距离,由此热氧化在氧化物完全填充在沟槽中,同时沟槽之间的硅完全转化为氧化硅。 在第二种类的另一方面,沟槽比沟槽之间的距离宽,由此当中间的硅完全转化为氧化硅时,热氧化仅部分地填充在具有氧化物的沟槽中。 在后一方面,通过沉积合适的材料如热解沉积的氧化硅来完成沟槽的填充。

    Method for making a lateral PNP or NPN with a high gain utilizing
reactive ion etching of buried high conductivity regions
    4.
    发明授权
    Method for making a lateral PNP or NPN with a high gain utilizing reactive ion etching of buried high conductivity regions 失效
    利用埋置高电导率区域的反应离子蚀刻制造具有高增益的横向PNP或NPN的方法

    公开(公告)号:US4264382A

    公开(公告)日:1981-04-28

    申请号:US84213

    申请日:1979-10-12

    摘要: A method for making lateral PNP or NPN devices in isolated monocrystalline silicon pockets wherein silicon dioxide isolation surrounds the pocket and partially, below the surface, within the isolated monocrystalline region. The P emitter or N emitter diffusion is made over the portion of the silicon dioxide that partially extends into the monocrystalline isolated pocket. This structure reduces the vertical current injection which will give relatively high (beta) gain even at low base to emitter voltages. The lateral PNP or NPN device resulting from the method is in a monocrystalline silicon pocket wherein silicon dioxide isolation surrounds the pocket and partially, below the surface, within the isolated monocrystalline silicon region. The P emitter or N emitter diffusion is located over the portion of the silicon dioxide that partially extends into the monocrystalline isolated pocket.

    摘要翻译: 在隔离的单晶硅袋中制造横向PNP或NPN器件的方法,其中二氧化硅隔离围绕在孤立的单晶区域内的口袋和部分地在表面下方。 P发射体或N发射体扩散在部分延伸到单晶隔离袋中的二氧化硅部分上进行。 这种结构减少了垂直电流注入,即使在低的基极 - 发射极电压下也将提供相对较高的(β)增益。 由该方法产生的横向PNP或NPN器件是在单晶硅袋中,其中二氧化硅隔离围绕在隔离的单晶硅区域内的口袋和部分地在表面下方。 P发射极或N发射极扩散位于部分延伸到单晶隔离袋中的二氧化硅部分之上。

    Process of forming recessed dielectric regions in a monocrystalline
silicon substrate
    5.
    发明授权
    Process of forming recessed dielectric regions in a monocrystalline silicon substrate 失效
    在单晶硅衬底中形成凹陷介质区的工艺

    公开(公告)号:US4307180A

    公开(公告)日:1981-12-22

    申请号:US180535

    申请日:1980-08-22

    申请人: Hans B. Pogge

    发明人: Hans B. Pogge

    摘要: A method of forming surface planarity to a substrate during removal of excess dielectric material when fabricating recessed regions of dielectric material in a semiconductor device wherein a dielectric layer is formed on the surface of the silicon substrate, a relatively thick layer of polycrystalline silicon deposited over the SiO.sub.2 layer, openings formed through the polycrystalline layer and SiO.sub.2 layer and into the substrate to form trenches, vapor depositing a layer of dielectric material over the surface of the substrate to a depth sufficient to fill the trench, depositing a planarized layer over a layer of dielectric material, reactive ion etching the planarizing layer, the dielectric layer, the polycrystalline layer, and selectively removing the remaining polycrystalline silicon layer to expose the SiO.sub.2 layer.

    摘要翻译: 一种在半导体器件中制造介电材料的凹陷区域时去除多余介电材料期间形成表面平面性的方法,其中介电层形成在硅衬底的表面上,沉积在该衬底上的相对较厚的多晶硅层 SiO 2层,通过多晶层和SiO 2层形成并进入衬底以形成沟槽的开口,在衬底的表面上蒸镀沉积介电材料层至足以填充沟槽的深度,将平坦化层沉积在 电介质材料,反应离子蚀刻平坦化层,电介质层,多晶层,并选择性地除去剩余的多晶硅层以暴露SiO 2层。