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    Methods of forming semiconductor devices having multilayer isolation structures
    3.
    发明授权
    Methods of forming semiconductor devices having multilayer isolation structures 有权
    形成具有多层隔离结构的半导体器件的方法

    公开(公告)号：US07534698B2

    公开(公告)日：2009-05-19

    申请号：US11209879

    申请日：2005-08-23

    申请人： Hong-Gun Kim ,  Eunkee Hong ,  Kyu-Tae Na

    发明人： Hong-Gun Kim ,  Eunkee Hong ,  Kyu-Tae Na

    IPC分类号： H01L21/76

    CPC分类号： C23C16/45523 ,  C23C16/045 ,  C23C16/401

    摘要： A semiconductor device includes a first structure having a recess having a bottom and opposing side surfaces, and a second structure conformally disposed on the bottom and side surfaces of the recess. The second structure includes a multilayer having two layers having a thickness substantially smaller than a width of the recess. Methods of manufacturing a semiconductor device include providing a first structure having a recess in a deposition chamber and flowing first and second reactants over the first structure for a first period at first and second flow rates. Then, the flow rates of the first second reactants to the first structure are substantially reduced for a pause period. The first and second reactants are then flowed over the first structure for a second period at third and fourth flow rates. The deposition and pause steps may be repeated until a multilayer having a desired thickness is formed.

    摘要翻译： 半导体器件包括具有底部和相对侧表面的凹部的第一结构以及保形地设置在凹部的底部和侧表面上的第二结构。 第二结构包括具有两个层的多层，其厚度基本上小于凹部的宽度。 制造半导体器件的方法包括提供在沉积室中具有凹槽的第一结构，并且使第一和第二反应物以第一和第二流速在第一结构上流动第一期间。 然后，第一第二反应物对第一结构的流速在暂停时间段内显着降低。 然后将第一和第二反应物以第三和第四流速在第一结构上流动第二时段。 可以重复沉积和暂停步骤，直到形成具有期望厚度的多层。

    Semiconductor device isolation structures and methods of fabricating such structures
    5.
    发明申请
    Semiconductor device isolation structures and methods of fabricating such structures 有权
    半导体器件隔离结构及其制造方法

    公开(公告)号：US20080014711A1

    公开(公告)日：2008-01-17

    申请号：US11654588

    申请日：2007-01-18

    申请人： Jong-Wan Choi ,  Ju-Seon Goo ,  Hong-Gun Kim ,  Yong-Soon Choi ,  Sung-Tae Kim ,  Eun-Kyung Baek

    发明人： Jong-Wan Choi ,  Ju-Seon Goo ,  Hong-Gun Kim ,  Yong-Soon Choi ,  Sung-Tae Kim ,  Eun-Kyung Baek

    IPC分类号： H01L21/76

    CPC分类号： H01L21/76229 ,  H01L27/105 ,  H01L27/11531

    摘要： Disclosed are methods for fabricating semiconductor devices incorporating a composite trench isolation structure comprising a first oxide pattern, a SOG pattern and a second oxide pattern wherein the oxide patterns enclose the SOG pattern. The methods include the deposition of a first oxide layer and a SOG layer to fill recessed trench regions formed in the substrate. The first oxide layer and the SOG layer are then subjected to a planarization sequence including a CMP process followed by an etchback process to form a composite structure having a substantially flat upper surface that exposes both the oxide and the SOG material. The second oxide layer is then applied and subjected to a similar CMP/etchback sequence to obtain a composite structure having an upper surface that is recessed relative to a plane defined by the surfaces of adjacent active regions.

    摘要翻译： 公开了用于制造半导体器件的方法，该半导体器件结合有包括第一氧化物图案，SOG图案和第二氧化物图案的复合沟槽隔离结构，其中氧化物图案包围SOG图案。 所述方法包括沉积第一氧化物层和SOG层以填充形成在衬底中的凹陷沟槽区域。 然后对第一氧化物层和SOG层进行包括CMP工艺的随后的回蚀工艺的平坦化顺序，以形成具有露出氧化物和SOG材料的基本上平坦的上表面的复合结构。 然后施加第二氧化物层并进行类似的CMP /回蚀序列以获得具有相对于由相邻有源区的表面限定的平面凹进的上表面的复合结构。

    Method for forming a silicon oxide layer using spin-on glass
    6.
    发明申请
    Method for forming a silicon oxide layer using spin-on glass 有权
    使用旋涂玻璃形成氧化硅层的方法

    公开(公告)号：US20070117412A1

    公开(公告)日：2007-05-24

    申请号：US11656469

    申请日：2007-01-23

    申请人： Ju-seon Goo ,  Eun-kee Hong ,  Hong-Gun Kim ,  Kyu-tae Na

    发明人： Ju-seon Goo ,  Eun-kee Hong ,  Hong-Gun Kim ,  Kyu-tae Na

    IPC分类号： H01L21/31

    CPC分类号： H01L21/02222 ,  H01L21/02164 ,  H01L21/02282 ,  H01L21/02326 ,  H01L21/02343 ,  H01L21/3125 ,  H01L21/3165 ,  H01L21/76229 ,  H01L21/76826 ,  H01L21/76828

    摘要： A method is provided for forming silicon oxide layers during the processing of semiconductor devices by applying a SOG layer including polysilazane to a substrate and then substantially converting the SOG layer to a silicon oxide layer using an oxidant solution. The oxidant solution may include one or more oxidants including, for example, ozone, peroxides, permanganates, hypochlorites, chlorites, chlorates, perchlorates, hypobromites, bromites, bromates, hypoiodites, iodites, iodates and strong acids.

    摘要翻译： 提供了一种通过将包含聚硅氮烷的SOG层施加到衬底然后使用氧化剂溶液将SOG层基本上转化为氧化硅层来在半导体器件加工期间形成氧化硅层的方法。 氧化剂溶液可以包括一种或多种氧化剂，包括例如臭氧，过氧化物，高锰酸盐，次氯酸盐，亚氯酸盐，氯酸盐，高氯酸盐，次溴酸盐，溴酸盐，溴酸盐，次碘酸盐，碘酸盐，碘酸盐和强酸。

    Method of manufacturing a non-volatile semiconductor device
    7.
    发明申请
    Method of manufacturing a non-volatile semiconductor device 审中-公开
    制造非易失性半导体器件的方法

    公开(公告)号：US20070004139A1

    公开(公告)日：2007-01-04

    申请号：US11474428

    申请日：2006-06-26

    申请人： Hong-Gun Kim ,  Kyu-Tae Na ,  Eun-Kyung Baek ,  Ju-Seon Goo ,  Sang-Ho Rha

    发明人： Hong-Gun Kim ,  Kyu-Tae Na ,  Eun-Kyung Baek ,  Ju-Seon Goo ,  Sang-Ho Rha

    IPC分类号： H01L21/336

    CPC分类号： H01L27/115 ,  H01L21/7624 ,  H01L27/11521

    摘要： In a method of manufacturing a non-volatile semiconductor device, a mask structure is formed on a substrate. A trench is formed by partially etching the substrate using the mask structure. A preliminary isolation layer pattern is formed on the substrate to fill the trench. The preliminary isolation layer has an upper face lower than that of the mask structure. A capping layer pattern is formed on the preliminary isolation layer pattern. An opening and an isolation layer pattern are formed by removing the mask structure and a portion on a sidewall of the preliminary isolation layer pattern adjacent to the mask structure. After forming a tunnel oxide layer, a floating gate is formed on the tunnel oxide layer and a sidewall of the isolation layer pattern.

    摘要翻译： 在制造非挥发性半导体器件的方法中，在衬底上形成掩模结构。 通过使用掩模结构部分地蚀刻衬底来形成沟槽。 在衬底上形成初步隔离层图形以填充沟槽。 预备隔离层的上表面比掩模结构的上面低。 在初步隔离层图案上形成覆盖层图案。 通过去除掩模结构和邻近掩模结构的预隔离层图案的侧壁上的部分形成开口和隔离层图案。 在形成隧道氧化物层之后，在隧道氧化物层和隔离层图案的侧壁上形成浮栅。

    Method of forming a spin-on-glass insulation layer
    8.
    发明授权
    Method of forming a spin-on-glass insulation layer 有权
    形成旋涂玻璃绝缘层的方法

    公开(公告)号：US06635586B2

    公开(公告)日：2003-10-21

    申请号：US09977673

    申请日：2001-10-15

    申请人： Ju-Seon Goo ,  Eun-Kee Hong ,  Hong-Gun Kim ,  Jin-Gi Hong

    发明人： Ju-Seon Goo ,  Eun-Kee Hong ,  Hong-Gun Kim ,  Jin-Gi Hong

    IPC分类号： H01L2469

    CPC分类号： H01L21/02282 ,  H01L21/02123 ,  H01L21/02222 ,  H01L21/02337 ,  H01L21/316 ,  H01L21/76819 ,  H01L21/76828 ,  H01L21/76837

    摘要： A method of forming a SOG insulation layer of a semiconductor device comprises forming the SOG insulation layer on a substrate having a stepped pattern by using a polysilazane in a solution state, performing a pre-bake process for removing solvent elements of the insulation layer at a temperature of 50 to 350° C., performing a hard bake process for restraining particles from forming at a temperature of 350 to 500° C., and annealing at a temperature of 600 to 1200° C. The method of the invention further includes planarizing the insulation layer between the hard bake process and the annealing step. Also, the hard bake process can be omitted.

    摘要翻译： 形成半导体器件的SOG绝缘层的方法包括：通过使用溶液状态的聚硅氮烷在具有阶梯状图案的基板上形成SOG绝缘层，进行用于除去绝缘层的溶剂元素的预烘烤工序 温度为50〜350℃，进行用于抑制微粒在350〜500℃的温度下形成的硬烘烤工艺，在600〜1200℃的温度下进行退火。本发明的方法还包括平面化 硬烘烤工艺与退火步骤之间的绝缘层。 此外，可以省略硬烘焙处理。

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    9.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法

    公开(公告)号：US20110207334A1

    公开(公告)日：2011-08-25

    申请号：US12902212

    申请日：2010-10-12

    申请人： Yong-soon CHOI ,  Hong-gun KIM ,  Ha-young YI ,  Gil-heyun CHOI ,  Eun-kee Hong

    发明人： Yong-soon CHOI ,  Hong-gun KIM ,  Ha-young YI ,  Gil-heyun CHOI ,  Eun-kee Hong

    IPC分类号： H01L21/31

    CPC分类号： H01L21/02126 ,  H01L21/02326 ,  H01L21/02337 ,  H01L21/76224

    摘要： A method of manufacturing a semiconductor device includes an improved technique of filling a trench to provide the resulting semiconductor device with better characteristics and higher reliability. The method includes forming a trench in a semiconductor layer, forming a first layer on the semiconductor layer using a silicon source and a nitrogen source to fill the trench, curing the first layer using an oxygen source, and annealing the second layer. The method may also be used to form other types of insulating layers such as an interlayer insulating layer.

    摘要翻译： 一种制造半导体器件的方法包括一种填充沟槽的改进技术，以使得到的半导体器件具有更好的特性和更高的可靠性。 该方法包括在半导体层中形成沟槽，使用硅源和氮源在半导体层上形成第一层以填充沟槽，使用氧源固化第一层，并退火第二层。 该方法也可用于形成其它类型的绝缘层，例如层间绝缘层。

    FLASH MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
    10.
    发明申请
    FLASH MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 有权
    闪存存储器件及其制造方法

    公开(公告)号：US20080035984A1

    公开(公告)日：2008-02-14

    申请号：US11618155

    申请日：2006-12-29

    申请人： Hong-Gun KIM ,  Ju-Seon GOO ,  Mun-Jun KIM ,  Yong-Soon CHOI ,  Sung-Tae KIM ,  Eun-Kyung BAEK

    发明人： Hong-Gun KIM ,  Ju-Seon GOO ,  Mun-Jun KIM ,  Yong-Soon CHOI ,  Sung-Tae KIM ,  Eun-Kyung BAEK

    IPC分类号： H01L29/788 ,  H01L21/762

    CPC分类号： H01L29/7881 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

    摘要： One embodiment of a method of fabricating a flash memory device includes forming a trench mask pattern, which includes a gate insulation pattern and a charge storage pattern stacked in sequence, on a semiconductor substrate; etching the semiconductor substrate using the trench mask pattern as an etch mask to form trenches defining active regions; and sequentially forming lower and upper device isolation patterns in the trench. After sequentially forming an intergate insulation film and a control gate film on the upper device isolation pattern, the control gate film, the intergate insulation pattern and the gloating gate pattern are formed, thereby providing gate lines crossing over the active regions.

    摘要翻译： 制造闪速存储器件的方法的一个实施例包括在半导体衬底上形成沟槽掩模图案，其包括依次层叠的栅极绝缘图案和电荷存储图案; 使用沟槽掩模图案作为蚀刻掩模蚀刻半导体衬底，以形成限定有源区的沟槽; 并且顺序地形成沟槽中的下部和上部器件隔离图案。 在上部器件隔离图案上顺序地形成栅极间绝缘膜和控制栅极膜之后，形成控制栅极膜，栅极间绝缘图案和阴极管栅极图案，从而提供跨越有源区域的栅极线。