公开(公告)号：US20060248717A1

公开(公告)日：2006-11-09

申请号：US11482945

申请日：2006-07-10

Applicant: John Lauffer ,  James Larnerd ,  Voya Markovich

Inventor： John Lauffer ,  James Larnerd ,  Voya Markovich

IPC: H05K3/10 ,  H05K3/36

CPC classification number: H05K3/44 ,  H05K1/056 ,  H05K3/0047 ,  H05K3/0052 ,  H05K3/429 ,  H05K3/4641 ,  H05K2203/0323 ,  H05K2203/1476 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155

Abstract: A method of making a circuitized substrate which includes a plurality of contiguous open segments along a side edge portion of the at least one electrically conductive layer thereof, these open segments isolated by a barrier of dielectric material which substantially fills the open segments, e.g., during a lamination process which bonds two dielectric layers of the substrate to the conductive layer.

Abstract translation: 一种制造电路化衬底的方法，该衬底包括沿着其至少一个导电层的侧边缘部分的多个邻接的开放段，这些开放段通过电介质材料的屏障隔开，其基本上填充开放段，例如在 层压工艺，其将基板的两个电介质层粘合到导电层。

公开(公告)号：US20080117583A1

公开(公告)日：2008-05-22

申请号：US12010004

申请日：2008-01-18

Applicant: John Lauffer ,  James Larnerd ,  Voya Markovich

Inventor： John Lauffer ,  James Larnerd ,  Voya Markovich

IPC: A47B81/00 ,  H05K5/00

CPC classification number: H01L23/49811 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K1/0216 ,  H05K1/0256 ,  H05K1/056 ,  H05K3/0047 ,  H05K3/429 ,  H05K3/44 ,  H05K3/4641 ,  H05K2201/093 ,  H05K2201/09345 ,  H05K2201/09481 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2203/0323 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49162 ,  Y10T29/49165 ,  Y10T29/49176 ,  H01L2224/0401

Abstract: An information handling system, e.g., a mainframe computer, which includes as part thereof a housing having therein an electrical assembly including a circuitized substrate which in turn includes a plurality of contiguous open segments which define facing edge portions within an electrically conductive layer to isolate separate portions of the conductive layer such that the layer can be used for different functions, e.g., as both power and ground elements, within the system. At least one electrical component is positioned on and electrically coupled to the circuitized substrate of the system's electrical assembly.

Abstract translation: 一种信息处理系统，例如主机计算机，其包括作为其一部分的壳体，其中具有包括电路化基板的电组件，该电组件又包括多个邻接的开放段，其限定导电层内的相对边缘部分，以隔离单独的 导电层的部分，使得该层可用于不同的功能，例如作为系统内的功率和接地元件。 至少一个电气部件位于系统的电气组件的电路化基板上并电耦合到电路基板。

公开(公告)号：US20050136646A1

公开(公告)日：2005-06-23

申请号：US10737974

申请日：2003-12-18

Applicant: James Larnerd ,  John Lauffer ,  Voya Markovich ,  Kostas Papathomas

Inventor： James Larnerd ,  John Lauffer ,  Voya Markovich ,  Kostas Papathomas

IPC: H05K3/40 ,  H05K1/11 ,  H05K3/00 ,  H05K3/42 ,  H05K3/46 ,  H01L21/44 ,  H01L21/4763 ,  H01R12/04 ,  H05K1/00

CPC classification number: H05K3/429 ,  H01L2224/13 ,  H05K1/113 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/421 ,  H05K2201/0347 ,  H05K2201/09454 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/09845

Abstract: A method of making a printed circuit board in which conductive thru-holes are formed within two dielectric layers of the board's structure so as to connect designated conductive layers. One hole connects two adjacent layers and the other connects two adjacent layers, including one of the conductive layers connected by the other hole. It is also possible to connect all three conductive layers using one or more holes. The resulting holes may be filled, e.g., with metal plating, or conductive or non-conductive paste. In the case of the latter, it is also possible to provide a top covering conductive layer over the paste, e.g., to serve as a pad or the like on the board's external surface.

Abstract translation: 一种制造印刷电路板的方法，其中导电通孔形成在板结构的两个电介质层内，以便连接指定的导电层。 一个孔连接两个相邻的层，另一个连接两个相邻的层，包括通过另一个孔连接的一个导电层。 也可以使用一个或多个孔连接所有三个导电层。 所得到的孔可以例如用金属电镀或导电或不导电的糊料填充。 在后者的情况下，也可以在浆料上方设置顶部覆盖导电层，例如在板的外表面上用作衬垫等。

公开(公告)号：US20070144772A1

公开(公告)日：2007-06-28

申请号：US11641810

申请日：2006-12-20

Applicant: John Lauffer ,  James Larnerd ,  Voya Markovich

Inventor： John Lauffer ,  James Larnerd ,  Voya Markovich

IPC: H05K1/16

CPC classification number: H01L23/49811 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K1/0216 ,  H05K1/0256 ,  H05K1/056 ,  H05K3/0047 ,  H05K3/429 ,  H05K3/44 ,  H05K3/4641 ,  H05K2201/093 ,  H05K2201/09345 ,  H05K2201/09481 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2203/0323 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49162 ,  Y10T29/49165 ,  Y10T29/49176 ,  H01L2224/0401

Abstract: A method of making circuitized substrate which includes a plurality of contiguous open segments which define facing edge portions within an electrically conductive layer to isolate separate portions of the conductive layer such that the layer can be used for different functions, e.g., as both power and ground elements, within a product (e.g., electrical assembly) which includes the substrate as part thereof. An information handling system, e.g., a mainframe computer, which represents one of the products in which the substrate may be utilized, is also provided.

Abstract translation: 一种制造电路化衬底的方法，其包括多个邻接的开放段，其限定导电层内的相对边缘部分以隔离导电层的分离部分，使得该层可用于不同的功能，例如电力和地面 元件，在包括基板作为其一部分的产品（例如，电气组件）内。 还提供了代表其中可以使用衬底的产品之一的信息处理系统，例如主机计算机。

公开(公告)号：US20060000639A1

公开(公告)日：2006-01-05

申请号：US10882170

申请日：2004-07-02

Applicant: John Lauffer ,  James Larnerd ,  Voya Markovich

Inventor： John Lauffer ,  James Larnerd ,  Voya Markovich

IPC: H05K1/11

CPC classification number: H05K3/44 ,  H05K1/056 ,  H05K3/0047 ,  H05K3/0052 ,  H05K3/429 ,  H05K3/4641 ,  H05K2203/0323 ,  H05K2203/1476 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155

Abstract: A circuitized substrate which includes a plurality of contiguous open segments along a side edge portion of the at least one electrically conductive layer thereof, these open segments isolated by a barrier of dielectric material which substantially fills the open segments, e.g., during a lamination process which bonds two dielectric layers of the substrate to the conductive layer. A method of making the substrate, an electrical assembly utilizing the substrate, a multilayered circuitized assembly also utilizing the substrate and an information handling system, e.g., a mainframe computer, are also provided.

Abstract translation: 电路化衬底，其包括沿其至少一个导电层的侧边缘部分的多个邻接的开放段，这些开放段通过电介质材料的屏障隔离，所述阻挡层基本上填充开放段，例如在层压过程期间 将基板的两个电介质层粘合到导电层。 还提供了制造衬底的方法，利用衬底的电组件，还利用衬底的多层电路化组件和诸如主机的信息处理系统。

公开(公告)号：US20060183316A1

公开(公告)日：2006-08-17

申请号：US11397713

申请日：2006-04-05

Applicant: James Larnerd ,  John Lauffer ,  Voya Markovich ,  Kostas Papathomas

Inventor： James Larnerd ,  John Lauffer ,  Voya Markovich ,  Kostas Papathomas

IPC: H01L21/4763 ,  H01L21/44

CPC classification number: H05K3/429 ,  H01L2224/13 ,  H05K1/113 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/421 ,  H05K2201/0347 ,  H05K2201/09454 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/0969 ,  H05K2201/09845

Abstract: A method of making a printed circuit board in which conductive thru-holes are formed within two dielectric layers of the board's structure so as to connect designated conductive layers. One hole connects two adjacent layers and the other connects two adjacent layers, including one of the conductive layers connected by the other hole. It is also possible to connect all three conductive layers using one or more holes. The resulting holes may be filled, e.g., with metal plating, or conductive or non-conductive paste. In the case of the latter, it is also possible to provide a top covering conductive layer over the paste, e.g., to serve as a pad or the like on the board's external surface.

Abstract translation: 一种制造印刷电路板的方法，其中导电通孔形成在板结构的两个电介质层内，以便连接指定的导电层。 一个孔连接两个相邻的层，另一个连接两个相邻的层，包括通过另一个孔连接的一个导电层。 也可以使用一个或多个孔连接所有三个导电层。 所得到的孔可以例如用金属电镀或导电或不导电的糊料填充。 在后者的情况下，也可以在浆料上方设置顶部覆盖导电层，例如在板的外表面上用作衬垫等。

公开(公告)号：US20060000636A1

公开(公告)日：2006-01-05

申请号：US10882167

申请日：2004-07-02

Applicant: John Lauffer ,  James Larnerd ,  Voya Markovich

Inventor： John Lauffer ,  James Larnerd ,  Voya Markovich

IPC: H05K1/03 ,  H05K3/46

CPC classification number: H01L23/49811 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K1/0216 ,  H05K1/0256 ,  H05K1/056 ,  H05K3/0047 ,  H05K3/429 ,  H05K3/44 ,  H05K3/4641 ,  H05K2201/093 ,  H05K2201/09345 ,  H05K2201/09481 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2203/0323 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49162 ,  Y10T29/49165 ,  Y10T29/49176 ,  H01L2224/0401

Abstract: A circuitized substrate which includes a plurality of contiguous open segments which define facing edge portions within an electrically conductive layer to isolate separate portions of the conductive layer such that the layer can be used for different functions, e.g., as both power and ground elements, within a product (e.g., electrical assembly) which includes the substrate as part thereof. A method of making the substrate, an electrical assembly utilizing the substrate, a multilayered circuitized assembly also utilizing the substrate and an information handling system, e.g., a mainframe computer, are also provided.

Abstract translation: 电路化基板，其包括多个邻接的开放段，其在导电层内限定面对的边缘部分，以隔离导电层的分离部分，使得该层可用于不同的功能，例如功率和接地元件内部的功能和接地元件 包括基板作为其一部分的产品（例如，电气组件）。 还提供了制造衬底的方法，利用衬底的电组件，还利用衬底的多层电路化组件和诸如主机的信息处理系统。