公开(公告)号：US07843052B1

公开(公告)日：2010-11-30

申请号：US12270690

申请日：2008-11-13

申请人： Min Yoo ,  Ki Wook Lee ,  Min Jae Lee

发明人： Min Yoo ,  Ki Wook Lee ,  Min Jae Lee

IPC分类号： H01L23/52

CPC分类号： H01L25/0657 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L2224/0231 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/73259 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2924/00011 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/81805

摘要： Semiconductor devices are disclosed. In an embodiment, a plurality of second semiconductor dies formed with through-silicon vias are stacked on a first semiconductor die. The stack of the second semiconductor dies is encapsulated by an encapsulant. Redistribution layers are formed on one surface of the stack and are connected to the through-silicon vias. Solder balls are attached to the respective redistribution layers. In another embodiment, a plurality of second semiconductor dies formed with through-silicon vias are stacked on a first semiconductor die formed with through-silicon vias. Redistribution layers are formed on the back surface of the first semiconductor die. Solder balls are attached to the respective redistribution layers. Further disclosed are methods for fabricating the semiconductor devices.

摘要翻译： 公开了半导体器件。 在一个实施例中，形成有穿硅通孔的多个第二半导体管芯被堆叠在第一半导体管芯上。 第二半导体管芯的堆叠由密封剂封装。 再分布层形成在堆叠的一个表面上并且连接到穿硅通孔。 焊球附着在相应的再分布层上。 在另一个实施例中，形成有穿硅通孔的多个第二半导体管芯被堆叠在形成有通孔硅通孔的第一半导体管芯上。 在第一半导体管芯的后表面上形成再分布层。 焊球附着在相应的再分布层上。 还公开了制造半导体器件的方法。

公开(公告)号：US07579702B2

公开(公告)日：2009-08-25

申请号：US11647124

申请日：2006-12-28

申请人： Jung-Woo Park ,  Ki-Wook Lee ,  Dong-Wook Kim

发明人： Jung-Woo Park ,  Ki-Wook Lee ,  Dong-Wook Kim

IPC分类号： H02P9/48

CPC分类号： H02P9/46 ,  H02J3/386 ,  H02P9/007 ,  Y02E10/763

摘要： Disclosed herein is an electric power converting device and power converting method for controlling doubly-fed induction generators, which provides a synchronous generator for generating auxiliary electric power independently of a doubly-fed induction generator so as to generate electricity even in a system power-free environment, a grid-side converter is composed of a three-phase four-wire converter so as to generate a balanced voltage even in an unbalanced load condition and automatically synchronize a stator voltage of a doubly-fed induction generator and a system voltage with each other.

摘要翻译： 本发明公开了一种用于控制双馈感应发电机的电力转换装置和电力转换方法，其提供了一种用于独立于双馈感应发电机产生辅助电力的同步发电机，以便即使在无系统的系统中也能发电 电网侧转换器由三相四线转换器构成，即使在不平衡负载条件下也能产生平衡电压，并且自动同步双馈感应发电机的定子电压和系统电压 其他。

公开(公告)号：US07919853B1

公开(公告)日：2011-04-05

申请号：US11933908

申请日：2007-11-01

申请人： Ki Wook Lee

发明人： Ki Wook Lee

IPC分类号： H01L23/10 ,  H01L23/34

CPC分类号： H01L21/568 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/562 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package and method of manufacture has a substrate having an aperture. A semiconductor die is positioned in the aperture of the substrate and attached to a heat spreader by a first adhesive and electrically coupled to the substrate by at least one conductive wire. The heat spreader spans the aperture and is peripherally attached to a bottom surface of the substrate by a second adhesive. An encapsulant encapsulates the aperture, the semiconductor die, and the electrically conductive wire.

摘要翻译： 半导体封装和制造方法具有具有孔径的基板。 半导体管芯定位在基板的孔中并通过第一粘合剂附着到散热器上，并通过至少一根导线电耦合到基板。 散热器跨越孔，并通过第二粘合剂周边地附接到基底的底表面。 密封剂封装孔，半导体管芯和导电线。

公开(公告)号：US07872341B1

公开(公告)日：2011-01-18

申请号：US12396772

申请日：2009-03-03

申请人： Sang Jae Jang ,  Ki Wook Lee ,  Jae Dong Kim

发明人： Sang Jae Jang ,  Ki Wook Lee ,  Jae Dong Kim

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L23/053 ,  H01L23/12 ,  H01L29/40

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L24/05 ,  H01L24/06 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/06155 ,  H01L2224/06181 ,  H01L2224/06515 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/16146 ,  H01L2224/17181 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/00014

摘要： A semiconductor package comprises a plurality of stacked semiconductor chips having the same structure. Therefore, the semiconductor chips can be produced using masks of the same design, resulting in a reduction in production cost and an improvement in productivity. Each of the semiconductor chips includes a plurality of through-silicon vias penetrating therethrough. The through-silicon vias of each semiconductor chip include at least one signal pad through which a common signal is delivered to the semiconductor chip and at least one chip enable pad connected to at least one chip enable pin to select the semiconductor chip. The chip enable pin may be connected to or disconnected from the chip enable pad through a conductive line to select the semiconductor chip. The conductive line is sawn to disconnect the chip enable pin from the chip enable pad before stacking of the semiconductor chip. Therefore, the semiconductor chips can be configured to have the same design, thus eliminating the need for troublesome production management and control of the semiconductor chips.

摘要翻译： 半导体封装包括具有相同结构的多个层叠半导体芯片。 因此，可以使用相同设计的掩模制造半导体芯片，导致生产成本的降低和生产率的提高。 每个半导体芯片包括贯穿其中的多个穿硅通孔。 每个半导体芯片的穿硅通孔包括至少一个信号焊盘，通过该至少一个信号焊盘将公共信号传送到半导体芯片，以及连接至少一个芯片使能引脚以选择半导体芯片的至少一个芯片使能焊盘。 芯片使能引脚可以通过导线与芯片使能焊盘连接或断开以选择半导体芯片。 在将半导体芯片堆叠之前，将导线锯切以将芯片使能引脚与芯片使能焊盘断开。 因此，半导体芯片可以被配置为具有相同的设计，因此不需要对半导体芯片进行麻烦的生产管理和控制。

公开(公告)号：US07638983B2

公开(公告)日：2009-12-29

申请号：US11987540

申请日：2007-11-30

申请人： Jung-Woo Park ,  Ki-Wook Lee ,  Dong-Wook Kim

发明人： Jung-Woo Park ,  Ki-Wook Lee ,  Dong-Wook Kim

IPC分类号： H02H7/06 ,  H02P9/00 ,  H02P9/04 ,  F03D9/00 ,  H02M7/48

CPC分类号： H02P9/007 ,  H02M5/4585 ,  H02M7/49 ,  H02M2007/4835 ,  H02P2207/073

摘要： Disclosed is a controller of a grid coupled type doubly-fed induction generator having a multi-level converter topology, which can control the doubly-fed induction generator having a high voltage specification and can perform a fault ride-through function, an anti-islanding function and a grid voltage synchronization function required for a dispersed power generation facility. The controller makes a H-bridge multi-level converter generate a three-phase voltage waveform resulted from the structure that single-phase converters each being composed of a 2-leg IGBT are stacked in a serial manner, and controls a rotor current so as to make the rotor coil of the doubly-fed induction generator in charge of a slip power only. The boost converter is composed of a 3-leg IGBT and a boost inductor generating a direct current voltage of its source required for the H-bridge multi-level converter.

摘要翻译： 公开了具有多电平转换器拓扑的电网耦合型双馈感应发电机的控制器，其可以控制具有高电压规格的双馈感应发电机，并且可以执行故障穿越功能，防孤岛 功能和分散式发电设备所需的电网电压同步功能。 控制器使得H桥多电平转换器产生由串联方式堆叠的由双腿IGBT组成的单相转换器的结构所产生的三相电压波形，并且控制转子电流，以便 以使双馈感应发电机的转子线圈仅承担滑动功率。 升压转换器由3脚IGBT和升压电感组成，产生H桥多电平转换器所需的直流电源电压。

公开(公告)号：US07898093B1

公开(公告)日：2011-03-01

申请号：US11592889

申请日：2006-11-02

申请人： Robert Francis Darveaux ,  Michael Barrow ,  Miguel Angel Jimarez ,  Jae Dong Kim ,  Dae Keun Park ,  Ki Wook Lee ,  Ju Hoon Yoon

发明人： Robert Francis Darveaux ,  Michael Barrow ,  Miguel Angel Jimarez ,  Jae Dong Kim ,  Dae Keun Park ,  Ki Wook Lee ,  Ju Hoon Yoon

IPC分类号： H01L23/28

CPC分类号： H01L23/28 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/562 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105

摘要： An exposed die overmolded flip chip package includes a substrate. A die is flip chip mounted to an upper surface of the substrate. The package further includes a mold cap filling a space between an active surface of the die and the upper surface of the substrate. The mold cap includes a principal surface, sidewalls extending from the upper surface of the substrate to the principal surface, an annular surface coplanar with the inactive surface of the die and extending outward from a peripheral edge of the inactive surface of the die, and protruding surfaces extending between the principal surface and the annular surface. The mold cap does not cover the inactive surface of the die such that heat transfer from the die to the ambient environment is maximized and the package thickness is minimized.

摘要翻译： 曝光的芯片包覆成型的倒装芯片封装包括衬底。 芯片安装在基板的上表面上。 该包装还包括填充模具的活性表面和基材的上表面之间的空间的模具盖。 模具帽包括主表面，从基板的上表面延伸到主表面的侧壁，与模具的非活性表面共面并从模具的非活性表面的外围边缘向外延伸的环形表面，并且突出 表面在主表面和环形表面之间延伸。 模具盖不覆盖模具的非活性表面，使得从模具到周围环境的热传递最大化并且封装厚度最小化。

公开(公告)号：US07554194B2

公开(公告)日：2009-06-30

申请号：US11557884

申请日：2006-11-08

申请人： Michael G. Kelly ,  Ki Wook Lee ,  Chang Ho Jang

发明人： Michael G. Kelly ,  Ki Wook Lee ,  Chang Ho Jang

IPC分类号： H01L23/36

CPC分类号： H01L23/13 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package has a substrate having a first surface, a second surface, and a through hole opening. A heat spreader has a first surface, a second surface, and a plurality of notches formed on the second surface. A semiconductor die is coupled to the first surface of the heat spreader. The semiconductor die is electrically coupled to the substrate. An encapsulant is used to cover portions of the first surface of the substrate, portions of the first surface of the heat spreader, and the semiconductor die. A first set of solder balls is coupled to the second surface of the substrate. A second set of solder balls is coupled to the second surface of the heat spreader wherein the second set of solder balls is located in the notches.

摘要翻译： 半导体封装具有具有第一表面，第二表面和通孔开口的基板。 散热器具有形成在第二表面上的第一表面，第二表面和多个凹口。 半导体管芯耦合到散热器的第一表面。 半导体管芯电耦合到衬底。 密封剂用于覆盖基板的第一表面的部分，散热器的第一表面的部分和半导体管芯。 第一组焊球耦合到衬底的第二表面。 第二组焊球联接到散热器的第二表面，其中第二组焊球位于凹口中。

公开(公告)号：US20080122068A1

公开(公告)日：2008-05-29

申请号：US11557884

申请日：2006-11-08

申请人： Michael G. Kelly ,  Ki Wook Lee ,  Chang Ho Jang

发明人： Michael G. Kelly ,  Ki Wook Lee ,  Chang Ho Jang

IPC分类号： H01L23/36

CPC分类号： H01L23/13 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package has a substrate having a first surface, a second surface, and a through hole opening. A heat spreader has a first surface, a second surface, and a plurality of notches formed on the second surface. A semiconductor die is coupled to the first surface of the heat spreader. The semiconductor die is electrically coupled to the substrate. An encapsulant is used to cover portions of the first surface of the substrate, portions of the first surface of the heat spreader, and the semiconductor die. A first set of solder balls is coupled to the second surface of the substrate. A second set of solder balls is coupled to the second surface of the heat spreader wherein the second set of solder balls is located in the notches.

摘要翻译： 半导体封装具有具有第一表面，第二表面和通孔开口的基板。 散热器具有形成在第二表面上的第一表面，第二表面和多个凹口。 半导体管芯耦合到散热器的第一表面。 半导体管芯电耦合到衬底。 密封剂用于覆盖基板的第一表面的部分，散热器的第一表面的部分和半导体管芯。 第一组焊球耦合到衬底的第二表面。 第二组焊球联接到散热器的第二表面，其中第二组焊球位于凹口中。

公开(公告)号：US20070182383A1

公开(公告)日：2007-08-09

申请号：US11647124

申请日：2006-12-28

申请人： Jung-Woo Park ,  Ki-Wook Lee ,  Dong-Wook Kim

发明人： Jung-Woo Park ,  Ki-Wook Lee ,  Dong-Wook Kim

IPC分类号： H02P9/00

CPC分类号： H02P9/46 ,  H02J3/386 ,  H02P9/007 ,  Y02E10/763

摘要： Disclosed herein is an electric power converting device and power converting method for controlling doubly-fed induction generators, which provides a synchronous generator for generating auxiliary electric power independently of a doubly-fed induction generator so as to generate electricity even in a system power-free environment, a grid-side converter is composed of a three-phase four-wire converter so as to generate a balanced voltage even in an unbalanced load condition and automatically synchronize a stator voltage of a doubly-fed induction generator and a system voltage with each other.

摘要翻译： 本发明公开了一种用于控制双馈感应发电机的电力转换装置和电力转换方法，其提供了一种用于独立于双馈感应发电机产生辅助电力的同步发电机，以便即使在无系统的系统中也能发电 电网侧转换器由三相四线转换器构成，即使在不平衡负载条件下也能产生平衡电压，并且自动同步双馈感应发电机的定子电压和系统电压 其他。

公开(公告)号：US08207022B1

公开(公告)日：2012-06-26

申请号：US12931326

申请日：2011-01-27

申请人： Robert Francis Darveaux ,  Michael Barrow ,  Miguel Angel Jimarez ,  Jae Dong Kim ,  Dae Keun Park ,  Ki Wook Lee ,  Ju Hoon Yoon

发明人： Robert Francis Darveaux ,  Michael Barrow ,  Miguel Angel Jimarez ,  Jae Dong Kim ,  Dae Keun Park ,  Ki Wook Lee ,  Ju Hoon Yoon

IPC分类号： B29C31/00 ,  H01L23/29

CPC分类号： H01L23/28 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/562 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105

摘要： An exposed die overmolded flip chip package includes a substrate. A die is flip chip mounted to an upper surface of the substrate. The package further includes a mold cap filling a space between an active surface of the die and the upper surface of the substrate. The mold cap includes a principal surface, sidewalls extending from the upper surface of the substrate to the principal surface, an annular surface coplanar with the inactive surface of the die and extending outward from a peripheral edge of the inactive surface of the die, and protruding surfaces extending between the principal surface and the annular surface. The mold cap does not cover the inactive surface of the die such that heat transfer from the die to the ambient environment is maximized and the package thickness is minimized.

摘要翻译： 曝光的芯片包覆成型的倒装芯片封装包括衬底。 芯片安装在基板的上表面上。 该包装还包括填充模具的活性表面和基材的上表面之间的空间的模具盖。 模具帽包括主表面，从基板的上表面延伸到主表面的侧壁，与模具的非活性表面共面并从模具的非活性表面的外围边缘向外延伸的环形表面，并且突出 表面在主表面和环形表面之间延伸。 模具盖不覆盖模具的非活性表面，使得从模具到周围环境的热传递最大化并且封装厚度最小化。