Probe cards for probing integrated circuits
    3.
    发明授权
    Probe cards for probing integrated circuits 有权
    用于探测集成电路的探针卡

    公开(公告)号:US08957691B2

    公开(公告)日:2015-02-17

    申请号:US13278570

    申请日:2011-10-21

    摘要: A device includes a probe card, which further includes a chip. The chip includes a semiconductor substrate, a test engine disposed in the chip, wherein the test engine comprises a device formed on the semiconductor substrate, wherein the device is selected from the group consisting essentially of a passive device, an active device, and combinations thereof. A plurality of probe contacts is formed on a surface of the chip and electrically connected to the test engine.

    摘要翻译: 一种装置包括探针卡,其还包括芯片。 芯片包括半导体衬底,设置在芯片中的测试引擎,其中测试引擎包括形成在半导体衬底上的器件,其中器件选自基本上由无源器件,有源器件及其组合组成的组 。 多个探针触点形成在芯片的表面上并与测试引擎电连接。

    Power compensation in 3DIC testing
    4.
    发明授权
    Power compensation in 3DIC testing 有权
    3DIC测试中的功率补偿

    公开(公告)号:US08866488B2

    公开(公告)日:2014-10-21

    申请号:US13053951

    申请日:2011-03-22

    CPC分类号: G01R31/318513 G01R31/2886

    摘要: A device, such as a 3DIC stacked device includes a first device under test (DUT) connected to a first force pad by a first through substrate via (TSV) stack and connected to a first sense pad by a second TSV stack. The device further includes a second DUT stacked above the first DUT and connected to a second force pad and a second force pad by a second third TSV and connected to a second sense pad by a fourth TSV. Functional blocks on either the first or second blocks can be accessed for testing by way of the TSVs. In some applications the TSVs are vertically aligned to form TSV stacks.

    摘要翻译: 诸如3DIC堆叠设备的设备包括被第一通过衬底经由(TSV)堆叠连接到第一力垫的第一被测设备(DUT),并且通过第二TSV堆叠连接到第一感测焊盘。 该装置还包括堆叠在第一DUT上方的第二DUT,并通过第二个第三TSV连接到第二强制焊盘和第二受力垫,并通过第四TSV连接到第二传感焊盘。 可以访问第一或第二块上的功能块,以便通过TSV进行测试。 在一些应用中,TSV被垂直对准以形成TSV堆叠。

    PROBE CARD PARTITION SCHEME
    5.
    发明申请
    PROBE CARD PARTITION SCHEME 有权
    探针卡分割方案

    公开(公告)号:US20130093452A1

    公开(公告)日:2013-04-18

    申请号:US13273633

    申请日:2011-10-14

    IPC分类号: G01R31/00

    摘要: A method of probe card partitioning for testing an integrated circuit die includes providing a first probe card partition layout having a first number of distinct sections. Each distinct section uses a distinct probe card for testing. The first probe card partition layout is repartitioned into a second probe card partition layout having a second number of distinct sections. The second number is less than the first number.

    摘要翻译: 用于测试集成电路管芯的探针卡划分的方法包括提供具有第一数目不同部分的第一探针卡分区布局。 每个不同的部分都使用不同的探针卡进行测试。 第一探针卡分区布局被重新分配成具有第二数量不同部分的第二探针卡分区布局。 第二个数字小于第一个数字。

    Method and system of testing a semiconductor device
    6.
    发明授权
    Method and system of testing a semiconductor device 有权
    测试半导体器件的方法和系统

    公开(公告)号:US08400178B2

    公开(公告)日:2013-03-19

    申请号:US12431927

    申请日:2009-04-29

    IPC分类号: G01R31/02

    摘要: The present disclosure provides a semiconductor device, the device includes a substrate, a front-end structure formed in the substrate, a back-end structure formed on the front-end structure, a heater embedded in the back-end structure and operable to generate heat, and a sensor embedded in the back-end structure and operable to sense a temperature of the semiconductor device.

    摘要翻译: 本公开提供一种半导体器件,该器件包括衬底,形成在衬底中的前端结构,形成在前端结构上的后端结构,嵌入在后端结构中的加热器,可操作以产生 热和嵌入在后端结构中的传感器,并且可操作以感测半导体器件的温度。

    Test Schemes and Apparatus for Passive Interposers
    7.
    发明申请
    Test Schemes and Apparatus for Passive Interposers 有权
    被动介质的测试方案和设备

    公开(公告)号:US20130015872A1

    公开(公告)日:2013-01-17

    申请号:US13184008

    申请日:2011-07-15

    IPC分类号: G01R1/073 G01R31/20

    CPC分类号: G01R1/07385

    摘要: A probe card includes a plurality of probe pins, and a switch network connected to the plurality of probe pins. The switch network is configured to connect the plurality of probe pins in a first pattern, and reconnect the plurality of probe pins in a second pattern different from the first pattern.

    摘要翻译: 探针卡包括多个探针,以及连接到多个探针的开关网络。 开关网络被配置为以第一模式连接多个探针,并且以与第一图案不同的第二图案重新连接多个探针。

    Adaptive test sequence for testing integrated circuits
    8.
    发明授权
    Adaptive test sequence for testing integrated circuits 有权
    用于测试集成电路的自适应测试序列

    公开(公告)号:US09310437B2

    公开(公告)日:2016-04-12

    申请号:US13072325

    申请日:2011-03-25

    摘要: A method includes testing a first device and a second device identical to each other and comprising integrated circuits. The testing of the first device is performed according to a first test sequence of the first device, wherein the first test sequence includes a plurality of ordered test items, and wherein the first test sequence includes a test item. A test priority of the test item is calculated based on a frequency of fails of the test item in the testing of a plurality of devices having an identical structure as the first device. The first test sequence is then adjusted to generate a second test sequence in response to the test priority of the test item, wherein the second test sequence is different from the first test sequence. The second device is tested according to the second test sequence.

    摘要翻译: 一种方法包括测试彼此相同并包括集成电路的第一设备和第二设备。 根据第一装置的第一测试顺序执行第一装置的测试,其中第一测试序列包括多个有序测试项目,并且其中第一测试序列包括测试项目。 基于与具有与第一装置相同的结构的多个装置的测试中的测试项目的失败频率来计算测试项目的测试优先级。 然后调整第一测试序列以响应于测试项目的测试优先级产生第二测试序列,其中第二测试序列与第一测试序列不同。 根据第二个测试顺序对第二个设备进行测试。

    Dynamic testing based on thermal and stress conditions
    10.
    发明授权
    Dynamic testing based on thermal and stress conditions 有权
    基于热和应力条件的动态测试

    公开(公告)号:US08836355B2

    公开(公告)日:2014-09-16

    申请号:US13082769

    申请日:2011-04-08

    IPC分类号: G01R31/10 G01R31/28

    摘要: A plurality of sets of test conditions of a die in a stacked system is established, wherein the plurality of test conditions are functions of temperatures of the die, and wherein the stacked system comprises a plurality of stacked dies. A temperature of the die is measured. A respective set of test conditions of the die is found from the plurality of sets of test conditions, wherein the set of test conditions corresponds to the temperature. The die is at the temperature using the set of test conditions to generate test results.

    摘要翻译: 建立了堆叠系统中的模具的多组测试条件,其中多个测试条件是模具的温度的函数,并且其中堆叠的系统包括多个堆叠的模具。 测量模具的温度。 从多组测试条件中可以找到相应的模具测试条件,其中该组测试条件对应于温度。 模具在使用一组测试条件的温度下产生测试结果。