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公开(公告)号:US20150179622A1
公开(公告)日:2015-06-25
申请号:US14135209
申请日:2013-12-19
Applicant: Omkar Karhade , Nitin Deshpande
Inventor: Omkar Karhade , Nitin Deshpande
CPC classification number: H01L25/18 , H01L23/49811 , H01L23/49816 , H01L24/13 , H01L24/16 , H01L24/81 , H01L25/50 , H01L2224/1131 , H01L2224/13011 , H01L2224/13015 , H01L2224/13017 , H01L2224/13078 , H01L2224/13082 , H01L2224/13147 , H01L2224/16056 , H01L2224/16059 , H01L2224/16155 , H01L2224/16238 , H01L2224/8109 , H01L2224/81193 , H01L2224/81203 , H01L2224/81345 , H01L2224/81385 , H01L2224/81801 , H01L2224/81815 , H01L2924/12042 , H01L2924/1432 , H01L2924/1434 , H01L2924/3841 , H01L2924/00
Abstract: An electronic device including a solder pad structure and methods of forming an electrical interconnection are shown. Solder pads including one or more projections extending from the pads are shown where the projections occupy only a fraction of a surface area of the pads. Processes such as thermal compression bonding using solder pads as described area also shown.
Abstract translation: 示出了包括焊盘结构的电子设备和形成电互连的方法。 示出了包括从焊盘延伸的一个或多个突起的焊盘,其中突起仅占据焊盘表面积的一部分。 还示出了使用如所述区域的焊盘进行热压接的工艺。
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公开(公告)号:US20150163921A1
公开(公告)日:2015-06-11
申请号:US14102676
申请日:2013-12-11
Applicant: Sasha Oster , Robert L. Sankman , Charles Gealer , Omkar Karhade , John S. Guzek , Ravi V. Mahajan , James C. Matayabas, JR. , Johanna Swan , Feras Eid , Shawna Liff , Timothy McIntosh , Telesphor Teles Kamgaing , Adel Elsherbini , Kemal Aygun
Inventor: Sasha Oster , Robert L. Sankman , Charles Gealer , Omkar Karhade , John S. Guzek , Ravi V. Mahajan , James C. Matayabas, JR. , Johanna Swan , Feras Eid , Shawna Liff , Timothy McIntosh , Telesphor Teles Kamgaing , Adel Elsherbini , Kemal Aygun
CPC classification number: H05K1/189 , G06F1/163 , H01L21/568 , H01L24/19 , H01L24/96 , H01L2224/04105 , H01L2224/12105 , H01L2224/24137 , H01L2924/12042 , H01L2924/181 , H01L2924/18162 , H05K1/0393 , H05K1/181 , H05K1/185 , H05K13/0469 , H05K2201/0137 , H05K2203/1469 , Y10T29/49146 , H01L2924/00
Abstract: This disclosure relates generally to devices, systems, and methods for making a flexible microelectronic assembly. In an example, a polymer is molded over a microelectronic component, the polymer mold assuming a substantially rigid state following the molding. A routing layer is formed with respect to the microelectronic component and the polymer mold, the routing layer including traces electrically coupled to the microelectronic component. An input is applied to the polymer mold, the polymer mold transitioning from the substantially rigid state to a substantially flexible state upon application of the input.
Abstract translation: 本公开一般涉及用于制造柔性微电子组件的装置,系统和方法。 在一个实例中,聚合物模制在微电子部件上,聚合物模具在模制之后呈现基本刚性的状态。 相对于微电子部件和聚合物模具形成布线层,布线层包括电耦合到微电子部件的迹线。 输入被施加到聚合物模具,聚合物模具在施加输入时从基本刚性状态转变到基本上柔性的状态。
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公开(公告)号:US20230185034A1
公开(公告)日:2023-06-15
申请号:US17550520
申请日:2021-12-14
Applicant: Chia-Pin Chiu , Omkar Karhade , Kaveh Hosseini , Xiaoqian Li , Finian Rogers
Inventor: Chia-Pin Chiu , Omkar Karhade , Kaveh Hosseini , Xiaoqian Li , Finian Rogers
IPC: G02B6/42
CPC classification number: G02B6/4214 , G02B6/4271
Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes a laser package. In selected examples, the laser package can include a substrate having a substrate front surface and defining a cavity that extends into the substrate front surface. The laser package can further include a photonic integrated circuit (PIC) attached to the substrate within the cavity at a first surface of the PIC, and laser circuitry communicably coupled to a second surface of the PIC opposite the first surface.
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公开(公告)号:US20170169932A1
公开(公告)日:2017-06-15
申请号:US14969861
申请日:2015-12-15
Applicant: William J. Lambert , Kevin O'Brien , Omkar Karhade
Inventor: William J. Lambert , Kevin O'Brien , Omkar Karhade
CPC classification number: H01F27/2823 , C23C14/35 , C23C14/505 , C23C28/42 , C23C28/44 , H01F17/04 , H01F27/32 , H01F41/12
Abstract: Apparatus and methods are provided for a wire based inductor component. In an example, an inductor apparatus can include a wire and a plurality of individual layers of magnetic material surrounding the wire.
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5.
公开(公告)号:US20230207480A1
公开(公告)日:2023-06-29
申请号:US17561553
申请日:2021-12-23
Applicant: Omkar KARHADE , Nitin A. DESHPANDE
Inventor: Omkar KARHADE , Nitin A. DESHPANDE
IPC: H01L23/544 , H01L23/495 , H01L23/00
CPC classification number: H01L23/544 , H01L23/49524 , H01L23/49582 , H01L24/08 , H01L2223/54426 , H01L2224/08145
Abstract: Embodiments disclosed herein include semiconductor devices. In an embodiment, a die comprises a substrate, where the substrate comprises a semiconductor material. In an embodiment a fiducial is on the substrate. In an embodiment, the fiducial is a cantilever beam that extends out past an edge of the substrate.
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6.
公开(公告)号:US20200098727A1
公开(公告)日:2020-03-26
申请号:US16141415
申请日:2018-09-25
Applicant: Debendra Mallik , Robert L. Sankman , Sanka Ganesan , George Vakanas , Omkar Karhade , Sri Chaitra Jyotsna Chavali , Zhaozhi George Li , Holly A. Sawyer
Inventor: Debendra Mallik , Robert L. Sankman , Sanka Ganesan , George Vakanas , Omkar Karhade , Sri Chaitra Jyotsna Chavali , Zhaozhi George Li , Holly A. Sawyer
IPC: H01L25/065 , H01L25/00 , H01L23/00 , H01L23/538
Abstract: A wire-bond memory die is coupled to a system-on-chip processor where the processor is flip-chip mounted on a semiconductor package substrate, and the wire-bond memory die is also flip-chip configured through a redistribution layer that pins out to a series of pillars that contact the semiconductor package substrate. The wire-bond memory die is stacked on the processor and the redistribution layer overhangs the processor to contact the series of pillars.
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公开(公告)号:US20140357020A1
公开(公告)日:2014-12-04
申请号:US13908016
申请日:2013-06-03
Applicant: Aleksandar Aleksov , Ravindranath V. Mahajan , Omkar Karhade , Nitin Deshpande
Inventor: Aleksandar Aleksov , Ravindranath V. Mahajan , Omkar Karhade , Nitin Deshpande
IPC: H01L23/00
CPC classification number: H01L24/83 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/67709 , H01L21/6835 , H01L23/13 , H01L23/15 , H01L24/19 , H01L24/20 , H01L24/29 , H01L24/32 , H01L24/81 , H01L24/82 , H01L24/92 , H01L24/96 , H01L2221/68309 , H01L2221/68313 , H01L2221/68331 , H01L2221/68363 , H01L2224/04105 , H01L2224/2101 , H01L2224/2919 , H01L2224/32237 , H01L2224/73204 , H01L2224/73267 , H01L2224/81001 , H01L2224/81005 , H01L2224/8312 , H01L2224/92244 , H01L2224/96 , H01L2924/12042 , H01L2924/15153 , H01L2924/181 , H01L2224/19 , H01L2924/00014 , H01L2924/00
Abstract: The subject matter of the present description relates to methods for the precise integration of microelectronic dice within a multichip package which substantially reduce or eliminate any misalign caused by the movement of the microelectronic dice during the integration process. These methods may include the use of a temporary adhesive in conjunction with a carrier having at least one recess for microelectronic die alignment, the use of a precision molded carrier for microelectronic die alignment, the use of magnetic alignment of microelectronic dice on a reusable carrier, and/or the use of a temporary adhesive with molding processes on a reusable carrier.
Abstract translation: 本说明书的主题涉及用于在多芯片封装内精确地集成微电子管芯的方法,其基本上减少或消除了在整合过程期间由微电子管芯的移动引起的任何不对准。 这些方法可以包括使用临时粘合剂与具有用于微电子管芯对准的至少一个凹部的载体的使用,使用用于微电子管芯对准的精密模制载体,在可重复使用的载体上使用微电子骰子的磁对准, 和/或在可重复使用的载体上使用具有模制工艺的临时粘合剂。
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