公开(公告)号：US08362571B1

公开(公告)日：2013-01-29

申请号：US13016660

申请日：2011-01-28

申请人： Qingguo Wu ,  James S. Sims ,  Mandyam Sriram ,  Seshasayee Varadarajan ,  Haiying Fu ,  Pramod Subramonium ,  Jon Henri ,  Sirish Reddy

发明人： Qingguo Wu ,  James S. Sims ,  Mandyam Sriram ,  Seshasayee Varadarajan ,  Haiying Fu ,  Pramod Subramonium ,  Jon Henri ,  Sirish Reddy

IPC分类号： H01L21/02

CPC分类号： H01L21/02115 ,  H01L21/02274 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/665 ,  H01L29/7843 ,  H01L29/7848

摘要： Transistor architectures and fabrication processes generate channel strain without adversely impacting the efficiency of the transistor fabrication process while preserving the material quality and enhancing the performance of the resulting transistor. Transistor strain is generated is PMOS devices using a highly compressive post-salicide amorphous carbon capping layer applied as a blanket over on at least the source and drain regions. The stress from this capping layer is uniaxially transferred to the PMOS channel through the source-drain regions to create compressive strain in PMOS channel.

摘要翻译： 晶体管架构和制造工艺产生通道应变，而不会不利地影响晶体管制造工艺的效率，同时保持材料质量并增强所得晶体管的性能。 产生晶体管应变是使用在至少源极和漏极区上作为覆盖层施加的高度压缩的后自适应硅化物非晶碳覆盖层的PMOS器件。 来自该覆盖层的应力通过源极 - 漏极区域单轴转移到PMOS沟道，以在PMOS沟道中产生压缩应变。

公开(公告)号：US07998881B1

公开(公告)日：2011-08-16

申请号：US12134961

申请日：2008-06-06

申请人： Qingguo Wu ,  James S. Sims ,  Mandyam Sriram ,  Seshasayee Varadarajan ,  Akhil Singhal

发明人： Qingguo Wu ,  James S. Sims ,  Mandyam Sriram ,  Seshasayee Varadarajan ,  Akhil Singhal

IPC分类号： H01L21/469

CPC分类号： H01L21/76834 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/823807 ,  H01L29/665 ,  H01L29/7843

摘要： Transistor architectures and fabrication processes generate channel strain without adversely impacting the efficiency of the transistor fabrication process while preserving the material quality and enhancing the performance of the resulting transistor. Transistor strain is generated is PMOS devices using a highly compressive post-salicide boron doped carbon capping layer applied as a blanket over on at least the source and drain regions. The stress from this capping layer is uniaxially transferred to the PMOS channel through the source-drain regions to create compressive strain in PMOS channel.

摘要翻译： 晶体管架构和制造工艺产生通道应变，而不会不利地影响晶体管制造工艺的效率，同时保持材料质量并增强所得晶体管的性能。 产生晶体管应变是使用在至少源极和漏极区上作为覆盖层施加的高度压缩的后硅化物硼掺杂碳覆盖层的PMOS器件。 来自该覆盖层的应力通过源极 - 漏极区域单轴转移到PMOS沟道，以在PMOS沟道中产生压缩应变。

公开(公告)号：US07906817B1

公开(公告)日：2011-03-15

申请号：US12134969

申请日：2008-06-06

申请人： Qingguo Wu ,  James S. Sims ,  Mandyam Sriram ,  Seshasayee Varadarajan ,  Haiying Fu ,  Pramod Subramonium ,  Jon Henri ,  Sirish Reddy

发明人： Qingguo Wu ,  James S. Sims ,  Mandyam Sriram ,  Seshasayee Varadarajan ,  Haiying Fu ,  Pramod Subramonium ,  Jon Henri ,  Sirish Reddy

IPC分类号： H01L29/76

CPC分类号： H01L21/02115 ,  H01L21/02274 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/665 ,  H01L29/7843 ,  H01L29/7848

摘要： Transistor architectures and fabrication processes generate channel strain without adversely impacting the efficiency of the transistor fabrication process while preserving the material quality and enhancing the performance of the resulting transistor. Transistor strain is generated is PMOS devices using a highly compressive post-salicide amorphous carbon capping layer applied as a blanket over on at least the source and drain regions. The stress from this capping layer is uniaxially transferred to the PMOS channel through the source-drain regions to create compressive strain in PMOS channel.

摘要翻译： 晶体管架构和制造工艺产生通道应变，而不会不利地影响晶体管制造工艺的效率，同时保持材料质量并增强所得晶体管的性能。 产生晶体管应变是使用在至少源极和漏极区上作为覆盖层施加的高度压缩的后自适应硅化物非晶碳覆盖层的PMOS器件。 来自该覆盖层的应力通过源极 - 漏极区域单轴转移到PMOS沟道，以在PMOS沟道中产生压缩应变。

公开(公告)号：US07799705B1

公开(公告)日：2010-09-21

申请号：US12348791

申请日：2009-01-05

申请人： Qingguo Wu ,  Haiying Fu ,  David C. Smith ,  David Mordo

发明人： Qingguo Wu ,  Haiying Fu ,  David C. Smith ,  David Mordo

IPC分类号： H01L21/31 ,  H01L21/469 ,  C23C16/40 ,  C23C16/56

CPC分类号： H01L21/31695 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02274 ,  H01L21/02348

摘要： Methods of preparing a low stress porous low-k dielectric material on a substrate are provided. The methods involve the use of a structure former precursor and/or porogen precursor with one or more organic functional groups. In some cases, the structure former precursor has carbon-carbon double or triple bonds. In other cases, one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. In other cases, the structure former precursor has carbon-carbon double or triple bonds and one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. Once the precursor film is formed, the porogen is removed, leaving a porous low-k dielectric matrix with high mechanical strength. Different types of structure former precursors and porogen precursors are described. The resulting low stress low-k porous film may be used as a low-k dielectric film in integrated circuit manufacturing applications.

摘要翻译： 提供了在基片上制备低应力多孔低k介电材料的方法。 所述方法涉及使用具有一个或多个有机官能团的结构前体前体和/或致孔剂前体。 在一些情况下，结构前体具有碳 - 碳双键或三键。 在其他情况下，结构前体前体和致孔剂前体中的一种或两种具有一个或多个大体积的有机基团。 在其他情况下，结构前体具有碳 - 碳双键或三键，结构形成前体和致孔剂前体中的一种或两种具有一个或多个大体积的有机基团。 一旦形成前体膜，去除致孔剂，留下具有高机械强度的多孔低k电介质基质。 描述了不同类型的结构前体前体和致孔剂前体。 所得到的低应力低k多孔膜可用作集成电路制造应用中的低k电介质膜。

公开(公告)号：US07737525B1

公开(公告)日：2010-06-15

申请号：US11936754

申请日：2007-11-07

申请人： Qingguo Wu ,  Haiying Fu ,  Xingyuan Tang

发明人： Qingguo Wu ,  Haiying Fu ,  Xingyuan Tang

IPC分类号： H01L23/00

CPC分类号： C23C16/517 ,  C23C16/401 ,  C23C16/505

摘要： Methods of preparing a carbon doped oxide (CDO) layers having a low dielectric constant are provided. The methods involve, for instance, providing a substrate to a deposition chamber and exposing it to one or multiple carbon-doped oxide precursors having molecules with at least one carbon-carbon triple bond, or carbon-carbon double bond, or a combination of these groups and depositing the carbon doped oxide dielectric layer under conditions in which the resulting dielectric layer has a dielectric constant of not greater than about 2.7.

摘要翻译： 提供了制备具有低介电常数的碳掺杂氧化物（CDO）层的方法。 所述方法包括例如向沉积室提供衬底并将其暴露于具有至少一个碳 - 碳三键或碳 - 碳双键的分子的一个或多个碳掺杂氧化物前体，或其组合 并在所得介电层的介电常数不大于约2.7的条件下沉积碳掺杂的氧化物介电层。

公开(公告)号：US07112615B2

公开(公告)日：2006-09-26

申请号：US10624959

申请日：2003-07-22

申请人： Karen K. Gleason ,  Qingguo Wu ,  April Ross

发明人： Karen K. Gleason ,  Qingguo Wu ,  April Ross

IPC分类号： C08J9/26

CPC分类号： C30B5/00 ,  C30B25/105 ,  C30B29/60 ,  Y10S438/96

摘要： Methods and systems are disclosed for fabricating ultra-low dielectric constant porous materials. In one aspect of the invention, a method for making porous low-k films is disclosed. The method uses polymer based porogens as sacrificial templates around which a chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD) deposited matrix is formed. Upon pyrolysis, the porogens decompose resulting in a porous ultra-low dielectric material. This method can be used, for example, to produce porous organosilicate glass (OSG) materials, ultra-low dielectric nanoporous materials, porous ceramics, porous scaffolds, and/or porous metals. Various uses and embodiments of the methods and systems of this invention are disclosed.

摘要翻译： 公开了用于制造超低介电常数多孔材料的方法和系统。 在本发明的一个方面，公开了一种制造多孔低k膜的方法。 该方法使用基于聚合物的致孔剂作为牺牲模板，在其周围形成化学气相沉积（CVD）或等离子体增强化学气相沉积（PECVD）沉积基质。 热解后，致孔剂分解，产生多孔超低介电材料。 该方法可用于例如生产多孔有机硅酸盐玻璃（OSG）材料，超低介电纳米多孔材料，多孔陶瓷，多孔支架和/或多孔金属。 公开了本发明的方法和系统的各种用途和实施例。

公开(公告)号：US07326444B1

公开(公告)日：2008-02-05

申请号：US10941502

申请日：2004-09-14

申请人： Qingguo Wu ,  Dong Niu ,  Honghong Wang ,  Haiying Fu

发明人： Qingguo Wu ,  Dong Niu ,  Honghong Wang ,  Haiying Fu

IPC分类号： H05H1/24

CPC分类号： C23C16/401 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31633

摘要： Methods of preparing a carbon doped oxide (CDO) layer with a low dielectric constant (

摘要翻译： 提供具有低介电常数（<3）和低残留应力的碳掺杂氧化物（CDO）层的制备方法，而不牺牲重蚀刻速率，湿法清洗时的膜稳定性，漏电流和消光系数等重要的整合性能 。 所述方法包括例如向沉积室提供衬底并将其暴露于具有至少一个碳 - 碳三键的分子的化学前体，随后使用具有高的高频功率的射频功率点火和保持沉积室中的等离子体 和低频分量或仅一个频率分量，以及在所得介电层具有约-20至30MPa之间的压缩应力或拉伸应力和介电常数介于约2.5之间的条件下沉积碳掺杂氧化物膜， 3.0，C≡C与SiO键的比率在约0.05％至5％之间，SiC与SiO键的比例在约2％至10％之间，折射率（RI）为1.39-1.52，在633nm处测得。

公开(公告)号：US07241704B1

公开(公告)日：2007-07-10

申请号：US10927777

申请日：2004-08-27

申请人： Qingguo Wu ,  Haiying Fu ,  David C. Smith ,  David Mordo

发明人： Qingguo Wu ,  Haiying Fu ,  David C. Smith ,  David Mordo

IPC分类号： H01L21/31 ,  H01L21/469 ,  C23C16/40 ,  C23C16/56

CPC分类号： C23C16/402 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02348 ,  H01L21/31695

摘要： Methods of preparing a low stress porous low-k dielectric material on a substrate are provided. The methods involve the use of a structure former precursor and/or porogen precursor with one or more organic functional groups. In some cases, the structure former precursor has carbon-carbon double or triple bonds. In other cases, one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. In other cases, the structure former precursor has carbon-carbon double or triple bonds and one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. Once the precursor film is formed, the porogen is removed, leaving a porous low-k dielectric matrix with high mechanical strength. Different types of structure former precursors and porogen precursors are described. The resulting low stress low-k porous film may be used as a low-k dielectric film in integrated circuit manufacturing applications.

摘要翻译： 提供了在基片上制备低应力多孔低k介电材料的方法。 所述方法涉及使用具有一个或多个有机官能团的结构前体前体和/或致孔剂前体。 在一些情况下，结构前体具有碳 - 碳双键或三键。 在其他情况下，结构前体前体和致孔剂前体中的一种或两种具有一个或多个大体积的有机基团。 在其他情况下，结构前体具有碳 - 碳双键或三键，结构形成前体和致孔剂前体中的一种或两种具有一个或多个大体积的有机基团。 一旦形成前体膜，去除致孔剂，留下具有高机械强度的多孔低k电介质基质。 描述了不同类型的结构前体前体和致孔剂前体。 所得到的低应力低k多孔膜可用作集成电路制造应用中的低k电介质膜。

公开(公告)号：US07781351B1

公开(公告)日：2010-08-24

申请号：US10820525

申请日：2004-04-07

申请人： Qingguo Wu ,  Haiying Fu ,  Dong Niu ,  Ananda K. Bandyopadhyay ,  David Mordo

发明人： Qingguo Wu ,  Haiying Fu ,  Dong Niu ,  Ananda K. Bandyopadhyay ,  David Mordo

IPC分类号： H01L21/31

CPC分类号： H01L21/31633 ,  C23C16/30 ,  C23C16/401 ,  C23C16/505 ,  H01L21/02126 ,  H01L21/02208 ,  H01L21/02274 ,  H01L21/0228

摘要： Methods of preparing a carbon doped oxide (CDO) layer of low dielectric constant and low residual stress involving, for instance, providing a substrate to a deposition chamber and exposing it to an organosilicon precursor containing unsaturated C—C bonds or to multiple organic precursors including at least one organosilicon and at least one unsaturated C—C bond are provided. The methods may also involve igniting and maintaining a plasma in a deposition chamber using radio frequency power having high and low frequency components with a high percentage of the low frequency component, and depositing the carbon doped dielectric layer under conditions in which the resulting dielectric layer has a residual stress of not greater than, e.g., about 50 MPa, and a dielectric constant not greater than about 3.

摘要翻译： 制备低介电常数和低残余应力的碳掺杂氧化物（CDO）层的方法，涉及例如提供衬底至沉积室并将其暴露于含有不饱和C-C键的有机硅前体或多种有机前体，包括 提供至少一种有机硅和至少一种不饱和C-C键。 所述方法还可以包括使用具有高百分比的低频分量的高频和低频分量的射频功率在沉积室中点燃和维持等离子体，以及在所得介电层具有的条件下沉积碳掺杂介电层 残余应力不大于例如约50MPa，介电常数不大于约3。

公开(公告)号：US20090239390A1

公开(公告)日：2009-09-24

申请号：US12479114

申请日：2009-06-05

申请人： Qingguo Wu ,  Haiying Fu

发明人： Qingguo Wu ,  Haiying Fu

IPC分类号： H01L21/312

CPC分类号： H01L21/31695 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02274 ,  H01L21/02348

摘要： Methods of preparing a carbon doped oxide (CDO) layers having a low dielectric constant are provided. The methods involve, for instance, providing a substrate to a deposition chamber and exposing it to one or multiple carbon-doped oxide precursors having molecules with at least one carbon-carbon triple bond, or carbon-carbon double bond, or a combination of these groups and depositing the carbon doped oxide dielectric layer under conditions in which the resulting dielectric layer has a dielectric constant of not greater than about 2.7. Methods of preparing a low stress porous low-k dielectric material on a substrate are provided. The methods involve the use of a structure former precursor and/or porogen precursor with one or more organic functional groups. In some cases, the structure former precursor has carbon-carbon double or triple bonds. In other cases, one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. In other cases, the structure former precursor has carbon-carbon double or triple bonds and one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. Once the precursor film is formed, the porogen is removed, leaving a porous low-k dielectric matrix with high mechanical strength. Different types of structure former precursors and porogen precursors are described. The resulting low stress low-k porous film may be used as a low-k dielectric film in integrated circuit manufacturing applications.

摘要翻译： 提供了制备具有低介电常数的碳掺杂氧化物（CDO）层的方法。 所述方法包括例如向沉积室提供衬底并将其暴露于具有至少一个碳 - 碳三键或碳 - 碳双键的分子的一个或多个碳掺杂氧化物前体，或其组合 并在所得介电层的介电常数不大于约2.7的条件下沉积碳掺杂的氧化物介电层。 提供了在基片上制备低应力多孔低k介电材料的方法。 所述方法包括使用具有一个或多个有机官能团的结构前体前体和/或致孔剂前体。 在一些情况下，结构前体具有碳 - 碳双键或三键。 在其他情况下，结构前体前体和致孔剂前体中的一种或两种具有一个或多个大体积的有机基团。 在其他情况下，结构前体具有碳 - 碳双键或三键，结构形成前体和致孔剂前体中的一种或两种具有一个或多个大体积的有机基团。 一旦形成前体膜，去除致孔剂，留下具有高机械强度的多孔低k电介质基质。 描述了不同类型的结构前体前体和致孔剂前体。 所得到的低应力低k多孔膜可用作集成电路制造应用中的低k电介质膜。