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    Method for making high stress boron-doped carbon films
    3.
    发明授权
    Method for making high stress boron-doped carbon films 有权
    制备高应力硼掺杂碳膜的方法

    公开(公告)号：US07998881B1

    公开(公告)日：2011-08-16

    申请号：US12134961

    申请日：2008-06-06

    申请人： Qingguo Wu ,  James S. Sims ,  Mandyam Sriram ,  Seshasayee Varadarajan ,  Akhil Singhal

    发明人： Qingguo Wu ,  James S. Sims ,  Mandyam Sriram ,  Seshasayee Varadarajan ,  Akhil Singhal

    IPC分类号： H01L21/469

    CPC分类号： H01L21/76834 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/823807 ,  H01L29/665 ,  H01L29/7843

    摘要： Transistor architectures and fabrication processes generate channel strain without adversely impacting the efficiency of the transistor fabrication process while preserving the material quality and enhancing the performance of the resulting transistor. Transistor strain is generated is PMOS devices using a highly compressive post-salicide boron doped carbon capping layer applied as a blanket over on at least the source and drain regions. The stress from this capping layer is uniaxially transferred to the PMOS channel through the source-drain regions to create compressive strain in PMOS channel.

    摘要翻译： 晶体管架构和制造工艺产生通道应变，而不会不利地影响晶体管制造工艺的效率，同时保持材料质量并增强所得晶体管的性能。 产生晶体管应变是使用在至少源极和漏极区上作为覆盖层施加的高度压缩的后硅化物硼掺杂碳覆盖层的PMOS器件。 来自该覆盖层的应力通过源极 - 漏极区域单轴转移到PMOS沟道，以在PMOS沟道中产生压缩应变。

    Selective Capping of Metal Interconnect Lines during Air Gap Formation
    6.
    发明申请
    Selective Capping of Metal Interconnect Lines during Air Gap Formation 审中-公开
    金属互连线在空气间隙形成期间的选择性封盖

    公开(公告)号：US20130323930A1

    公开(公告)日：2013-12-05

    申请号：US13482786

    申请日：2012-05-29

    申请人： Kaushik Chattopadhyay ,  George A. Antonelli ,  Pramod Subramonium ,  Mandyam Sriram ,  Tighe A. Spurlin

    发明人： Kaushik Chattopadhyay ,  George A. Antonelli ,  Pramod Subramonium ,  Mandyam Sriram ,  Tighe A. Spurlin

    IPC分类号： H01L21/02

    CPC分类号： H01L21/02107 ,  H01L21/02074 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/7682 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76883

    摘要： Provided are methods and systems for forming air gaps in an interconnect layer between adjacent conductive lines. Protective layers may be selectively formed on exposed surfaces of the conductive lines, while structures in between the lines may remain unprotected. These structures may be made from a sacrificial material that is later removed to form voids. In certain embodiments, the structures are covered with a permeable non-protective layer that allows etchants and etching products to pass through during removal. When a work piece having a selectively formed protective layer is exposed to gas or liquid etchants, these etchants remove the sacrificial material without etching or otherwise impacting the metal lines. Voids formed in between these lines may be then partially filled with a dielectric material to seal the voids and/or protect sides of the metal lines. Additional interconnect layers may be formed above the processed layer containing air gaps.

    摘要翻译： 提供了用于在相邻导电线之间的互连层中形成气隙的方法和系统。 可以在导电线的暴露表面上选择性地形成保护层，而线之间的结构可以保持不受保护。 这些结构可以由稍后去除以形成空隙的牺牲材料制成。 在某些实施方案中，结构被可渗透的非保护层覆盖，其允许蚀刻剂和蚀刻产物在去除期间通过。 当具有选择性形成的保护层的工件暴露于气体或液体蚀刻剂时，这些蚀刻剂在不蚀刻或以其他方式冲击金属线的情况下去除牺牲材料。 然后可以在这些线之间形成的空隙部分地填充有电介质材料以密封空隙和/或保护金属线的侧面。 附加的互连层可以形成在包含气隙的处理层之上。

    DEPOSITING CONFORMAL BORON NITRIDE FILMS
    8.
    发明申请
    DEPOSITING CONFORMAL BORON NITRIDE FILMS 有权
    沉积一致的硼酸盐膜

    公开(公告)号：US20130008378A1

    公开(公告)日：2013-01-10

    申请号：US13615318

    申请日：2012-09-13

    申请人： George Andrew Antonelli ,  Mandyam Sriram ,  Vishwanathan Rangarajan ,  Pramod Subramonium

    发明人： George Andrew Antonelli ,  Mandyam Sriram ,  Vishwanathan Rangarajan ,  Pramod Subramonium

    IPC分类号： C23C16/52

    CPC分类号： H01L21/02112 ,  C23C16/342 ,  C23C16/56 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/02315 ,  H01L21/0234 ,  H01L29/4983 ,  H01L29/517 ,  H01L29/665 ,  H01L29/7843

    摘要： A method of forming a boron nitride or boron carbon nitride dielectric produces a conformal layer without loading effect. The dielectric layer is formed by chemical vapor deposition (CVD) of a boron-containing film on a substrate, at least a portion of the deposition being conducted without plasma, and then exposing the deposited boron-containing film to a plasma. The CVD component dominates the deposition process, producing a conformal film without loading effect. The dielectric is ashable, and can be removed with a hydrogen plasma without impacting surrounding materials. The dielectric has a much lower wet etch rate compared to other front end spacer or hard mask materials such as silicon oxide or silicon nitride, and has a relatively low dielectric constant, much lower then silicon nitride.

    摘要翻译： 形成氮化硼或氮化硼介质的方法产生没有负载效应的共形层。 介电层通过基板上的含硼膜的化学气相沉积（CVD）形成，至少部分沉积不经等离子体进行，然后将沉积的含硼膜暴露于等离子体。 CVD组件主导沉积过程，产生不带负载效应的保形膜。 电介质是可灰化的，并且可以用氢等离子体除去而不会影响周围的材料。 与其它前端隔离物或诸如氧化硅或氮化硅的硬掩模材料相比，电介质具有低得多的湿蚀刻速率，并且具有比氮化硅低得多的介电常数。

    DEPOSITING CONFORMAL BORON NITRIDE FILMS
    9.
    发明申请
    DEPOSITING CONFORMAL BORON NITRIDE FILMS 有权
    沉积一致的硼酸盐膜

    公开(公告)号：US20110244694A1

    公开(公告)日：2011-10-06

    申请号：US12750180

    申请日：2010-03-30

    申请人： George Andrew Antonelli ,  Mandyam Sriram ,  Vishwanathan Rangarajan ,  Pramod Subramonium

    发明人： George Andrew Antonelli ,  Mandyam Sriram ,  Vishwanathan Rangarajan ,  Pramod Subramonium

    IPC分类号： H01L21/318 ,  B05C11/00 ,  H01L21/3105

    CPC分类号： H01L21/02112 ,  C23C16/342 ,  C23C16/56 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/02315 ,  H01L21/0234 ,  H01L29/4983 ,  H01L29/517 ,  H01L29/665 ,  H01L29/7843

    摘要： A method of forming a boron nitride or boron carbon nitride dielectric produces a conformal layer without loading effect. The dielectric layer is formed by chemical vapor deposition (CVD) of a boron-containing film on a substrate, at least a portion of the deposition being conducted without plasma, and then exposing the deposited boron-containing film to a plasma. The CVD component dominates the deposition process, producing a conformal film without loading effect. The dielectric is ashable, and can be removed with a hydrogen plasma without impacting surrounding materials. The dielectric has a much lower wet etch rate compared to other front end spacer or hard mask materials such as silicon oxide or silicon nitride, and has a relatively low dielectric constant, much lower then silicon nitride.

    摘要翻译： 形成氮化硼或氮化硼介质的方法产生没有负载效应的共形层。 介电层通过基板上的含硼膜的化学气相沉积（CVD）形成，至少部分沉积不经等离子体进行，然后将沉积的含硼膜暴露于等离子体。 CVD组件主导沉积过程，产生不带负载效应的保形膜。 电介质是可灰化的，并且可以用氢等离子体除去而不会影响周围的材料。 与其它前端隔离物或诸如氧化硅或氮化硅的硬掩模材料相比，电介质具有低得多的湿蚀刻速率，并且具有比氮化硅低得多的介电常数。

    Depositing conformal boron nitride film by CVD without plasma
    10.
    发明授权
    Depositing conformal boron nitride film by CVD without plasma 有权
    通过没有等离子体的CVD沉积保形氮化硼膜

    公开(公告)号：US08288292B2

    公开(公告)日：2012-10-16

    申请号：US12750180

    申请日：2010-03-30

    申请人： George Andrew Antonelli ,  Mandyam Sriram ,  Vishwanathan Rangarajan ,  Pramod Subramonium

    发明人： George Andrew Antonelli ,  Mandyam Sriram ,  Vishwanathan Rangarajan ,  Pramod Subramonium

    IPC分类号： H01L21/469

    CPC分类号： H01L21/02112 ,  C23C16/342 ,  C23C16/56 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/02315 ,  H01L21/0234 ,  H01L29/4983 ,  H01L29/517 ,  H01L29/665 ,  H01L29/7843

    摘要： A method of forming a boron nitride or boron carbon nitride dielectric produces a conformal layer without loading effect. The dielectric layer is formed by chemical vapor deposition (CVD) of a boron-containing film on a substrate, at least a portion of the deposition being conducted without plasma, and then exposing the deposited boron-containing film to a plasma. The CVD component dominates the deposition process, producing a conformal film without loading effect. The dielectric is ashable, and can be removed with a hydrogen plasma without impacting surrounding materials. The dielectric has a much lower wet etch rate compared to other front end spacer or hard mask materials such as silicon oxide or silicon nitride, and has a relatively low dielectric constant, much lower than silicon nitride.

    摘要翻译： 形成氮化硼或氮化硼介质的方法产生没有负载效应的共形层。 介电层通过基板上的含硼膜的化学气相沉积（CVD）形成，至少部分沉积不经等离子体进行，然后将沉积的含硼膜暴露于等离子体。 CVD组件主导沉积过程，产生不带负载效应的保形膜。 电介质是可灰化的，并且可以用氢等离子体除去而不会影响周围的材料。 与其它前端间隔物或诸如氧化硅或氮化硅的硬掩模材料相比，电介质具有低得多的湿蚀刻速率，并且具有比氮化硅低得多的介电常数。