公开(公告)号：US09412720B2

公开(公告)日：2016-08-09

申请号：US14184951

申请日：2014-02-20

申请人： Tae-Duk Nam ,  Jin-Ho Kim ,  Hyuk-Su Kim ,  Hyoung-Suk Kim ,  Tae-Young Lee

发明人： Tae-Duk Nam ,  Jin-Ho Kim ,  Hyuk-Su Kim ,  Hyoung-Suk Kim ,  Tae-Young Lee

IPC分类号： H01L25/065 ,  H01L25/00 ,  H01L23/31 ,  H01L23/00 ,  H01L25/18

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32265 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/01013 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2924/014 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A semiconductor package may include a packaging substrate, a first semiconductor chip on the packaging substrate, and a support plate on the packaging substrate. The support plate may be spaced apart from the first semiconductor chip in a direction parallel with respect to a surface of the packaging substrate. A second semiconductor chip may be provided on the first semiconductor chip and on the support plate so that the first semiconductor chip is between the second semiconductor chip and the packaging substrate and so that the support plate is between the second semiconductor chip and the packaging substrate. An adhesion layer may bond the second semiconductor chip to the first semiconductor chip and may bond the second semiconductor chip to the support plate. In addition, an electrical coupling may be provided between the first semiconductor chip and the packaging substrate.

摘要翻译： 半导体封装可以包括封装衬底，封装衬底上的第一半导体芯片，以及封装衬底上的支撑板。 支撑板可以在相对于包装基板的表面平行的方向上与第一半导体芯片间隔开。 可以在第一半导体芯片和支撑板上设置第二半导体芯片，使得第一半导体芯片在第二半导体芯片和封装基板之间，并且支撑板位于第二半导体芯片和封装基板之间。 粘合层可以将第二半导体芯片接合到第一半导体芯片，并且可以将第二半导体芯片接合到支撑板。 此外，可以在第一半导体芯片和封装基板之间设置电耦合。

公开(公告)号：US20060255471A1

公开(公告)日：2006-11-16

申请号：US11404756

申请日：2006-04-17

申请人： Yong-Kwan Lee ,  Tae-Duk Nam

发明人： Yong-Kwan Lee ,  Tae-Duk Nam

IPC分类号： H01L23/48

CPC分类号： H01L23/562 ,  H01L23/4334 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： The flip chip package includes a semiconductor chip electrically connected to a circuit substrate. A protective cap is disposed over the semiconductor chip, and includes at least one portion extending beyond an edge of the semiconductor chip.

摘要翻译： 倒装芯片封装包括电连接到电路基板的半导体芯片。 保护帽设置在半导体芯片的上方，并且包括延伸超出半导体芯片的边缘的至少一个部分。

公开(公告)号：US08674494B2

公开(公告)日：2014-03-18

申请号：US13564309

申请日：2012-08-01

申请人： Tae-Duk Nam ,  Jin-Ho Kim ,  Hyuk-Su Kim ,  Hyoung-Suk Kim ,  Tae-Young Lee

发明人： Tae-Duk Nam ,  Jin-Ho Kim ,  Hyuk-Su Kim ,  Hyoung-Suk Kim ,  Tae-Young Lee

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32265 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/01013 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2924/014 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A semiconductor package may include a packaging substrate, a first semiconductor chip on the packaging substrate, and a support plate on the packaging substrate. The support plate may be spaced apart from the first semiconductor chip in a direction parallel with respect to a surface of the packaging substrate. A second semiconductor chip may be provided on the first semiconductor chip and on the support plate so that the first semiconductor chip is between the second semiconductor chip and the packaging substrate and so that the support plate is between the second semiconductor chip and the packaging substrate. An adhesion layer may bond the second semiconductor chip to the first semiconductor chip and may bond the second semiconductor chip to the support plate. In addition, an electrical coupling may be provided between the first semiconductor chip and the packaging substrate.

摘要翻译： 半导体封装可以包括封装衬底，封装衬底上的第一半导体芯片，以及封装衬底上的支撑板。 支撑板可以在相对于包装基板的表面平行的方向上与第一半导体芯片间隔开。 可以在第一半导体芯片和支撑板上设置第二半导体芯片，使得第一半导体芯片在第二半导体芯片和封装基板之间，并且支撑板位于第二半导体芯片和封装基板之间。 粘合层可以将第二半导体芯片接合到第一半导体芯片，并且可以将第二半导体芯片接合到支撑板。 此外，可以在第一半导体芯片和封装基板之间设置电耦合。

公开(公告)号：US20090051023A1

公开(公告)日：2009-02-26

申请号：US11969727

申请日：2008-01-04

申请人： Tae-Duk NAM ,  Hee-Jin PARK ,  Jeong-Joon OH

发明人： Tae-Duk NAM ,  Hee-Jin PARK ,  Jeong-Joon OH

IPC分类号： H01L23/02

CPC分类号： H01L23/4334 ,  H01L21/6835 ,  H01L24/16 ,  H01L24/48 ,  H01L25/03 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18165 ,  H01L2924/18301 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Provided is a stack package comprising: a substrate comprising a cavity; a first semiconductor chip disposed in the cavity; and a second semiconductor chip stacked on the substrate and electrically connected to the substrate by a plurality of conductive external terminals such as conductive bumps. Since both a horizontal packaging method using bonding wires and a flip-chip packaging method are used and the bonding wires of the horizontal package and the conductive external terminals for the flip-chip bonding are formed on substantially the same plane, the total height of the stack package is reduced.

摘要翻译： 提供了一种堆叠包装，包括：包括空腔的基板; 设置在所述空腔中的第一半导体芯片; 以及第二半导体芯片，其堆叠在所述基板上并且通过诸如导电凸块的多个导电外部端子电连接到所述基板。 由于使用使用接合线的水平封装方法和倒装芯片封装方法，并且水平封装的接合线和用于倒装芯片接合的导电外部端子形成在基本相同的平面上，因此， 堆栈包减少。

公开(公告)号：US20070138605A1

公开(公告)日：2007-06-21

申请号：US11613881

申请日：2006-12-20

申请人： Tae-Duk Nam ,  Bo-Seong Kim

发明人： Tae-Duk Nam ,  Bo-Seong Kim

IPC分类号： H01L23/495

CPC分类号： H01L25/0657 ,  H01L21/6835 ,  H01L24/27 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2221/6834 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/0715 ,  H01L2924/07025 ,  H01L2924/0635 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device includes a semiconductor chip and an adhesive sheet adhered to a lower surface of the semiconductor chip, the adhesive sheet including a deformation prevention layer for suppressing deformation of the semiconductor chip. The adhesive sheet includes an adhesive layer, a base layer formed under the adhesive layer, and a deformation prevention layer interposed between the base layer and the adhesive layer, the deformation prevention layer suppressing deformation of the semiconductor chip. A deformation prevention sheet is further formed on a lower surface of the semiconductor chip. Methods of forming a semiconductor device and a multi-stacked package include adhesive sheets.

摘要翻译： 半导体器件包括半导体芯片和粘附到半导体芯片的下表面的粘合片，该粘合片包括用于抑制半导体芯片变形的变形防止层。 粘合片包括粘合剂层，在粘合剂层下形成的基底层，以及插入在基底层和粘合剂层之间的变形防止层，所述变形防止层抑制半导体芯片的变形。 在半导体芯片的下表面上进一步形成变形防止片。 形成半导体器件和多堆叠封装的方法包括粘合片。

公开(公告)号：US20050212099A1

公开(公告)日：2005-09-29

申请号：US11078640

申请日：2005-03-11

申请人： Sang-Hyeop Lee ,  Se-Yong Oh ,  Jing-Ho Kim ,  Chan-Suk Lee ,  Min-Keun Kwak ,  Sung-Hwan Yoon ,  Tae-Duk Nam

发明人： Sang-Hyeop Lee ,  Se-Yong Oh ,  Jing-Ho Kim ,  Chan-Suk Lee ,  Min-Keun Kwak ,  Sung-Hwan Yoon ,  Tae-Duk Nam

IPC分类号： H01L23/495

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L23/49513 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： The present invention provides an LOC package wherein the lead frame is in direct contact with the semiconductor device. The lead frame, which includes openings, is positioned directly on the semiconductor device. An adhesive material is applied in the opening in the lead frame. This adhesive material contacts both the lead frame and the semiconductor device. The lead frame is therefore securely held to the semiconductor device. Wires can then be bonded to contact pads on the semiconductor device and to the lead frame.

摘要翻译： 本发明提供一种LOC封装，其中引线框架与半导体器件直接接触。 包括开口的引线框架直接位于半导体器件上。 在引线框架的开口中施加粘合材料。 该粘合剂材料与引线框架和半导体器件接触。 因此，引线框架牢固地保持在半导体器件上。 然后可以将导线接合到半导体器件和引线框架上的接触焊盘。

公开(公告)号：US20140167291A1

公开(公告)日：2014-06-19

申请号：US14184951

申请日：2014-02-20

申请人： Tae-Duk Nam ,  Jin-Ho Kim ,  Hyuk-Su Kim ,  Hyoung-Suk Kim ,  Tae-Young Lee

发明人： Tae-Duk Nam ,  Jin-Ho Kim ,  Hyuk-Su Kim ,  Hyoung-Suk Kim ,  Tae-Young Lee

IPC分类号： H01L25/065

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32265 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/01013 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2924/014 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A semiconductor package may include a packaging substrate, a first semiconductor chip on the packaging substrate, and a support plate on the packaging substrate. The support plate may be spaced apart from the first semiconductor chip in a direction parallel with respect to a surface of the packaging substrate. A second semiconductor chip may be provided on the first semiconductor chip and on the support plate so that the first semiconductor chip is between the second semiconductor chip and the packaging substrate and so that the support plate is between the second semiconductor chip and the packaging substrate. An adhesion layer may bond the second semiconductor chip to the first semiconductor chip and may bond the second semiconductor chip to the support plate. In addition, an electrical coupling may be provided between the first semiconductor chip and the packaging substrate.

摘要翻译： 半导体封装可以包括封装衬底，封装衬底上的第一半导体芯片，以及封装衬底上的支撑板。 支撑板可以在相对于包装基板的表面平行的方向上与第一半导体芯片间隔开。 可以在第一半导体芯片和支撑板上设置第二半导体芯片，使得第一半导体芯片在第二半导体芯片和封装基板之间，并且支撑板位于第二半导体芯片和封装基板之间。 粘合层可以将第二半导体芯片接合到第一半导体芯片，并且可以将第二半导体芯片接合到支撑板。 此外，可以在第一半导体芯片和封装基板之间设置电耦合。

公开(公告)号：US20130049228A1

公开(公告)日：2013-02-28

申请号：US13564309

申请日：2012-08-01

申请人： Tae-Duk NAM ,  Jin-Ho Kim ,  Hyuk-Su Kim ,  Hyoung-Suk Kim ,  Tae-Young Lee

发明人： Tae-Duk NAM ,  Jin-Ho Kim ,  Hyuk-Su Kim ,  Hyoung-Suk Kim ,  Tae-Young Lee

IPC分类号： H01L25/07

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32265 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/01013 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2924/014 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A semiconductor package may include a packaging substrate, a first semiconductor chip on the packaging substrate, and a support plate on the packaging substrate. The support plate may be spaced apart from the first semiconductor chip in a direction parallel with respect to a surface of the packaging substrate. A second semiconductor chip may be provided on the first semiconductor chip and on the support plate so that the first semiconductor chip is between the second semiconductor chip and the packaging substrate and so that the support plate is between the second semiconductor chip and the packaging substrate. An adhesion layer may bond the second semiconductor chip to the first semiconductor chip and may bond the second semiconductor chip to the support plate. In addition, an electrical coupling may be provided between the first semiconductor chip and the packaging substrate.

摘要翻译： 半导体封装可以包括封装衬底，封装衬底上的第一半导体芯片，以及封装衬底上的支撑板。 支撑板可以在相对于包装基板的表面平行的方向上与第一半导体芯片间隔开。 可以在第一半导体芯片和支撑板上设置第二半导体芯片，使得第一半导体芯片在第二半导体芯片和封装基板之间，并且支撑板位于第二半导体芯片和封装基板之间。 粘合层可以将第二半导体芯片接合到第一半导体芯片，并且可以将第二半导体芯片接合到支撑板。 此外，可以在第一半导体芯片和封装基板之间设置电耦合。

公开(公告)号：US07414303B2

公开(公告)日：2008-08-19

申请号：US11078640

申请日：2005-03-11

申请人： Sang-Hyeop Lee ,  Se-Yong Oh ,  Jin-Ho Kim ,  Chan-Suk Lee ,  Min-Keun Kwak ,  Sung-Hwan Yoon ,  Tae-Duk Nam

发明人： Sang-Hyeop Lee ,  Se-Yong Oh ,  Jin-Ho Kim ,  Chan-Suk Lee ,  Min-Keun Kwak ,  Sung-Hwan Yoon ,  Tae-Duk Nam

IPC分类号： H01L23/495 ,  H01L21/00

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L23/49513 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： The present invention provides an LOC package wherein the lead frame is in direct contact with the semiconductor device. The lead frame, which includes openings, is positioned directly on the semiconductor device. An adhesive material is applied in the opening in the lead frame. This adhesive material contacts both the lead frame and the semiconductor device. The lead frame is therefore securely held to the semiconductor device. Wires can then be bonded to contact pads on the semiconductor device and to the lead frame.

摘要翻译： 本发明提供一种LOC封装，其中引线框架与半导体器件直接接触。 包括开口的引线框架直接位于半导体器件上。 在引线框架的开口中施加粘合材料。 该粘合剂材料与引线框架和半导体器件接触。 因此，引线框架牢固地保持在半导体器件上。 然后可以将导线接合到半导体器件和引线框架上的接触焊盘。