公开(公告)号：US11195756B2

公开(公告)日：2021-12-07

申请号：US14491856

申请日：2014-09-19

Applicant: APPLIED MATERIALS, INC.

Inventor： James M. Holden ,  Alexander N. Lerner ,  Ajay Kumar ,  Aparna Iyer ,  Alan Hiroshi Ouye

IPC: H01J37/32 ,  H01L21/78 ,  H01L21/67 ,  H01L21/683 ,  H01L21/3065 ,  H01L21/308

Abstract: Methods of and carriers for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a cover ring for protecting a carrier and substrate assembly during an etch process includes an inner opening having a diameter smaller than the diameter of a substrate of the carrier and substrate assembly. An outer frame surrounds the inner opening. The outer frame has a bevel for accommodating an outermost portion of the substrate of the carrier and substrate assembly.

公开(公告)号：US10692765B2

公开(公告)日：2020-06-23

申请号：US14536318

申请日：2014-11-07

Applicant: APPLIED MATERIALS, INC.

Inventor： James M. Holden ,  Alexander N. Lerner ,  Ajay Kumar ,  Brad Eaton ,  Aparna Iyer

IPC: H01L21/687 ,  H01L21/683 ,  H01L21/677 ,  H01L21/78 ,  H01L21/311 ,  H01L21/3065 ,  H01L21/67 ,  H01J37/32 ,  H01L21/3213 ,  H01L21/308

Abstract: Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a plasma etch apparatus includes a plasma etch chamber. The plasma etch chamber includes a plasma source disposed in an upper region of the plasma etch chamber, a cathode assembly disposed below the plasma source, and a support pedestal for supporting a substrate carrier below the plasma source. The plasma etch apparatus also includes a transfer chamber coupled to the plasma etch chamber. The transfer chamber includes a transfer arm for supporting a substantial portion of a dicing tape of the substrate carrier, the transfer arm configured to transfer a sample from the support pedestal following an etch singulation process.

公开(公告)号：US09343366B2

公开(公告)日：2016-05-17

申请号：US14543747

申请日：2014-11-17

Applicant: Applied Materials, Inc.

Inventor： Wei-Sheng Lei ,  James S. Papanu ,  Aparna Iyer ,  Brad Eaton ,  Ajay Kumar

IPC: H01L21/00 ,  H01L21/78 ,  H01L21/683 ,  H01L21/268 ,  H01L21/3065 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L21/78 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/6836 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/12041 ,  H01L2224/11 ,  H01L2924/00

Abstract: Approaches for hybrid laser scribe and plasma etch dicing process for a wafer having backside solder bumps are described. For example, a method of dicing a semiconductor wafer having integrated circuits on a front side thereof and corresponding arrays of metal bumps on a backside thereof involves applying a dicing tape to the backside of the semiconductor wafer, the dicing tape covering the arrays of metal bumps. The method also involves, subsequently, forming a mask on the front side of the semiconductor wafer, the mask covering the integrated circuits. The method also involves forming scribe lines on the front side of the semiconductor wafer with a laser scribing process, the scribe lines formed in the mask and between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits, the mask protecting the integrated circuits during the plasma etching.

Abstract translation: 描述了具有背面焊料凸块的晶片的混合激光划片和等离子体蚀刻切割工艺的方法。 例如，在其前侧具有集成电路的半导体晶片的切割方法和背面的金属凸块的相应阵列包括在半导体晶片的背面施加切割带，该切割带覆盖金属凸块的阵列 。 该方法还包括在半导体晶片的正面上形成掩模，该掩模覆盖集成电路。 该方法还涉及通过激光划线工艺在半导体晶片的正面上形成刻划线，在掩模中形成划线并在集成电路之间。 该方法还包括通过划线等离子体蚀刻半导体晶片以对集成电路进行分离，掩模在等离子体蚀刻期间保护集成电路。

公开(公告)号：US09105710B2

公开(公告)日：2015-08-11

申请号：US14091014

申请日：2013-11-26

Applicant: APPLIED MATERIALS, INC.

Inventor： Wei-Sheng Lei ,  Brad Eaton ,  Aparna Iyer ,  Madhava Rao Yalamanchili ,  Ajay Kumar ,  Jungrae Park

IPC: H01L21/00 ,  H01L21/78 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/67 ,  B23K26/36

CPC classification number: H01L21/78 ,  B23K26/0624 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  B23K2103/42 ,  B23K2103/50 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3081 ,  H01L21/67069 ,  H01L21/67207

Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation while also removing an oxidation layer from metal bumps on the wafer. In one embodiment, a method includes forming a mask over the semiconductor wafer covering the plurality of ICs, the plurality of ICs including metal bumps or pads with an oxidation layer. The method includes patterning the mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the ICs. The method includes plasma etching the semiconductor wafer through the gaps in the patterned mask to singulate the plurality of ICs and remove the oxidation layer from the metal bumps or pads.

Abstract translation: 在实施例中，涉及初始激光划片和随后等离子体蚀刻的混合晶片或衬底切割工艺被实现用于裸片分离，同时还从晶片上的金属凸块去除氧化层。 在一个实施例中，一种方法包括在覆盖多个IC的半导体晶片上形成掩模，所述多个IC包括具有氧化层的金属凸块或焊盘。 该方法包括用激光划线工艺对掩模进行图案化以提供具有间隙的图案化掩模，暴露半导体晶片在IC之间的区域。 该方法包括通过图案化掩模中的间隙对半导体晶片进行等离子体蚀刻，以分离多个IC并从金属凸块或焊盘移除氧化层。

公开(公告)号：US20200258780A1

公开(公告)日：2020-08-13

申请号：US16863950

申请日：2020-04-30

Applicant: Applied Materials, Inc.

Inventor： James M. Holden ,  Alexander N. Lerner ,  Ajay Kumar ,  Brad Eaton ,  Aparna Iyer

IPC: H01L21/78 ,  H01L21/677 ,  H01L21/687 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3213 ,  H01J37/32 ,  H01L21/67 ,  H01L21/683 ,  H01L21/3065

Abstract: Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a plasma etch apparatus includes a plasma etch chamber. The plasma etch chamber includes a plasma source disposed in an upper region of the plasma etch chamber, a cathode assembly disposed below the plasma source, and a support pedestal for supporting a substrate carrier below the plasma source. The plasma etch apparatus also includes a transfer chamber coupled to the plasma etch chamber. The transfer chamber includes a transfer arm for supporting a substantial portion of a dicing tape of the substrate carrier, the transfer arm configured to transfer a sample from the support pedestal following an etch singulation process.

公开(公告)号：US09236305B2

公开(公告)日：2016-01-12

申请号：US14158529

申请日：2014-01-17

Applicant: Applied Materials, Inc.

Inventor： Wei-Sheng Lei ,  Saravjeet Singh ,  Jivko Dinev ,  Aparna Iyer ,  Brad Eaton ,  Ajay Kumar

IPC: H01L21/302 ,  H01L21/461 ,  H01L21/78 ,  H01L21/3065 ,  H01L21/027 ,  H01L21/311 ,  H01J37/32 ,  H01L21/683 ,  B23K26/36 ,  B23K26/40

CPC classification number: H01L21/78 ,  B23K26/364 ,  B23K26/40 ,  B23K26/402 ,  B23K2103/172 ,  B23K2103/50 ,  H01J37/32009 ,  H01L21/0271 ,  H01L21/3065 ,  H01L21/31105 ,  H01L21/31127 ,  H01L21/6836 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/68381

Abstract: Laser and plasma etch wafer dicing where a mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a film frame by an adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The laser scribing exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is plasma etched through the gaps in the patterned mask while the film frame is maintained at an acceptably low temperature with a chamber shield ring configured to sit beyond the wafer edge and cover the frame. The shield ring may be raised and lowered, for example, on lifter pins to facilitate transfer of the wafer on frame.

Abstract translation: 激光和等离子体蚀刻晶片切割，其中形成掩模以覆盖形成在晶片上的IC，以及提供与IC的界面的任何凸块。 半导体晶片通过粘合膜耦合到胶片框架。 通过激光划线将掩模图案化以提供具有间隙的图案化掩模。 激光划线使半导体晶片的区域露出在形成有IC的薄膜层的下方。 半导体晶片通过图案化掩模中的间隙进行等离子体蚀刻，同时膜框架被保持在可接受的低温下，腔室屏蔽环被配置为超过晶片边缘并覆盖框架。 屏蔽环可以升高和降低，例如在升降器销上，以促进晶片在框架上的传送。

公开(公告)号：US09177864B2

公开(公告)日：2015-11-03

申请号：US14478354

申请日：2014-09-05

Applicant: Applied Materials, Inc.

Inventor： Wei-Sheng Lei ,  Brad Eaton ,  Aparna Iyer ,  Todd Egan ,  Madhava Rao Yalamanchili ,  Ajay Kumar

IPC: H01L21/00 ,  H01L21/82 ,  H01L21/78 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/311

CPC classification number: H01L21/82 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3081 ,  H01L21/31127 ,  H01L21/78

Abstract: Methods of using a hybrid mask composed of a first water soluble film layer and a second water-soluble layer for wafer dicing using laser scribing and plasma etch described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a hybrid mask above the semiconductor wafer. The hybrid mask is composed of a first water-soluble layer disposed on the integrated circuits, and a second water-soluble layer disposed on the first water-soluble layer. The method also involves patterning the hybrid mask with a laser scribing process to provide a patterned hybrid mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also involves etching the semiconductor wafer through the gaps in the patterned hybrid mask to singulate the integrated circuits.

Abstract translation: 使用由第一水溶性薄膜层和第二水溶性层组成的晶片切割的激光划线和等离子体蚀刻的方法。 在一个示例中，对具有多个集成电路的半导体晶片进行切割的方法包括在半导体晶片上形成混合掩模。 混合掩模由设置在集成电路上的第一水溶性层和设置在第一水溶性层上的第二水溶性层组成。 该方法还包括用激光划线工艺图案化混合掩模，以提供具有间隙的图案化混合掩模，暴露集成电路之间的半导体晶片的区域。 该方法还包括通过图案化混合掩模中的间隙蚀刻半导体晶片以对集成电路进行分离。

公开(公告)号：US08980726B2

公开(公告)日：2015-03-17

申请号：US14158632

申请日：2014-01-17

Applicant: Applied Materials, Inc.

Inventor： Wei-Sheng Lei ,  Aparna Iyer ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Ajay Kumar

IPC: H01L21/00 ,  H01L21/78 ,  H01L21/027 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/311 ,  H01L21/683

CPC classification number: H01L21/78 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  H01L21/0271 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/31105 ,  H01L21/31127 ,  H01L21/6836 ,  H01L2221/68327

Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a mask, patterning the mask with a femtosecond laser scribing process to provide a patterned mask with gaps, and ablating through an entire thickness of a semiconductor substrate to singulate the IC. Following laser-based singulation, a plasma etch is performed to remove a layer of semiconductor sidewall damaged by the laser scribe process. In the exemplary embodiment, a femtosecond laser is utilized and a 1-3 μm thick damage layer is removed with the plasma etch. Following the plasma etch, the mask is removed, rendering the singulated die suitable for assembly/packaging.

Abstract translation: 具有多个IC的切割基板的方法。 一种方法包括形成掩模，用飞秒激光划线工艺对掩模进行构图，以提供具有间隙的图案化掩模，并且通过半导体衬底的整个厚度烧蚀以分离IC。 按照基于激光的分割，执行等离子体蚀刻以去除由激光刻划过程损坏的半导体侧壁层。 在示例性实施例中，使用飞秒激光，并且用等离子体蚀刻去除1-3μm厚的损伤层。 在等离子体蚀刻之后，去除掩模，使得单个模具适合于组装/封装。

公开(公告)号：US08975162B2

公开(公告)日：2015-03-10

申请号：US14095824

申请日：2013-12-03

Applicant: Applied Materials, Inc.

Inventor： Wei-Sheng Lei ,  Brad Eaton ,  Aparna Iyer ,  Saravjeet Singh ,  Madhava Rao Yalamanchili ,  Ajay Kumar

IPC: H01L21/00 ,  H01L21/822 ,  H01L21/78 ,  H01L21/308 ,  H01L21/683

CPC classification number: H01L21/822 ,  B23K26/0624 ,  B23K26/18 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/3081 ,  H01L21/6836 ,  H01L21/78 ,  H01L2221/68327 ,  H01L2221/6834

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. For example, a method includes applying a protection tape to a wafer front side, the wafer having a dicing tape attached to the wafer backside. The dicing tape is removed from the wafer backside to expose a die attach film disposed between the wafer backside and the dicing tape. Alternatively, if no die attach film is initially disposed between the wafer backside and the dicing tape, a die attach film is applied to the wafer backside at this operation. A water soluble mask is applied to the wafer backside. Laser scribing is performed on the wafer backside to cut through the mask, the die attach film and the wafer, including all layers included within the front side and backside of the wafer. A plasma etch is performed to treat or clean surfaces of the wafer exposed by the laser scribing. A wafer backside cleaning is performed and a second dicing tape is applied to the wafer backside. The protection tape is the removed from the wafer front side.

Abstract translation: 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 例如，一种方法包括将保护带施加到晶片正面，所述晶片具有附接到晶片背面的切割带。 切割胶带从晶片背面去除，以露出设置在晶片背面和切割胶带之间的管芯附着膜。 或者，如果在晶片背面和切割带之间不设置管芯附着膜，则在该操作中将芯片附着膜施加到晶片背面。 将水溶性掩模施加到晶片背面。 在晶片背面进行激光划线，以切割掩模，芯片附着膜和晶片，包括包括在晶片的正面和背面内的所有层。 执行等离子体蚀刻以处理或清洁由激光划线暴露的晶片的表面。 执行晶片背面清洁，并且将第二切割带施​​加到晶片背面。 保护带从晶片正面去除。

公开(公告)号：US20140346641A1

公开(公告)日：2014-11-27

申请号：US13947890

申请日：2013-07-22

Applicant: Applied Materials, Inc.

Inventor： Wei-Sheng Lei ,  Brad Eaton ,  Aparna Iyer ,  Madhava Rao Yalamanchili ,  Ajay Kumar

IPC: H01L21/78

CPC classification number: H01L21/82 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/78 ,  H01L27/04

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, approaches for wafer dicing with wide kerf by using a laser scribing and plasma etching hybrid approach are described. For example, a method of dicing a semiconductor wafer including a plurality of integrated circuits separated by dicing streets involves forming a mask above the semiconductor wafer, the mask having a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a laser scribing process to provide a patterned mask having a pair of parallel gaps for each dicing street, exposing regions of the semiconductor wafer between the integrated circuits. Each gap of each pair of parallel gaps is separated by a distance. The method also involves etching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits.

Abstract translation: 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 在一个示例中，描述了通过使用激光划线和等离子体蚀刻混合方法的具有宽切口的晶片切割的方法。 例如，通过切割由切割街道分离的多个集成电路的半导体晶片的切割方法包括在半导体晶片上形成掩模，该掩模具有覆盖并保护集成电路的层。 该方法还包括用激光划线工艺对掩模进行图案化以提供具有用于每个切割街道的一对平行间隙的图案化掩模，暴露集成电路之间的半导体晶片的区域。 每对平行间隙的每个间隙分开一段距离。 该方法还包括通过图案化掩模中的间隙蚀刻半导体晶片以对集成电路进行分离。